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1. 发明授权

EP1936856B1 Differential signaling using a modulated common mode voltage 有权
标题翻译：使用调制共模电压差分信号传输
公开(公告)号：EP1936856B1
公开(公告)日：2015-08-26
申请号：EP07254314.3
申请日：2007-10-31
申请人： Silicon Image, Inc.
发明人： Shim, Daeyun , Kim, Min-Kyu , Kim, Gyudong , Jung, Keewook , Hwang, Seung Ho
IPC分类号： H04L5/20
CPC分类号： H04L5/20

2. 发明公开

EP1936856A2 Current mode circuitry to modulate a common mode voltage 有权
标题翻译：差异化信号通讯技术有限公司Gleichtaktspannung
公开(公告)号：EP1936856A2
公开(公告)日：2008-06-25
申请号：EP07254314.3
申请日：2007-10-31
申请人： Silicon Image, Inc.
发明人： Shim, Daeyun , Kim, Min-Kyu , Kim, Gyudong , Jung, Keewook , Hwang, Seung Ho
IPC分类号： H04L5/20
CPC分类号： H04L5/20
摘要： In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry selectively to modulate a common mode voltage of the differential signals, so as to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry selectively to modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are also described and claimed.
摘要翻译：在一些实施例中，芯片包括用于在导体上传输差分信号的发射器; 并且电流模式电路有选择地调制差分信号的共模电压，以便传送数据。在其他实施例中，系统包括用于在导体上传输第一和第二差分信号的第一芯片和第二芯片。第二芯片包括接收器，用于接收来自导体的第一和第二差分信号并提供代表其的接收信号，以及选择性地调制第一或第二差分信号的共模电压以传送数据的电流模式电路，并且其中第一芯片包括用于检测共模电压变化的共模检测电路。还描述和要求保护其他实施例。

3. 发明公开

EP1780930A2 Clock-edge modulated serial link with DC balance control 有权
标题翻译： Serielle Verbindung mit Modulation der Taktflanken und Vermeidung von Gleichstrom
公开(公告)号：EP1780930A2
公开(公告)日：2007-05-02
申请号：EP06255352.4
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Jeong, Deog-Kyoon , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu
IPC分类号： H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902
摘要： A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.
摘要翻译：电池供电的计算设备具有被配置为单个直流平衡差分通道的通道。信号发射器连接到通道。信号发射机被配置为将时钟边缘调制信号施加到信道，其中时钟边缘调制信号包括直流平衡控制信号。信号接收器连接到通道。信号接收器被配置为恢复直流平衡控制信号。

4. 发明授权

EP2501090B8 Clock-edge modulated serial link with DC-balance control 有权
标题翻译：带DC平衡控制的时钟边沿调制串行链路
公开(公告)号：EP2501090B8
公开(公告)日：2014-11-05
申请号：EP12167375.0
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu , Jeong, Deog-Kyoon
IPC分类号： H04L25/49 , H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902

5. 发明授权

EP2501090B1 Clock-edge modulated serial link with DC-balance control 有权
标题翻译：与直流电压控制串行时钟边缘调制相结合
公开(公告)号：EP2501090B1
公开(公告)日：2014-09-03
申请号：EP12167375.0
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu , Jeong, Deog-Kyoon
IPC分类号： H04L25/49 , H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902

6. 发明公开

EP2501090A2 Clock-edge modulated serial link with DC-balance control 有权
标题翻译：带DC平衡控制的时钟边沿调制串行链路
公开(公告)号：EP2501090A2
公开(公告)日：2012-09-19
申请号：EP12167375.0
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu , Jeong, Deog-Kyoon
IPC分类号： H04L25/49 , H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902
摘要： A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.
摘要翻译：电池供电的计算设备具有配置为单个直流平衡差分通道的通道。信号发送器连接到通道。信号发送器被配置为将时钟边沿调制信号应用于信道，其中时钟边沿调制信号包括直流均衡控制信号。信号接收器连接到通道。信号接收器被配置为恢复直流均衡控制信号。

7. 发明公开

EP2787705A1 Clock-edge modulated serial link with dc-balance control 审中-公开
标题翻译：具有直流平衡控制的时钟边沿调制串行链路
公开(公告)号：EP2787705A1
公开(公告)日：2014-10-08
申请号：EP14172016.9
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Jeong, Deog-Kyoon , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu
IPC分类号： H04L25/49 , H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902
摘要： A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.
摘要翻译：电池供电的计算设备具有配置为单个直流平衡差分通道的通道。信号发送器连接到通道。信号发送器被配置为将时钟边沿调制信号应用于信道，其中时钟边沿调制信号包括直流均衡控制信号。信号接收器连接到通道。信号接收器被配置为恢复直流均衡控制信号。

8. 发明授权

EP1780930B1 Clock-edge modulated serial link with DC balance control 有权
标题翻译：与时钟的调制串行连接边缘，并避免DC
公开(公告)号：EP1780930B1
公开(公告)日：2013-09-04
申请号：EP06255352.4
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Jeong, Deog-Kyoon , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu
IPC分类号： H04L25/49 , H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902

9. 发明公开

EP2501090A3 Clock-edge modulated serial link with DC-balance control 有权
标题翻译：与直流电压控制串行时钟边缘调制相结合
公开(公告)号：EP2501090A3
公开(公告)日：2012-12-19
申请号：EP12167375.0
申请日：2006-10-18
申请人： Silicon Image, Inc.
发明人： Kim, Gyudong , Choe, Won Jun , Kim, Jaeha , Lee, Bong-Joon , Kim, Min-Kyu , Jeong, Deog-Kyoon
IPC分类号： H04L25/49 , H04L7/00
CPC分类号： H04L7/0008 , H04L25/0272 , H04L25/0284 , H04L25/4902
摘要： A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.

10. 发明公开

EP1936856A3 Current mode circuitry to modulate a common mode voltage 有权
标题翻译：电流模式开关和调制共模电压的
公开(公告)号：EP1936856A3
公开(公告)日：2012-05-30
申请号：EP07254314.3
申请日：2007-10-31
申请人： Silicon Image, Inc.
发明人： Shim, Daeyun , Kim, Min-Kyu , Kim, Gyudong , Jung, Keewook , Hwang, Seung Ho
IPC分类号： H04L5/20
CPC分类号： H04L5/20
摘要： In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry selectively to modulate a common mode voltage of the differential signals, so as to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry selectively to modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are also described and claimed.

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