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1. 发明公开

EP1751773A1 ERASE VERIFICATION FOR NON-VOLATILE MEMORY BY TESTING THE CONDUCTION OF THE MEMORY ELEMENTS IN A FIRST AND A SECOND DIRECTION 有权
标题翻译：删除非挥发性存储器验证通过检查一个第一存储元件和变速器的第二方向
公开(公告)号：EP1751773A1
公开(公告)日：2007-02-14
申请号：EP05752106.4
申请日：2005-05-20
申请人： SanDisk Corporation
发明人： TRAN, Dat , PONNURU, Kiran , CHEN, Jian , LUTZE, Jeffrey, W. , WANG, Jun
IPC分类号： G11C16/34
CPC分类号： G11C16/3468
摘要： Systems and methods in accordance with various embodiments can provide for comprehensive erase verification and defect detection in non-volatile semiconductor memory. In one embodiment, the results of erasing a group of storage elements is verified using a plurality of test conditions to better detect defective and/or insufficiently erased storage elements of the group. For example, the results of erasing a NAND string can be verified by testing charging of the string in a plurality of directions with the storage elements biased to turn on if in an erased state. If a string of storage elements passes a first test process or operation but fails a second test process or operation, the string can be determined to have failed the erase process and possibly be defective. By testing charging or conduction of the string in a first (380) and a second (382) direction, defects in any transistors of the string that are masked under one set of conditions may be exposed under a second set of bias conditions. For example, a string may pass an erase verification operation but then be read as including one or more programmed storage elements. Such a string can be defective and mapped out of the memory device.

2. 发明授权

EP1751773B1 ERASE VERIFICATION FOR NON-VOLATILE MEMORY BY TESTING THE CONDUCTION OF THE MEMORY ELEMENTS IN A FIRST AND A SECOND DIRECTION 有权
标题翻译：删除非挥发性存储器验证通过检查一个第一存储元件和变速器的第二方向
公开(公告)号：EP1751773B1
公开(公告)日：2009-01-14
申请号：EP05752106.4
申请日：2005-05-20
申请人： SanDisk Corporation
发明人： TRAN, Dat , PONNURU, Kiran , CHEN, Jian , LUTZE, Jeffrey, W. , WANG, Jun
IPC分类号： G11C16/34
CPC分类号： G11C16/3468
摘要： Systems and methods in accordance with various embodiments can provide for comprehensive erase verification and defect detection in non-volatile semiconductor memory. In one embodiment, the results of erasing a group of storage elements is verified using a plurality of test conditions to better detect defective and/or insufficiently erased storage elements of the group. For example, the results of erasing a NAND string can be verified by testing charging of the string in a plurality of directions with the storage elements biased to turn on if in an erased state. If a string of storage elements passes a first test process or operation but fails a second test process or operation, the string can be determined to have failed the erase process and possibly be defective. By testing charging or conduction of the string in a first (380) and a second (382) direction, defects in any transistors of the Systems and methods in accordance with various embodiments can provide for comprehensive erase verification and defect detection in non-volatile semiconductor memory. In one embodiment, the results of erasing a group of storage elements in verified using a plurality of test conditions to better detect defective and/or insufficiently erased storage elements of the group. For example, the results of erasing a NAND string can be verified by testing charging of the string in a plurality of directions with the storage elements biased to turn on if in an erased state. If a string of storage elements passes a first test process or operation but fails a second test process or operation, the string can be determined to have failed the erase process and possibly be defective. By testing charging or conduction of the string in a plurality of directions, defects in any transistors of the string that are masked under one set of conditions may be exposed under a second set of bias conditions. For example, a string may pass an erase verification operation but then be read as including one or more programmed storage elements. Such a string can be defective and mapped out of the memory device.

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