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1. 发明授权

EP2008217B1 SECURITY STORAGE OF ELECTRONIC KEYS WITHIN VOLATILE MEMORIES 有权
标题翻译：电子钥匙易失性存储器安全储备
公开(公告)号：EP2008217B1
公开(公告)日：2010-08-18
申请号：EP07705887.3
申请日：2007-02-15
申请人： NXP B.V.
发明人： TUYLS, Pim , VERTREGT, Maarten , DE JONG, Hans , LIST, Frans , WAGNER, Mathias , ZACHARIASSE, Frank , MELS, Arjan
IPC分类号： G06F21/00
CPC分类号： G06F21/556 , H04L9/0877
摘要： It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key. The integrated circuit (100) comprises a volatile memory (102) comprising predetermined data storage cells (102a), which are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and a non-volatile memory (104) having information stored upon regarding the predetermined data storage cells (102a). Thereby, the electronic key is defined by the corresponding logical states of the predetermined data storage cells (102a).

2. 发明公开

EP2179419A2 SECURE STORAGE OF A CODEWORD WITHIN AN INTEGRATED CIRCUIT 有权
标题翻译：码字的集成电路中的安全储藏
公开(公告)号：EP2179419A2
公开(公告)日：2010-04-28
申请号：EP08807309.3
申请日：2008-08-13
申请人： NXP B.V.
发明人： PELGROM, Marcel , VERTREGT, Maarten , TUINHOUT, Hans, Paul
IPC分类号： G11C17/12 , G11C7/20 , G06K19/073
CPC分类号： G11C7/24 , G11C11/41
摘要： The invention discloses an integrated circuit (10) for securely storing a codeword. The value of the codeword is dependent on the mobility (μA, μB, μC) of at least one transistor (TRA, TRB, TRC) of the integrated circuit. The invention further discloses a reader means (15), a method for determining the value of the codeword from the integrated circuit (10), and a method for altering the value of the codeword.

3. 发明授权

EP2156563B1 CIRCUIT WITH A SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER 失效
标题翻译：电路DIGITIZER逐次逼近
公开(公告)号：EP2156563B1
公开(公告)日：2011-09-07
申请号：EP08763122.2
申请日：2008-05-27
申请人： NXP B.V.
发明人： LOUWSMA, Simon, M. , VERTREGT, Maarten
IPC分类号： H03M1/46
CPC分类号： H03M1/462 , H03M1/144
摘要： During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and compared to the analog input signal. The digital reference values are selected dependent on comparison results. In the selection of the digital reference values successive steps between digital reference values are each selected dependent on values of the comparator result from a plurality of preceding recursion cycles. The comparison results define a series of successively narrower ranges of digital values that contain a digital representation of the analog input signal. Use of a plurality of comparator results for selecting the steps in the digital reference values makes it possible to reduce uncertainty about whether the comparison result has settled. This in turn makes it possible to reduce the sizes of the successive ranges, which speeds up convergence.

4. 发明公开

EP2201574A2 TIME-INTERLEAVED TRACK AND HOLD 失效
标题翻译：交错采样保持电路
公开(公告)号：EP2201574A2
公开(公告)日：2010-06-30
申请号：EP08807576.7
申请日：2008-09-09
申请人： NXP B.V.
发明人： LOUWSMA, Simon Minze , VERTREGT, Maarten
IPC分类号： G11C27/02
CPC分类号： H03K19/018528 , G11C27/026
摘要： The present application relates to an apparatus comprising a first transistor element, with at least three terminals, and at least one switching unit. The present application relates also to a method, computer readable medium having a computer program stored thereon and a track and hold circuit comprising the apparatus. The apparatus comprises a first transistor element with at least three terminals, wherein a first terminal is supplied with a first voltage, and wherein a second terminal is supplied with a second voltage. The apparatus comprises a first switching unit, wherein a third terminal is connected to ground potential via the first switching unit. The transistor element comprises a predefined threshold voltage. The first voltage and the second voltage are predefined alternating voltages. The transistor element is configured such that in case a differential voltage between the first predefined alternating voltage and the second predefined alternating voltage is higher than the predefined threshold voltage and the first switching unit is not conductive the third terminal is charged with the first predefined alternating voltage.

5. 发明公开

EP2156563A2 CIRCUIT WITH A SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER 失效
标题翻译：电路DIGITIZER逐次逼近
公开(公告)号：EP2156563A2
公开(公告)日：2010-02-24
申请号：EP08763122.2
申请日：2008-05-27
申请人： NXP B.V.
发明人： LOUWSMA, Simon, M. , VERTREGT, Maarten
IPC分类号： H03M1/46
CPC分类号： H03M1/462 , H03M1/144
摘要： During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and compared to the analog input signal. The digital reference values are selected dependent on comparison results. In the selection of the digital reference values successive steps between digital reference values are each selected dependent on values of the comparator result from a plurality of preceding recursion cycles. The comparison results define a series of successively narrower ranges of digital values that contain a digital representation of the analog input signal. Use of a plurality of comparator results for selecting the steps in the digital reference values makes it possible to reduce uncertainty about whether the comparison result has settled. This in turn makes it possible to reduce the sizes of the successive ranges, which speeds up convergence.

6. 发明公开

EP2008217A2 SECURITY STORAGE OF ELECTRONIC KEYS WITHIN VOLATILE MEMORIES 有权
标题翻译：电子钥匙易失性存储器安全储备
公开(公告)号：EP2008217A2
公开(公告)日：2008-12-31
申请号：EP07705887.3
申请日：2007-02-15
申请人： NXP B.V.
发明人： TUYLS, Pim , VERTREGT, Maarten , DE JONG, Hans , LIST, Frans , WAGNER, Mathias , ZACHARIASSE, Frank , MELS, Arjan
IPC分类号： G06F21/00
CPC分类号： G06F21/556 , H04L9/0877
摘要： It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key. The integrated circuit (100) comprises a volatile memory (102) comprising predetermined data storage cells (102a), which are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and a non-volatile memory (104) having information stored upon regarding the predetermined data storage cells (102a). Thereby, the electronic key is defined by the corresponding logical states of the predetermined data storage cells (102a).

7. 发明授权

EP2201574B1 TIME-INTERLEAVED TRACK AND HOLD 失效
标题翻译：交错采样保持电路
公开(公告)号：EP2201574B1
公开(公告)日：2016-03-16
申请号：EP08807576.7
申请日：2008-09-09
申请人： NXP B.V.
发明人： LOUWSMA, Simon Minze , VERTREGT, Maarten
IPC分类号： H03K19/0185 , G11C27/02
CPC分类号： H03K19/018528 , G11C27/026

8. 发明授权

EP2179419B1 SECURE STORAGE OF A CODEWORD WITHIN AN INTEGRATED CIRCUIT 有权
标题翻译：码字的集成电路中的安全储藏
公开(公告)号：EP2179419B1
公开(公告)日：2012-06-20
申请号：EP08807309.3
申请日：2008-08-13
申请人： NXP B.V.
发明人： PELGROM, Marcel , VERTREGT, Maarten , TUINHOUT, Hans, Paul
IPC分类号： G11C7/24 , G11C11/41 , G06K19/073 , G11C17/12 , G11C7/20
CPC分类号： G11C7/24 , G11C11/41
摘要： The invention discloses an integrated circuit (10) for securely storing a codeword. The value of the codeword is dependent on the mobility (μA, μB, μC) of at least one transistor (TRA, TRB, TRC) of the integrated circuit. The invention further discloses a reader means (15), a method for determining the value of the codeword from the integrated circuit (10), and a method for altering the value of the codeword.

9. 发明公开

EP2191476A1 A SIGNAL SAMPLING CIRCUIT 审中-公开
标题翻译： SIGNALERFASSUNGSSCHALTUNG
公开(公告)号：EP2191476A1
公开(公告)日：2010-06-02
申请号：EP08807617.9
申请日：2008-09-12
申请人： NXP B.V.
发明人： LOUWSMA, Simon, Minze , VERTREGT, Maarten
IPC分类号： G11C27/02
CPC分类号： G11C27/02 , G11C27/024
摘要： A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converter via a respective output switch. The output switch of each channel opens for a tracking time period when the track-and-hold circuit is in a tracking mode for sampling the signal, and closes for a holding time period when the track-and- hold circuit is in a holding mode for outputting the sampled signal. The holding time period comprises a settling time period that is at least as long as the tracking time period. The settling time period is used by the track-and-hold circuit to charge an input capacitance of the analogue to digital converter to a voltage according to the sampled signal.

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