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    • 2. 发明公开
    • Multiple asynchronous request handling
    • Behandlung von mehrfach asynchronen Anforderungen。
    • EP0495167A2
    • 1992-07-22
    • EP91119001.5
    • 1991-11-07
    • INTERNATIONAL BUSINESS MACHINES CORPORATION
    • Bean, Bradford MasonBierce, Anne ElizabethCristensen, Neal TaylorClark, Leo JamesJones, Christine CominsKrygowski, Matthew AnthonyReick, Kevin Franklin
    • G06F9/38G06F13/16
    • G06F9/3824
    • Plural requests for storage accessing are processed in plural stages of a storage-request pipeline. Pipeline processing is not interrupted when one or more requests must wait for a resource to start its processing, or when a pipeline stage must process for a long period in relation to the time allocated for a processing operation in the pipeline. Waiting is done in a wait path connected to a particular processing stage in the pipeline. A request is shunted from the pipeline into a wait path when processing the request in the pipeline would delay pipeline processing. When the wait has ended, a request re-enters the pipeline from its wait path. The pipeline is provided in a multiprocessor (MP) in which storage requests are provided asynchronously to a tightly coupled system storage and usually may be handled and processed asynchronously by the pipeline. The pipeline output may direct the processed requests to a shared intermediate cache or to the system main storage.
    • 存储访问的多个请求在存储请求流水线的多个阶段中被处理。 当一个或多个请求必须等待资源开始处理时,或当流水线阶段必须相对于分配给流水线中的处理操作的时间长时间处理时,流水线处理不会中断。 等待在连接到流水线中的特定处理阶段的等待路径中完成。 当处理流水线中的请求将延迟流水线处理时,请求从流水线分流到等待路径。 当等待结束时,请求从其等待路径重新输入流水线。 流水线设置在多处理器(MP)中,其中存储请求被异步地提供给紧耦合的系统存储器,并且通常可以由流水线异步处理和处理。 流水线输出可以将处理的请求定向到共享中间缓存或系统主存储。
    • 3. 发明公开
    • Ownership interlock for cache data units
    • Gegenseitige BesitzrechtsverriegelungfürCache-Dateneinheiten。
    • EP0507066A1
    • 1992-10-07
    • EP92102825.4
    • 1992-02-20
    • International Business Machines Corporation
    • Bean, Bradford MasonBierce, Anne ElizabethChristensen, Neal TaylorClark, Leo JamesComfort, Steven TylerJones, Christine CominsMak, Pak-Kin
    • G06F12/08
    • G06F12/0811
    • Insures data integrity in a data processing system by providing an ownership interlock on the data units in a pipeline to a store-in type of cache. An ownership interlock prevents any processor ownership change to occur (i.e. exclusive or readonly ownership) for a cache data unit until all outstanding stores have been made in the cache data unit, after which the ownership may be changed. An ownership change may be signalled by a cross-invalidate (XI) signal to a processor. Outstanding stores are received by the pipeline after the stores are completed by a processor, and the outstanding stores output from the pipeline into a store-in cache. A continuous flow of stores is enabled into and out of the pipeline to expedite a change of ownership requested of a data unit in the cache. The continuous flow avoids having to stop a processor from putting stores into the pipeline and avoids forcing all outstanding stores out of the pipeline into the cache before indicating a change of processor ownership.
    • 通过在流水线中的数据单元上提供所有权互锁到存储型缓存来保证数据处理系统中的数据完整性。 所有权互锁防止对高速缓存数据单元发生任何处理器所有权改变(即,独占或只读所有权),直到所有未完成的存储已经在缓存数据单元中进行,之后可以改变所有权。 所有权变更可以通过交叉无效(XI)信号发送给处理器。 在存储由处理器完成之后,流水线接收到优秀存储,并且从流水线输出的未完成存储器存储到高速缓存中。 连续的商店流被启用进出管道,以加快对高速缓存中的数据单元所要求的所有权的改变。 连续流程避免了停止处理器将存储放入流水线中,并避免在指示处理器所有权的更改之前将所有未完成的存储从管道中强制进入缓存。