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1. 发明公开

EP3682479A1 FEEDER DESIGN WITH HIGH CURRENT CAPABILITY 审中-公开
公开(公告)号：EP3682479A1
公开(公告)日：2020-07-22
申请号：EP18769701.6
申请日：2018-09-14
申请人： Ascatron AB
发明人： ELAHIPANAH, Hossein , THIERRY-JEBALI, Nicolas , SCHÖNER, Adolf , RESHANOV, Sergey
IPC分类号： H01L29/06 , H01L29/861 , H01L29/868 , H01L29/16

2. 发明公开

EP2175497A3 A photodiode 有权转让
标题翻译：光电二极管
公开(公告)号：EP2175497A3
公开(公告)日：2017-12-27
申请号：EP09162426.2
申请日：2009-06-10
申请人： Ascatron AB
发明人： BAKOWSKI, Mietek
IPC分类号： H01L31/107 , H01L31/108 , H01L31/0304 , H01L31/0312 , H01L31/0352 , H01L31/0224 , H01L27/144
摘要： An avalanche photodiode for detecting ultraviolet photons comprises a first semiconductor layer (1) and a low doped second semiconductor layer (2) on top thereof. These layers are of SiC or Al x Ga 1-x N, in which 0 ≤ x ≤ 0.5, and x may be different for these layers of the diode. A voltage close to the breakdown voltage of the diode being intended to be applied across electrodes (6, 7) of the diode in operation thereof for creating an active region of a high electric field for avalanche multiplication of charge carriers created by said photons in said second layer. A fourth layer (9) is arranged above the second layer laterally outside a surface (4) of the diode being configured to be exposed to photons to be detected, with the second (7) of said electrodes arranged on top thereof. The thickness of the fourth layer (9) and the doping concentration thereof are adapted to obtain an effective surface charge density of said fourth layer in a region laterally next to said surface obtaining an electric field strength substantially equal to a critical electric field strength of the diode at a pn-junction formed below said fourth layer laterally to said surface upon application of a said voltage across said electrodes.
摘要翻译：用于检测紫外光子的雪崩光电二极管包括在其顶部上的第一半导体层（1）和低掺杂第二半导体层（2）。这些层是SiC或AlxGa1-xN，其中0≤x≤0.5，并且对于二极管的这些层，x可以不同。接近二极管的击穿电压的电压预期施加在二极管的电极（6,7）的工作中，以产生高电场的有源区，用于由所述光子产生的电荷载流子的雪崩倍增第二层。第二层（9）布置在第二层的横向外侧的二极管的表面（4）之外，所述第二层被配置成暴露于待检测的光子，其中第二电极（7）布置在其顶部。第四层（9）的厚度及其掺杂浓度适于获得所述第四层在横向紧邻所述表面的区域中的有效表面电荷密度，从而获得基本上等于所述第四层（9）的临界电场强度的电场强度当在所述电极上施加所述电压时，在所述第四层下方形成的pn结处的二极管横向于所述表面。

3. 发明公开

EP4250339A2 A METHOD FOR MANUFACTURING A GRID 审中-实审
公开(公告)号：EP4250339A2
公开(公告)日：2023-09-27
申请号：EP22216033.5
申请日：2018-09-14
申请人： Ascatron AB
发明人： SCHÖNER, Adolf , RESHANOV, Sergey , THIERRY-JEBALI, Nicolas , ELAHIPANAH, Hossein
IPC分类号： H01L21/329 , H01L21/337 , H01L29/808 , H01L29/872 , H01L29/739 , H01L29/78 , H01L29/06 , H01L29/16 , H01L29/36 , H01L29/10
摘要： A grid is manufactured with a combination of ion implant and epitaxy growth. The grid structure is made in a SiC semiconductor material with the steps of a) providing a substrate comprising a doped semiconductor SiC material, said substrate comprising a first layer (n1), b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions (p2) on the first layer (n1), if necessary with aid of removing parts of the added semiconductor material to form separated second regions (p2) on the first layer (n1), and c) by ion implantation at least once at a stage selected from the group consisting of directly after step a), and directly after step b); implanting ions in the first layer (n1) to form first regions (p1). It is possible to manufacture a grid with rounded corners as well as an upper part with a high doping level. It is possible to manufacture a component with efficient voltage blocking, high current conduction, low total resistance, high surge current capability, and fast switching.

4. 发明公开

EP4250339A3 A METHOD FOR MANUFACTURING A GRID 审中-实审
公开(公告)号：EP4250339A3
公开(公告)日：2023-12-06
申请号：EP22216033.5
申请日：2018-09-14
申请人： Ascatron AB
发明人： SCHÖNER, Adolf , RESHANOV, Sergey , THIERRY-JEBALI, Nicolas , ELAHIPANAH, Hossein
IPC分类号： H01L21/329 , H01L21/337 , H01L29/808 , H01L29/872 , H01L29/739 , H01L29/78 , H01L29/06 , H01L29/16 , H01L29/36 , H01L29/10
摘要： A grid is manufactured with a combination of ion implant and epitaxy growth. The grid structure is made in a SiC semiconductor material with the steps of a) providing a substrate comprising a doped semiconductor SiC material, said substrate comprising a first layer (n1), b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions (p2) on the first layer (n1), if necessary with aid of removing parts of the added semiconductor material to form separated second regions (p2) on the first layer (n1), and c) by ion implantation at least once at a stage selected from the group consisting of directly after step a), and directly after step b); implanting ions in the first layer (n1) to form first regions (p1). It is possible to manufacture a grid with rounded corners as well as an upper part with a high doping level. It is possible to manufacture a component with efficient voltage blocking, high current conduction, low total resistance, high surge current capability, and fast switching.

5. 发明公开

EP3311392A1 FILLING OF DEEP RECESSES 审中-公开
标题翻译：充填深部凹陷
公开(公告)号：EP3311392A1
公开(公告)日：2018-04-25
申请号：EP16729551.8
申请日：2016-06-14
申请人： Ascatron AB
发明人： SCHÖNER, Adolf , VIEIDER, Christian , RESHANOV, Sergey , KAPLAN, Wlodzimierz
IPC分类号： H01L21/02 , H01L21/04 , H01L21/82 , H01L21/8252
CPC分类号： H01L21/02381 , H01L21/02376 , H01L21/02389 , H01L21/0243 , H01L21/02529 , H01L21/0455 , H01L29/0619 , H01L29/1602 , H01L29/1608 , H01L29/2003
摘要： A method of manufacturing a semiconductor with very deep doping structures, comprising the steps of: a) providing a substrate having an upper surface comprising at least one trench, b) adding material to the substrate using epitaxial growth, c) removing material from the top of the substrate to a level below the original upper surface in step a), d) adding material to the substrate using epitaxial growth, e) removing material from the top of the substrate to a level at or below the level after step c). One feature is that the method can be performed with fewer epitaxy steps and is thus less expensive and faster.

6. 发明公开

EP3682484A1 INTEGRATION OF A SCHOTTKY DIODE WITH A MOSFET 审中-公开
公开(公告)号：EP3682484A1
公开(公告)日：2020-07-22
申请号：EP18769700.8
申请日：2018-09-14
申请人： Ascatron AB
发明人： THIERRY-JEBALI, Nicolas , ELAHIPANAH, Hossein , SCHÖNER, Adolf , RESHANOV, Sergey
IPC分类号： H01L29/78 , H01L29/06

7. 发明公开

EP3682467A1 A METHOD FOR MANUFACTURING A P-DOPED GRID IN AN N-DOPED SIC LAYER 有权
公开(公告)号：EP3682467A1
公开(公告)日：2020-07-22
申请号：EP18770009.1
申请日：2018-09-14
申请人： Ascatron AB
发明人： SCHÖNER, Adolf , RESHANOV, Sergey , THIERRY-JEBALI, Nicolas , ELAHIPANAH, Hossein
IPC分类号： H01L21/329 , H01L21/337 , H01L29/808 , H01L29/872 , H01L29/739 , H01L29/78 , H01L29/06 , H01L29/16 , H01L29/36 , H01L29/10

8. 发明授权

EP2175497B1 AVALANCHE PHOTODIODE FOR ULTRAVIOLET PHOTON DETECTION 有权转让
公开(公告)号：EP2175497B1
公开(公告)日：2019-11-20
申请号：EP09162426.2
申请日：2009-06-10
申请人： Ascatron AB
发明人： BAKOWSKI, Mietek
IPC分类号： H01L31/107 , H01L31/0312 , H01L31/0352 , H01L31/0224 , H01L27/144

9. 发明公开

EP3311411A1 SIC SUPERJUNCTION STRUCTURES 审中-公开
标题翻译： SIC超级连接结构
公开(公告)号：EP3311411A1
公开(公告)日：2018-04-25
申请号：EP16728959.4
申请日：2016-06-14
申请人： Ascatron AB
发明人： SCHÖNER, Adolf , VIEIDER, Christian , RESHANOV, Sergey , KAPLAN, Wlodzimierz
IPC分类号： H01L29/66 , H01L29/06 , H01L29/16
CPC分类号： H01L29/0634 , H01L29/1608 , H01L29/66053
摘要： A super-junction structure manufactured with an epitaxy process and having at least one surface, said super-junction structure comprises a first doped SiC region and a second doped SiC region, and said super-junction structure comprising at least one filled trench, said at least one trench comprising one of i) the first doped SiC region and ii) the second doped SiC region, wherein ionized dopants of the first doped SiC region and ionized dopants of the second doped SiC region have the opposite sign of the charge, wherein the density of dopants outside said at least one trench is adapted to the density of dopants in said at least one trench for a plurality of planes perpendicular to the growth direction of the epitaxy process to achieve charge compensation in each plane. Features include that an improved charge compensation can be achieved in a SiC epitaxially grown super-junction structure with an efficient manufacturing method.

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