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    • 6. 发明授权
    • DIGITALER PHASE LOCKED LOOP
    • 数字锁相环
    • EP1012980B1
    • 2002-03-06
    • EP98940178.1
    • 1998-07-08
    • Nokia Networks Oy
    • POUTANEN, AnttiSUVITAIVAL, Pekka
    • H03L7/099H03K23/68
    • H03L7/0992H03K23/68
    • The invention relates to a digital phase locked loop for synchronizing an output clock signal with a reference clock signal, comprising a numerically controlled oscillator (2), which can be programmed, specially in relation to a desired fractional divisor so that it can be shifted between at least two numerical divisors, in addition to a phase detector (1) which can be supplied with both a reference clock signal and a feed-back output clock signal and on whose output a digital signal corresponding to the phase difference can be generated. The invention provides that the numerically controlled oscillator has at least two separately programmable divisor phases (4a, 4b, 4c) (DIV M/N; DIV O/P; DIV Q) which can be programmed separately from their own devices and which are arranged in a cascade connection in relation to each other so that an input signal of an upstream divisor phase is formed by an output clock signal of a downstream divisor phase and the output clock signal of an upstream divisor phase forms the clock signal of a downstream divisor phase.
    • 8. 发明公开
    • LINEARISATION AND MODULATION DEVICE
    • 线性化和调节装置
    • EP1181768A1
    • 2002-02-27
    • EP99925037.6
    • 1999-05-25
    • Nokia Networks Oy
    • TAPIO, Olli
    • H03C1/06H03C3/08H04L27/36H03F1/32
    • H03C3/40H03F1/3247H03F1/3288H03F2201/3233H04L27/368
    • The present invention discloses a linearisation and modulation device for a power amplifier. The linearisation and modulation device comprises a digital vector modulator (103, 104, 105) for generating a modulated digital signal (IF_MOD) on the basis of digital baseband signals (IIN, QIN) and digital carrier signals (PH_S, PH_C); a correction value generating means (114, 108; 114a, 108a) for generating an amplitude correction value (CV_AMAM) and a phase correction value (CV_AMPM) on the basis of said digital baseband signals (IIN, QIN) and on the basis of a non-linearity distortion generated in said power amplifier (6) arranged in a subsequent stage; an amplitude correction means (106) for generating a corrected digital signal (IF_OUT) on the basis of said modulated digital signal (IF_MOD) and said amplitude correction value (CV_AMAM); a phase correction means (111) for generating a corrected phase control signal on the basis of said phase correction value and an output signal of a phase control signal generation means (110); and a carrier signal generating means (112) for generating said carrier signals (PH_S, PH_C) on the basis of an output of said phase correction means (111). With such a device, a combined modulator and lineariser can be constructed, which leads to a compact system.