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81. 发明公开

EP3817035A2 SEMICONDUCTOR PACKAGE INCLUDING AN UNDERFILL LAYER FILLING A SUBSTRATE TRENCH 审中-实审
公开(公告)号：EP3817035A2
公开(公告)日：2021-05-05
申请号：EP20198542.1
申请日：2020-09-25
申请人： Samsung Electronics Co., Ltd.
发明人： PARK, Sang-Sick , KIM, Min Soo
IPC分类号： H01L21/56 , H01L23/485 , H01L25/065
摘要： A semiconductor package includes a base substrate (100) having a first semiconductor substrate (110) and a first protective layer (130) covering a top side thereof. A first semiconductor chip (200) is disposed on the first protective layer (130). A first fillet layer (420) (e.g., an underfill) fills a space between the first protective layer (130) and the first semiconductor chip (200). A first side surface (SS1) of the base substrate (100) extends in a first direction (Y), and second and third side surfaces (SS2, SS4) extend in a second direction (X). The base substrate (100) includes two corner regions (CR1, CR2) and a side region (ER11) between the corner regions (CR1, CR2). The first protective layer (130) in the side region (ER11) includes a first side trench (T11) which overlaps the first semiconductor chip (200). A part of the first fillet layer (420) fills the first side trench (T11). The side trench (T11) restricts the amount of the first fillet layer (420) spreading from the center (CP) of the base substrate (100) toward the side surface (SS1) of the first semiconductor chip (200). The first side trench (T11) may include a first sub-side trench (T11a) and a second sub-side trench (T11b, T11c), spaced apart from each other in the side region (ER11), wherein the first sub-side trench (T11a) and the second sub-side trench (T11c) may have same or different lengths, widths, depths or volumes. The first side trench (T11) may comprise a concave surface facing away from a center (CP) of the base substrate (100). The first protective layer (130) in the first corner region (CR2) and the second corner region (CR1) may omit a trench. Alternatively, the first protective layer (130) in the first corner region (CR2) may include a corner trench (T22) at least partially overlapping the semiconductor chip (200), wherein a volume of the first side trench (T11) is greater than a volume of the corner trench (T22), and wherein a part of the first fillet layer (420) at least partially fills the first side trench (T11) and the corner trench (T22). A length (L1), width (W1) or depth (D1) of the first side trench (T11) may be greater than, respectively, a length (L3), width (W3) or depth (D3) of the corner trench (T22). The base substrate (100) may further include a second side region (ER22) disposed between the first corner region (CR2) and the first side region (ER11), wherein the first protective layer (130) in the second side region (ER22) includes a second side trench (T32) at least partially overlapping the first semiconductor chip (200), and wherein the volume of the second side trench (T32) is smaller than the volume of the first side trench (T11) and is greater than the volume of the corner trench (T22). The base substrate (100) may include a first penetration via (140) penetrating both the first semiconductor substrate (110) and the first protective layer (130), wherein a first bump (410) electrically connects the first penetration via (140) and the first semiconductor chip (200) and the first fillet layer (420) at least partially surrounds the first bump (410). The semiconductor package may further comprise a second semiconductor chip (300) disposed on the first semiconductor chip (200) and a second fillet layer (520) at least partially filling a space between the first semiconductor chip (200) and the second semiconductor chip (300), optionally at least partially surrounding a second bump (510) connecting the first semiconductor chip (200) to the second semiconductor chip (300).

82. 发明公开

EP3815872A1 MOLD-MODUL 审中-公开
公开(公告)号：EP3815872A1
公开(公告)日：2021-05-05
申请号：EP20203003.7
申请日：2020-10-21
申请人： Robert Bosch GmbH
发明人： Geise, Stephan
IPC分类号： B29C45/14 , B29C45/73 , B29C45/00 , H01L21/56 , H05K3/28 , H01L23/29 , H05K5/00 , B29C45/77 , B29C45/78 , F16H61/00 , C08K3/013 , C08L67/06 , G01D11/24 , B29K67/00 , B29K501/12 , B29K509/02 , B29L31/34
摘要： Erfindungsgemäß weist das Mold-Modul einen die Mold-Masse umspannenden Rahmen auf. Der Rahmen umfasst einen Thermoplast, oder ist aus einem Thermoplast gebildet. Die Mold-Masse weist einen Duroplast und eine Expansionskomponente, insbesondere einen Thermoplast auf. Die Expansionskomponente, insbesondere der Thermoplast ist in den Duroplast eingemischt oder eingebettet und ausgebildet, ein Schwinden, insbesondere eine Volumenverringerung des Duroplasts wenigstens teilweise oder vollständig zu kompensieren, und so gegen den Rahmen abzudichten.

83. 发明授权

EP3235425B1 PACKAGING STRUCTURE, ELECTRONIC EQUIPMENT, AND PREPARATION METHOD FOR PACKAGING STRUCTURE 有权
公开(公告)号：EP3235425B1
公开(公告)日：2021-04-28
申请号：EP16843220.1
申请日：2016-07-08
发明人： DONG, Haoxiang
IPC分类号： A61B5/00 , A61B5/024 , A61B5/1455 , H01L27/146 , H01L21/56 , A61B5/053 , A61B5/1172 , H01L31/0203 , H01L31/18

84. 发明公开

EP3808493A1 METHOD FOR DELIDDING A HERMETICALLY SEALED CIRCUIT PACKAGE 审中-公开
公开(公告)号：EP3808493A1
公开(公告)日：2021-04-21
申请号：EP19213650.5
申请日：2019-12-04
申请人： Hamilton Sundstrand Corporation
发明人： HIDJIKHANI, Ali , PARENT, Michael R.
IPC分类号： B23K26/00 , G01R31/28 , H01L21/67 , G01N1/32 , H01L21/56
摘要： A method of delidding an integrated circuit (IC) package includes directing a laser beam along a cut line of an integrated circuit package. The cut line defines a removable portion, the cutting occurs along the cut line, and the removable portion is removed after the directing. A method of troubleshooting an integrated circuit package is also disclosed.

85. 发明公开

EP3797566A1 SCHALTUNGSTRÄGER MIT EINEM EINBAUPLATZ FÜR ELEKTRONISCHE BAUELEMENTE, ELEKTRONISCHE SCHALTUNG UND HERSTELLUNGSVERFAHREN 审中-实审
公开(公告)号：EP3797566A1
公开(公告)日：2021-03-31
申请号：EP19766184.6
申请日：2019-08-20
申请人： Siemens Aktiengesellschaft
发明人： HEIMANN, Matthias , SCHELLENBERG, Christian , URBAHN, Robby , WILKE, Klaus
IPC分类号： H05K3/34 , H05K3/28 , H01L23/00 , H05K1/02 , H05K3/00 , H05K3/30 , H01L21/56

86. 发明公开

EP3760408A1 METHOD FOR MANUFACTURING MOLDED ARTICLE, AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT DEVICE 审中-实审转让
公开(公告)号：EP3760408A1
公开(公告)日：2021-01-06
申请号：EP19775176.1
申请日：2019-03-27
申请人： Hitachi Chemical Company, Ltd.
发明人： ARATA, Michitoshi , MURASUGI, Narutoshi , TOGAWA, Mitsuo
IPC分类号： B29C39/42 , B29C39/10 , B29C39/38 , H01L21/56
摘要： A method of making a molded body includes: depressurizing an atmosphere in a container in which a solid resin composition is disposed; heating and melting the resin composition after depressurizing the atmosphere in the container; and bringing the atmosphere in the container, in which the melted resin composition is disposed, closer to atmospheric pressure.

87. 发明公开

EP3726571A1 MANUFACTURING METHOD OF MOUNTING STRUCTURE 审中-公开
公开(公告)号：EP3726571A1
公开(公告)日：2020-10-21
申请号：EP18888529.7
申请日：2018-12-13
申请人： NAGASE CHEMTEX CORPORATION
发明人： NOMURA Eiichi , MIYAMOTO Yutaka , HASHIMOTO Takayuki
IPC分类号： H01L23/29 , H01L21/56 , H01L23/31 , H03H3/08 , H03H9/25
摘要： A manufacturing method of a mounting structure, the method including a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a first cured layer; a removal step of removing the thermoplastic sheet from the first cured layer; and a coating film formation step of forming a coating film on the first cured layer, after the removal step. At least one of the second circuit members is a hollow member having a space from the first circuit member, and in the first sealing step, the second circuit members are sealed so as to maintain the space.

88. 发明授权

EP2572372B1 PROCESS FOR IMPROVING PACKAGE WARPAGE AND CONNECTION RELIABILITY THROUGH USE OF A BACKSIDE MOLD CONFIGURATION (BSMC) 有权
公开(公告)号：EP2572372B1
公开(公告)日：2020-09-02
申请号：EP11725236.1
申请日：2011-05-19
申请人： Qualcomm Incorporated
发明人： BCHIR, Omar, J. , SHAH, Milind, P. , MOVVA, Sashidhar
IPC分类号： H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498

89. 发明授权

EP2948979B1 OPEN CAVITY PLASTIC PACKAGE 有权
公开(公告)号：EP2948979B1
公开(公告)日：2020-08-05
申请号：EP14702428.5
申请日：2014-01-22
申请人： Microchip Technology Incorporated
发明人： FERNANDEZ, Joseph, D. , KITTIPHINIJNANTA, Sombat , YAMPUTCHONG, Nutthiwut , LERTRUTTANAPRECHA, Surachai , MAIKUTHAVORN, Viwat
IPC分类号： H01L21/56 , B29C45/14

90. 发明公开

EP3684578A1 VORRICHTUNG UND VERFAHREN ZUR HERSTELLUNG VON MIT EINER GIEßMASSE ZUMINDEST BEREICHSWEISE ÜBERDECKTEN BAUELEMENTEN 有权
公开(公告)号：EP3684578A1
公开(公告)日：2020-07-29
申请号：EP18753158.7
申请日：2018-08-09
申请人： Robert Bosch GmbH
发明人： SCHAAF, Ulrich , KUGLER, Andreas
IPC分类号： B29C33/14 , B29C45/14 , H01L21/56 , H05K3/28 , B29C45/57

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