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81. 发明授权

EP2316784B1 Structure d'interconnexion à cavité présentant une ou plusieurs remontées de contact sur les parois de la cavité et procédé de réalisation 失效
标题翻译：腔连接结构包括一个或多个上升导体的空腔的壁，和对应的制造方法
公开(公告)号：EP2316784B1
公开(公告)日：2014-02-26
申请号：EP10189285.9
申请日：2010-10-28
申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： Bolis, Sébastien , Jacquet, Fabrice , Saint-Patrice, Damien
IPC分类号： B81B7/00 , H01L23/48 , H05K3/40 , H01L23/538 , H01L27/146 , H05K1/02 , H05K1/18 , H05K3/46
CPC分类号： B81B7/0006 , B81B2203/0353 , B81B2207/012 , B81B2207/07 , H01L23/481 , H01L23/5389 , H01L27/14618 , H01L27/14627 , H01L2924/0002 , H05K1/0219 , H05K1/183 , H05K3/403 , H05K3/4697 , H05K2201/09172 , H05K2201/09181 , H05K2201/09645 , H01L2924/00012 , H01L2924/00

82. 发明公开

EP2259311A3 Verfahren zum Einbetten zumindest eines Bauelements in einem Leiterplattenelement 有权
标题翻译：一种用于在印刷电路板元件嵌入至少一个部件的方法
公开(公告)号：EP2259311A3
公开(公告)日：2014-01-15
申请号：EP10177700.1
申请日：2007-02-01
申请人： AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
发明人： Kriechbaum, Arno , Bauer, Wolfgang , Stahr, Johannes , Liebfahrt, Sabine
IPC分类号： H01L23/538
CPC分类号： H01L23/5389 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/82 , H01L24/83 , H01L2224/2402 , H01L2224/24051 , H01L2224/24226 , H01L2224/274 , H01L2224/27436 , H01L2224/2919 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/838 , H01L2224/92 , H01L2224/92244 , H01L2924/01005 , H01L2924/01006 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01061 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0665 , H01L2924/12033 , H01L2924/12042 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H05K1/185 , H05K3/305 , H05K3/4652 , H05K2203/0191 , H01L2224/83 , H01L2224/82 , H01L2924/00
摘要： Verfahren zum Einbetten eines elektrischen bzw. elektronischen Bauelements (2) in einem Leiterplattenelement (1), wobei das Bauelement (2) auf einer Unterlage (4) mit Hilfe eines Klebefolienabschnitts (3) angeklebt wird, der vorab am Bauelement (2) auf dessen der Unterlage (4) zugewandter Seite angeklebt und zusammen mit dem Bauelement (2) auf der Unterlage (4) angebracht wird, wonach über der Unterlage (4) samt Bauelement (2) eine Decklage (6) durch Verpressen angebracht wird.

83. 发明公开

EP2591498A1 PROCÉDÉ D'ASSEMBLAGE D'UNE PUCE DANS UN SUBSTRAT SOUPLE 无效
标题翻译：方法芯片组装的柔性基板
公开(公告)号：EP2591498A1
公开(公告)日：2013-05-15
申请号：EP11746593.0
申请日：2011-07-05
申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： BRUN, Jean
IPC分类号： H01L21/60
CPC分类号： H05K13/046 , H01L23/13 , H01L23/4985 , H01L23/5389 , H01L23/562 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/0655 , H01L25/50 , H01L2224/0401 , H01L2224/05571 , H01L2224/08238 , H01L2224/1134 , H01L2224/16237 , H01L2224/2919 , H01L2224/32237 , H01L2224/32238 , H01L2224/73204 , H01L2224/80006 , H01L2224/80007 , H01L2224/80201 , H01L2224/80903 , H01L2224/81005 , H01L2224/81007 , H01L2224/81191 , H01L2224/81201 , H01L2224/81385 , H01L2224/81801 , H01L2224/81903 , H01L2224/83005 , H01L2224/83007 , H01L2224/83192 , H01L2224/83201 , H01L2224/83385 , H01L2224/8385 , H01L2224/90 , H01L2224/9211 , H01L2924/00014 , H01L2924/01057 , H01L2924/01058 , H01L2924/0665 , H01L2924/12041 , H01L2924/12042 , H05K1/0281 , H05K1/038 , H05K1/189 , H05K2201/10545 , H05K2201/10674 , H05K2203/0108 , Y10T29/4913 , H01L2924/00 , H01L2224/05552
摘要： According to the invention, a substrate, provided with an electrically conductive wire (3) coated with an electrically insulating material, is impregnated with a polymerisable material (4). A reception area (5) for a chip (2) is formed on a surface of the substrate (1) by means of deformation. The reception area (5) is stiffened using the polymerisable material (4). The chip (2) is disposed in the reception area (5) and an electrical connection area (8) of the chip (2) is connected electrically to the electrically conductive wire of the substrate (1).

85. 发明公开

EP2560201A2 Semiconductor packaging structure and method of fabricating the same 有权
标题翻译： Halbleiterverpackungsstruktur und Verfahren zu deren Herstellung
公开(公告)号：EP2560201A2
公开(公告)日：2013-02-20
申请号：EP11194105.0
申请日：2011-12-16
申请人： Unimicron Technology Corp.
发明人： Hu, Dyi-Chung , Hu, Yu-Shan
IPC分类号： H01L23/36 , H01L23/367 , H01L23/538
CPC分类号： H01L23/5389 , H01L23/36 , H01L23/3677 , H01L24/97 , H01L2224/45144 , H01L2224/4824 , H01L2924/01029 , H01L2924/12042 , H01L2924/00015 , H01L2924/00
摘要： A semiconductor packaging structure includes a semiconductor chip, a packaging layer, a dielectric layer, a wiring layer, and a metallic foil. The semiconductor chip has an active surface, an inactive surface opposing the active surface, electrode pads formed on the active surface, and metal bumps formed on the electrode pads. The packaging layer encapsulates the semiconductor chip and exposes the active surface. The dielectric layer is formed on the active surface and a surface of the packaging layer at the same side with the active surface, and has wiring pattern openings for the metal bumps to be exposed therefrom. The wiring layer is formed in the wiring pattern openings. The metallic foil is disposed on the packaging layer adjacent to the inactive surface. Metallic protrusions are formed on the metallic foil, and penetrate the packaging layer to extend to the inactive surface of the semiconductor chip.
摘要翻译：半导体封装结构包括半导体芯片，封装层，电介质层，布线层和金属箔。半导体芯片具有活性表面，与活性表面相对的非活性表面，形成在活性表面上的电极焊盘以及形成在电极焊盘上的金属凸块。包装层封装半导体芯片并暴露活性表面。电介质层在活性表面和与活性表面相同侧的包装层的表面上形成，并且具有用于金属凸块暴露的布线图案孔。布线层形成在布线图形开口中。金属箔设置在与非活性表面相邻的包装层上。在金属箔上形成金属突起，穿透包装层延伸到半导体芯片的非活性表面。

86. 发明公开

EP2548225A2 SYSTEM-IN-PACKAGE USING EMBEDDED-DIE CORELESS SUBSTRATES, AND PROCESSES OF FORMING SAME 有权
标题翻译：与核心系统地段SUBSTRATES挤满了它们的形成嵌入式模具及工艺
公开(公告)号：EP2548225A2
公开(公告)日：2013-01-23
申请号：EP11756940.0
申请日：2011-03-16
申请人： Intel Corporation
发明人： GUZEK, John, S. , NAIR, Vijay
IPC分类号： H01L23/48 , H01L21/60 , H01L23/14
CPC分类号： H01L23/5389 , H01L23/49816 , H01L23/49822 , H01L24/19 , H01L24/48 , H01L2224/04105 , H01L2224/05554 , H01L2224/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/01057 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An apparatus includes a coreless substrate with an embedded die that is integral to the coreless substrate, and at least one device assembled on a surface that is opposite to a ball-grid array disposed on the coreless substrate. The apparatus may include an over-mold layer to protect the at least one device assembled on the surface.

87. 发明授权

EP2316785B1 Structure d'interconnexion à cavité présentant une ou plusieurs remontées de contact sur les parois de la cavité et son procédé de réalisation 失效
标题翻译：具有腔体的壁上的一个或多个上升导体和它们的制备方法腔连接结构
公开(公告)号：EP2316785B1
公开(公告)日：2013-01-09
申请号：EP10189290.9
申请日：2010-10-28
申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： Bolis, Sébastien , Jacquet, Fabrice , Saint-Patrice, Damien
IPC分类号： B81B7/00 , H05K3/40 , H01L23/48 , H01L23/498
CPC分类号： B81B7/0006 , B81B2203/0353 , B81B2207/012 , B81B2207/07 , H01L23/481 , H01L23/5389 , H01L27/14618 , H01L27/14627 , H01L2924/0002 , H05K1/0219 , H05K1/183 , H05K3/403 , H05K3/4697 , H05K2201/09172 , H05K2201/09181 , H05K2201/09645 , H01L2924/00012 , H01L2924/00

89. 发明公开

EP2524394A2 ELEKTRONISCHES BAUTEIL, VERFAHREN ZU DESSEN HERSTELLUNG UND LEITERPLATTE MIT ELEKTRONISCHEM BAUTEIL 有权
标题翻译：电子元件，方法ITS和印刷电路板的电子部件
公开(公告)号：EP2524394A2
公开(公告)日：2012-11-21
申请号：EP11799363.4
申请日：2011-11-24
申请人： Schweizer Electronic AG
发明人： GOTTWALD, Thomas , RÖSSLE, Christian
IPC分类号： H01L23/538
CPC分类号： H05K7/20427 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L2224/04105 , H01L2224/18 , H01L2224/24195 , H01L2224/32245 , H01L2224/73267 , H01L2224/92144 , H01L2224/92244 , H01L2924/01005 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01029 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/12042 , H01L2924/14 , H01L2924/19105 , H05K1/183 , H05K3/30 , H05K2201/066 , Y10T29/4913 , H01L2924/00
摘要： The present invention encompasses an electronic device (50) comprising an electrically conductive core layer (10) with a first layer (16) composed of electrically conductive material, said first layer being applied on both sides, and with at least one electronic component (20) arranged in a cutout (18) of the first layer (16), wherein the first layer (16) is covered in each case with an electrically insulating, thermally conductive layer (34, 36) and a further layer (22, 26) composed of electrically conductive material is provided in each case on the thermally conductive layer (34, 36), said further layer being coated in each case with a covering layer (38) composed of electrically conductive material, and furthermore having plated-through holes (24) composed of the material of the covering layer (38), which extend through the electrically insulating, thermally conductive layer (36) covering the electronic component (20) and the further layer (22) composed of electrically and thermally conductive material for the purpose of making contact with the electronic component (20).

90. 发明授权

EP1895590B1 Electronic component module 有权
标题翻译：一种电子部件模块
公开(公告)号：EP1895590B1
公开(公告)日：2012-10-10
申请号：EP07017037.8
申请日：2007-08-30
申请人： TDK Corporation
发明人： Furukawa, Hirotada , Kikuchi, Toshiaki , Sato, Yutaka , Domon, Takaaki , Kaita, Yoshio
IPC分类号： H01L25/10 , H01L23/538
CPC分类号： H01L23/5389 , H01C1/148 , H01F27/027 , H01F27/292 , H01G2/06 , H01G4/228 , H01G4/248 , H01L23/64 , H01L24/19 , H01L24/20 , H01L25/16 , H01L25/162 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/21 , H01L2224/221 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H05K3/3442 , H05K2201/09472 , H05K2201/10727 , Y02P70/613

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