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    • 90. 发明公开
    • VOLTAGE RATIO REGULATOR SYSTEM
    • VOLTSPANNUNGSREGLERSYSTEM
    • EP1092181A1
    • 2001-04-18
    • EP99912865.5
    • 1999-03-23
    • Candescent Technologies Corporation
    • DUNPHY, James, C.SCHROPP, Donald, R., Jr.
    • G05F1/00
    • G09G3/22G09G2300/043H01J29/028H01J31/127H01J2329/8625H01J2329/864H01J2329/8645
    • A voltage ratio regulator circuit (300) for a spacer electrode (140) of a flat panel display screen. Within one implementation of a field emission display (FED) device (100), thin spacer walls (130) are inserted between a high voltage (Vh) faceplate (120) and a backplate (164) to secure these structures are a vacuum is formed between. The faceplate (120) warms relative to the backplate (164) as a result of energy released by a phosphor layer, thereby generating a temperature gradient along the spacer walls (130). The top portion of each spacer wall (130) becomes more conductive with increased temperature and acts to attract electrons that are emitted toward the faceplate (120). To counter this attraction, a spacer electrode (140) is placed along each spacer wall (130) at a height, d, above the backplate (164) and maintained at a voltage, Ve. The spacer electrode (140) at Ve and the high voltage supply (250) at Vh are both coupled to a voltage ratio regulator circuit (300) which maintains the ratio (Ve/Vh) using voltage dividers (R1, R2, R10 and R11, R3), an operational amplifier (310) and other circuitry. The voltage ratio regulator (300) compensates for variations in voltage supply performance. The time constants (R1, C1 and R3, C3) of the voltage ratio regulator circuit (300) is tuned to be near or slightly faster than the time constant of the inherent resistance (RW1, RW2) and capacitance (CW1, CW2) of the spacer wall (130). The invention improves the electron path accuracy for pixels located near spacer walls.