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81. 发明授权

EP1164455B1 Procédé et dispositif de génération d'un courant indépendant de la température 有权
标题翻译：用于产生与温度无关的电流的方法和设备
公开(公告)号：EP1164455B1
公开(公告)日：2006-05-31
申请号：EP00202059.2
申请日：2000-06-13
申请人： EM Microelectronic-Marin SA
发明人： Descombes, Arthur
IPC分类号： G05F3/24
CPC分类号： G05F3/242

82. 发明公开

EP1624358A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：EP1624358A1
公开(公告)日：2006-02-08
申请号：EP04731468.7
申请日：2004-05-06
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Kimura, H., Semiconductor Energy Lab. Co., Ltd.
IPC分类号： G05F3/24
CPC分类号： G09G3/3233 , G05F3/242 , G09G2300/0809 , G09G2300/0833 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2320/0295 , G09G2320/043
摘要： A semiconductor device in which a transistor can supply an accurate current to a load (EL pixel and signal line) without being influenced by variations is provided.
A voltage at each terminal of a transistor is adjusted by a feedback circuit using an amplifier circuit. A current Idata is input from a current source circuit to the transistor, and a gate-source voltage is set by the feedback circuit so that the transistor can flow the current Idata. The feedback circuit controls the transistor to operate in a saturation region. Thus, a gate voltage required for flowing the current Idata is set.
With the use of the set transistor, a current can be supplied to a load (EL pixel and signal line) with accuracy. Note that a desired gate voltage can be set quickly since the amplifier circuit is utilized.
摘要翻译：提供一种半导体器件，其中晶体管能够向负载（EL像素和信号线）提供精确的电流而不受变化的影响。通过使用放大器电路的反馈电路来调整晶体管的每个端子处的电压。电流Idata从电流源电路输入到晶体管，栅极 - 源极电压由反馈电路设置，使得晶体管可以流过电流Idata。反馈电路控制晶体管工作在饱和区。因此，设定流过电流Idata所需的栅极电压。通过使用设定的晶体管，可以精确地将电流提供给负载（EL像素和信号线）。请注意，由于使用了放大器电路，因此可以快速设置所需的栅极电压。

83. 发明公开

EP1380913A1 Régulateur de tension linéaire 有权
标题翻译：线人Spannungsregler
公开(公告)号：EP1380913A1
公开(公告)日：2004-01-14
申请号：EP03300056.3
申请日：2003-07-09
申请人： ST MICROELECTRONICS S.A.
发明人： Pons, Alexandre , Bernard, Christophe
IPC分类号： G05F3/24
CPC分类号： G05F3/242 , G05F1/56 , G05F3/247 , G05F3/262
摘要： L'invention concerne un régulateur linéaire comportant un étage de sortie (31) comprenant des premier et second transistors MOS à canal P (32, 33), connectés en série entre une première borne d'alimentation continue (Vdd) et une borne de sortie (OUT) fournissant une tension de sortie régulée (Vout), et un circuit de commande (35) des premier et second transistors propre à leur fournir des premier et second signaux de commande en fonction de la tension de sortie et de la tension au point milieu (MID) de la connexion en série.
摘要翻译：线性调节器（30）具有用于提供负载（1）和平滑电容器（11）的控制单元（35）和输出电路（31）。输出电路由提供输出端（OUT）的两个MOS晶体管（32,33）组成，并由来自控制单元的输入/输出级（36）的与其栅极（G1，G2）的连接控制。输入/输出级使用参考单元（37）和输出电路进行调节的数据

84. 发明公开

EP1364458A2 PROTECTION CIRCUIT FOR EXTENDING HEADROOM WITH OFF-CHIP INDUCTORS 有权
标题翻译：保护电路用于与所述半导体管芯的OUTSIDE导入ADVANCED DYNAMICS
公开(公告)号：EP1364458A2
公开(公告)日：2003-11-26
申请号：EP01959834.1
申请日：2001-07-26
申请人： Broadcom Corporation
发明人： BURNS, Lawrence, M. , DAUPHINEE, Leonard
IPC分类号： H03F1/52 , H03F3/45
CPC分类号： H03G3/3068 , G05F3/242 , H03F3/211 , H03F3/72 , H03F2203/21191 , H03F2203/7227 , H03G3/001 , H03G3/3042
摘要： A protection circuit for extending the dynamic range of an amplifier circuit is described. Off-chip impedances, such as inductors, cause the output of the circuit to swing above and below the bias voltage. A protection circuit is included, either on chip or off-chip, to protect the integrated circuit components if there is a fault condition in either of the off-chip impedances.

85. 发明授权

EP1065580B1 Voltage regulating circuit for a capacitive load 有权
标题翻译：电压调节器，用于电容性负载
公开(公告)号：EP1065580B1
公开(公告)日：2003-11-12
申请号：EP99830418.2
申请日：1999-06-30
申请人： STMicroelectronics S.r.l.
发明人： Khouri, Osama , Micheloni, Rino , Motta, Ilaria , Torelli, Guido
IPC分类号： G05F3/02 , G05F1/56 , G05F3/26 , H02J7/16
CPC分类号： G05F3/242

86. 发明公开

EP1290695A2 GENERATOR SCHEME AND CIRCUIT FOR OVERCOMING RESISTIVE VOLTAGE DROP ON POWER SUPPLY CIRCUITS ON CHIPS 有权
标题翻译：发电机方案及电路供应高压电路的筹码压降补偿
公开(公告)号：EP1290695A2
公开(公告)日：2003-03-12
申请号：EP01950304.4
申请日：2001-06-14
申请人： Infineon Technologies North America Corp.
发明人： WEINFURTNER, Oliver
IPC分类号： G11C5/14
CPC分类号： G05F3/242
摘要： Apparatus is used to dynamically control the power output of generators (16A-16H) of a generator system on a chip (10) to load circuits on the chip. A power bus (14) is directed along at least one 'spine' section (18) on the chip which may intersect with at least one 'arm' section (19) on the chip for supplying power from the generators, which are coupled to the power bus in the 'spine' section thereof, to the load circuits on the chip. The power bus has a feedback lead (32) from each end which is remote from the generators for providing a continuous measurement of a voltage drop occurring at each remote end. At least one detector circuit (100) is located at a predetermined point adjacent the generators of the chip for comparing a voltage from the generators measured at the predetermined point with the concurrent voltage drop measured at an associated remote end. In response to such comparison, the at least one detector circuit generates control signals (BOOST and SPEED) for transmission to the generators for altering a generated voltage to maintain a predetermined power level on the power bus in response to load changes caused by the circuits on the chip.

87. 发明公开

EP1126523A2 Soi-type semiconductor device with variable threshold voltages 失效
标题翻译： Halbleiteranordnung vom SOI-Typ mitveränderlichenSchwellwert-Spannungen
公开(公告)号：EP1126523A2
公开(公告)日：2001-08-22
申请号：EP00127529.6
申请日：1996-01-26
申请人： NEC CORPORATION
发明人： Okumura, Koichiro , Kurosawa, Susumu
IPC分类号： H01L27/02 , H01L27/12
CPC分类号： H01L27/1203 , G05F3/242 , H01L27/0218 , H01L29/78615 , H03K19/0016 , H03K2217/0018 , Y10S257/901 , Y10T307/615
摘要： In an SOI-type semiconductor device, a power supply voltage (V DD ) is applied to back gates of P-channel MOS transistors in a standby mode, and a voltage lower than the power supply voltage is applied to the back gates of the P-channel MOS transistors in an active mode. A ground voltage (GND) is applied to back gates of N-channel MOS transistors in the standby mode, and a voltage higher than the ground voltage is applied to the back gates of the N-channel MOS transistors in an active mode.
摘要翻译：在SOI型半导体器件中，在待机状态下，对P沟道MOS晶体管的背栅施加电源电压（VDD），将低于电源电压的电压施加到P- 通道MOS晶体管处于活动模式。在待机模式下，对N沟道MOS晶体管的背栅施加接地电压（GND），并且在主动模式下，将高于接地电压的电压施加到N沟道MOS晶体管的背栅极。

88. 发明公开

EP1125179A1 CURRENT MEASURING TECHNIQUES 审中-公开
标题翻译：电流测量技术
公开(公告)号：EP1125179A1
公开(公告)日：2001-08-22
申请号：EP99958730.6
申请日：1999-11-01
申请人： Volterra Semiconductor Corporation
发明人： STRATAKOS, Anthony , BURNSTEIN, Andrew, J. , LIDSKY, David, B. , NYGUYEN, Phong , CLARK, William
IPC分类号： G05F1/10
CPC分类号： G01R19/0092 , G05F3/242
摘要： A sensor for measuring a current passing through a load (134). The sensor has a power transistor (132) having a first terminal connected to a substantially constant voltage (133) and a second terminal connected to the load. The sensor can sample a voltage difference with a variable capacitor (152), and a controller (160) can be configured to cause a variable capacitor in the current sensor to have a capacitance inversely proportional to a resistance of the power transistor, whereby a charge stored on the variable capacitor is proportional to the current passing through the power transistor when the sampling switches (151) are opened. A comparator (28) can compare the current through the power transistor to a known reference to generate a digital output signal. The sensor can include a power transistor (14), reference transistor (24) and an amplifier (28) connected and configured so as to generate a signal on a reference line having a current of known proportion to the current passing through the load.

89. 发明授权

EP0720296B1 Buffer circuit and bias circuit 失效
标题翻译：缓冲电路和偏置电路
公开(公告)号：EP0720296B1
公开(公告)日：2001-08-16
申请号：EP95308445.6
申请日：1995-11-24
申请人： Oki Electric Industry Co., Ltd.
发明人： Tanabe, Tetsuya, Oki Electric Industry Co., Ltd , Tanio, Satoru, Oki Electric Industry Co., Ltd
IPC分类号： H03K19/003 , G05F3/24 , G05F3/20
CPC分类号： G05F3/242 , G05F3/24 , H03K19/00384 , H03K19/018528

90. 发明公开

EP0945774A1 Reference voltage generation circuit providing a stable output voltage 有权
标题翻译： Bezugsspannungs发电机稳定器Ausgangs-Spannung
公开(公告)号：EP0945774A1
公开(公告)日：1999-09-29
申请号：EP99106053.4
申请日：1999-03-25
申请人： NEC CORPORATION
发明人： Kobatake, Hiroyuki
IPC分类号： G05F3/16
CPC分类号： G05F3/262 , G05F3/242
摘要： A reference voltage generation circuit includes a first current mirror (CM1) including first through third transistors (P1, P2, P3) with the second transistor (P2) on a reference side thereof, a second current mirror (CM4) including fourth and fifth transistors (N1, N2) connected in series with the first and the second transistors (P1, P2), respectively, and a voltage control block (Vsd1, Vsd2) for controlling the source-drain voltages the transistors (P1, P3) on the output side of the first current mirror (CM1). The voltage control block includes a first control block (Vsd1) having a configuration similar to the first current mirror (CM1), and a second control block (Vsd2) having a configuration similar to the second current mirror (CM4), both of which are connected between the first current mirror (CM1) and the second current mirror (CM2), with corresponding transistors connected in series. A stable output voltage can be obtained irrespective of variations in the potential of the voltage source (Vdd) for the reference voltage generation circuit.
摘要翻译：参考电压产生电路包括第一电流镜（CM1），其第一至第三晶体管（P1，P2，P3）与其参考侧上的第二晶体管（P2）相连，第二电流镜（CM4）包括第四和第五晶体管分别与第一和第二晶体管（P1，P2）串联连接的电压控制块（N1，N2）和用于控制源极 - 漏极电压的电压控制块（Vsd1，Vsd2）输出的晶体管（P1，P3）侧的第一电流镜（CM1）。电压控制块包括具有类似于第一电流镜（CM1）的配置的第一控制块（Vsd1）和具有类似于第二电流镜（CM4）的配置的第二控制块（Vsd2），它们都是连接在第一电流镜（CM1）和第二电流镜（CM2）之间，其中相应的晶体管串联连接。可以获得稳定的输出电压，而不管参考电压产生电路的电压源的电位（Vdd）的变化如何。

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