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    • 31. 发明公开
    • Apparatus and method for channel interleaving in communications system
    • 欧洲共同体系统中的Vorrichtung und Verfahren zur Kanalverschachtelung
    • EP2214317A1
    • 2010-08-04
    • EP10159363.0
    • 2006-05-09
    • Qualcomm Incorporated
    • BHUSHAN, Naga
    • H03M13/00H03M13/03G11C29/00
    • H03M13/2771H03M13/271H03M13/2725H03M13/2957H03M13/6306H03M13/6381H04L1/0066H04L1/1819
    • An apparatus and method for interleaving systematic bits and parity bits to generate an output sequence that can be transmitted in multi-slot packets from a base station to a remote station in a wireless communication system. The apparatus comprises a memory element and a control element coupled to the memory element, wherein the control element is configured to demultiplex the systematic bits and parity bits into sequences, wherein the systematic bits and parity bits are sequentially distributed among the sequences. The control element is further configured to reorder the sequences and to form matrices from the reordered sequences based on an index set. Further, the control element is configured to permute the matrices forming a juxtaposed matrix having segments, columns, and elements and to interleave the columns. The control element is also configured to modulate the elements in the segments of the juxtaposed matrix and to truncate the modulated elements in the segments of the juxtaposed matrix, so as to produce the output sequence which comprises truncated modulating elements from the segments of the juxtaposed matrix.
    • 一种用于交织系统比特和奇偶校验比特的装置和方法,以生成可在无线通信系统中从基站到远程站的多时隙分组中传输的输出序列。 该装置包括存储元件和耦合到存储器元件的控制元件,其中控制元件被配置为将系统位和奇偶校验位解复用为序列,其中系统位和奇偶校验位顺序地分布在序列之间。 控制元件还被配置为基于索引集合对序列重新排序并从重新排序的序列形成矩阵。 此外,控制元件被配置为置换形成具有段,列和元素的并置矩阵并且交错列的矩阵。 控制元件还被配置为调制并置矩阵的段中的元素并截断并置矩阵的段中的调制元素,以便产生输出序列,其包括来自并置矩阵的段的截短的调制元素 。