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    • 32. 发明公开
    • Epitaxial substrate for electronic device and method of producing the same
    • Epitaxialsubstratfüreine elektronische Vorrichtung und Verfahren zur Herstellung davon
    • EP2613341A1
    • 2013-07-10
    • EP13001425.1
    • 2009-11-18
    • DOWA Electronics Materials Co., Ltd.
    • Ikuta, TetsuyaShimizu, JoShibata, Tomohiko
    • H01L21/20H01L21/205H01L21/338H01L29/778H01L29/812H01L29/737H01L21/02H01L29/66H01L29/20
    • H01L21/0254H01L21/02381H01L21/02458H01L21/02505H01L21/02507H01L29/2003H01L29/66462H01L29/7378
    • An object of the present invention is to provide an epitaxial substrate for an electronic device, in which a lateral direction of the substrate is defined as a main current conducting direction and a warp configuration of the epitaxial substrate is adequately controlled, as well as a method of producing the epitaxial substrate. Specifically, the epitaxial substrate for an electron device, including: a Si single crystal substrate; and a Group III nitride laminated body formed by epitaxially growing plural Group III nitride layers on the Si single crystal substrate, wherein a lateral direction of the epitaxial substrate is defined as a main current conducting direction, is characterized in that the Si single crystal substrate is a p-type substrate having a specific resistance value of not larger than 0.01 Ω · cm, the epitaxial substrate further comprises a buffer as an insulating layer between the Si single crystal substrate and the Group III nitride laminated body, and the buffer includes a lamination constituted of a superlattice multilayer structure containing carbon at a concentration of 1 × 10 18 /cm 3 or more.
    • 本发明的目的是提供一种用于电子器件的外延衬底,其中将衬底的横向方向定义为主导电方向,并且外延衬底的翘曲构型被充分地控制,以及一种方法 制造外延衬底。 具体地,电子装置用外延基板,包括:Si单晶基板; 以及通过在Si单晶衬底上外延生长多个III族氮化物层而形成的III族氮化物层叠体,其中外延衬底的横向被定义为主导电方向,其特征在于,Si单晶衬底是 具有比电阻值不大于0.01Ω的p型衬底,所述外延衬底还包括作为所述Si单晶衬底和所述III族氮化物层压体之间的绝缘层的缓冲器,并且所述缓冲器包括层压 由含有浓度为1×10 18 / cm 3以上的碳的超晶格多层结构构成。
    • 36. 发明公开
    • III NITRIDE SEMICONDUCTOR VERTICAL-TYPE-STRUCTURE LED CHIP AND PROCESS FOR PRODUCTION THEREOF
    • III-NITRIDHALBLEITER-LED-CHIP MIT VERTIKALER STRUKTUR UND VERFAHREN ZU SEINER HERSTELLUNG
    • EP2498303A1
    • 2012-09-12
    • EP09851114.0
    • 2009-11-05
    • Wavesquare Inc.DOWA Electronics Materials Co., Ltd.
    • CHO, Meoung WhanLEE, Seog WooJANG, Pil GukTOBA, RyuichiTOYOTA, TatsunoriKADOWAKI, Yoshitaka
    • H01L33/00
    • H01L33/32H01L33/0079H01L33/62H01L2924/0002H01L2933/0066H01L2924/00
    • High quality vertical LED chips with less cracks in the light emitting structures and a method for manufacturing the same are provided. The method includes a light emitting laminate formation step of forming a light emitting laminate by sequentially stacking a first conductivity type Group III nitride semiconductor layer, a light emitting layer, and a second conductivity type Group III nitride semiconductor layer on a growth substrate, the second conductivity type being different from the first conductivity type; a light emitting structure formation step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a connection layer on the plurality of light emitting structures; a step of forming a conductive support which also serves as a lower electrode on the connection layer; a separation step of lifting off the growth substrate from the plurality of light emitting structures; and a cutting step of cutting the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. The light emitting structure formation step includes a step of partially removing the light emitting laminate such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon ("n" is a positive integer) having rounded corners.
    • 提供了在发光结构中具有较少裂纹的高品质垂直LED芯片及其制造方法。 该方法包括通过在生长衬底上依次层叠第一导电型III族氮化物半导体层,发光层和第二导电型III族氮化物半导体层来形成发光层叠体的发光层压体形成步骤,第二 导电类型不同于第一导电类型; 发光结构形成步骤,通过部分去除所述发光层压体以部分地暴露所述生长衬底来形成多个分离的发光结构; 在所述多个发光结构上形成连接层的步骤; 在连接层上形成还用作下电极的导电支撑件的步骤; 从多个发光结构剥离生长衬底的分离步骤; 以及切割步骤,在所述发光结构之间切割所述导电支撑体,由此分割具有所述发光结构的多个LED芯片。 发光结构形成步骤包括以下步骤:部分去除发光层压体,使得多个发光结构中的每一个具有圆形的顶视图形状或具有圆形的4n-gon(“n”为正整数) 角落。
    • 39. 发明公开
    • Electrophotographic developer carrier core material, electrophotographic developer carrier, methods of manufacturing the same, and electrophotographic developer
    • 载体芯材的电子照相显影剂,电子照相显影剂用载体,其制备方法和电子照相显影剂的处理
    • EP2439594A1
    • 2012-04-11
    • EP12000034.4
    • 2006-09-25
    • DOWA IP Creation Co., Ltd.DOWA Electronics Materials Co., Ltd.
    • Nakao, RyusukeKawauchi, Takeshi
    • G03G9/107G03G9/10G03G9/113
    • G03G9/1075G03G9/10G03G9/1136
    • The present invention provides a carrier core material for use in the production of an electrophotographic developer which, even when applied, for example, to MFPs (multifunction printers), can realize stable, high-quality and high-speed development, and has a prolonged replacing life of magnetic carriers, and a method of manufacturing the same, a magnetic carrier including the carrier core material, and an electrophotographic developer manufactured from the magnetic carrier. An electrophotographic development carrier is prepared by adding resin particles, a binder, a dispersant, a wetting agent, and water to a raw material powder, wet pulverizing the mixture, drying the pulverized product to give granulated powder, calcinatng the granulated powder, and then sintering the granulated powder to prepare a carrier core material having an internally hollow structure, and coating the carrier core material with a resin. An electrophotographic developer is manufactured by mixing the electrophotographic development carrier with a toner.
    • 本发明提供的载体芯材料,在生产的电子照相显影剂其中,即使当应用于例如,至的MFP(多功能打印机),可实现稳定的高品质和高速发展的用途,并且具有延长的 替换磁性载体的使用寿命,和制造方法,磁性载体包括载体芯材的方法,以及向电从磁性载体制造的照相显影剂。 然后在电子照相显影载体是通过将树脂颗粒,粘合剂,分散剂,湿润剂和水到原料粉末制备,湿法粉碎该混合物,干燥所述粉碎的产物,得到粒化粉末,calcinatng的粒化粉末,以及 烧结所述造粒粉末,以制备具有在内部中空结构的载体芯材,和用树脂涂覆载体芯材料。 一种电子照相显影剂通过电子照相显影载体与调色剂混合来制造。
    • 40. 发明公开
    • EPITAXIAL SUBSTRATE FOR ELECTRONIC DEVICE AND PROCESS FOR PRODUCING SAME
    • 香港特别行政区基地
    • EP2432005A1
    • 2012-03-21
    • EP10774710.7
    • 2010-05-10
    • DOWA Electronics Materials Co., Ltd.
    • IKUTA, TetsuyaSHIMIZU, JoSHIBATA, TomohikoSAKAMOTO, RyoITO, Tsuneo
    • H01L21/338H01L21/205H01L29/778H01L29/812
    • H01L29/207H01L21/02378H01L21/02458H01L21/02488H01L21/02507H01L21/0254H01L29/1075H01L29/155H01L29/2003H01L29/7786
    • To provide an epitaxial substrate for electronic devices which can improve vertical breakdown voltage in a Group III nitride electronic device on a conductive SiC single crystal substrate, and to provide a method of producing the same.
      The epitaxial substrate for an electronic device comprises a conductive SiC single crystal substrate, a buffer as an insulating layer on the SiC single crystal substrate, and a main laminate formed by epitaxially growing a plurality of Group III nitride layers on the buffer; and a lateral direction is a current flow direction. Further, the buffer includes at least an initial growth layer in contact with the SiC single crystal substrate and a superlattice laminate having a superlattice multi-layer structure on the initial growth layer. The initial growth layer is made of a B a1 Al b1 Ga c1 In d1 N (0 ≤ a 1 ≤ 1, 0 1 ≤ 1, 0 ≤ c 1 ≤ 1, 0 ≤ d 1 ≤ 1, a 1 + b 1 + c 1 + d 1 = 1) material. Furthermore, the superlattice laminate is configured by alternately stacking a first layer made of a B a2 Al b2 Ga c2 In d2 N (0 ≤ a 2 ≤ 1, 0 ≤ b 2 ≤ 1, 0 ≤ c 2 ≤ 1, 0 ≤ d 2 ≤ 1, a 2 + b 2 + c 2 + d 2 = 1) material and a second layer made of a B a3 Al b3 Ga c3 In d3 N (0 ≤ a 3 ≤ 1, 0 ≤ b 3 ≤ 1, 0 ≤ c 3 ≤ 1, 0 ≤ d 3 1, a 3 + b 3 + c 3 + d 3 = 1) material having a different band gap from the first layer. Characteristically, at least one of the superlattice laminate and a portion of the main laminate on the buffer side has a C concentration of 1 × 10 18 /cm 3 or more.
    • 为了提供能够改善导电SiC单晶衬底上的III族氮化物电子器件中的垂直击穿电压的电子器件的外延衬底,并提供其制造方法。 用于电子器件的外延衬底包括导电SiC单晶衬底,在SiC单晶衬底上作为绝缘层的缓冲层,以及通过在缓冲器上外延生长多个III族氮化物层而形成的主层压体; 并且横向是电流流动方向。 此外,缓冲器至少包括与SiC单晶衬底接触的初始生长层和在初始生长层上具有超晶格多层结构的超晶格层压体。 初始生长层由B a1 Al b1 Ga c1 In d1 N(0‰¤a 1‰¤1,0