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1. 发明授权

US5719642A Full-search block matching motion estimation processor 失效
标题翻译：全搜索块匹配运动估计处理器
公开(公告)号：US5719642A
公开(公告)日：1998-02-17
申请号：US646054
申请日：1996-05-07
申请人： Chen-Yi Lee
发明人： Chen-Yi Lee
IPC分类号： H04N7/26 , H04N7/24
CPC分类号： H04N19/433
摘要： A full-search block matching motion estimation processor includes a memory management unit for buffering search data of a (2P+N).times.(2P+N) search area, and a processor element array unit. The search area is divided into rows of the search data, and the memory management unit has N output bus lines and sequentially outputs the rows of the search data at the output bus lines. The processor element array unit includes an array of processor elements, each of which has at least one reference data input, at least one search data input connected to one of the search data inputs of the processor elements on the same row of the array and further connected to one of the output bus lines of the memory management unit, a partial sum output, and a partial sum input connected to the partial sum output of a preceding one of the processor elements on the same row of the array. Each of the processor elements includes at least one calculating unit for calculating a mean absolute difference between reference data at one of the reference data inputs and the search data at a corresponding one of the search data inputs, and an adder for adding the mean absolute difference from the calculating units to an input partial sum present at the partial sum input thereof so as to provide an output partial sum at the partial sum output thereof.
摘要翻译：全搜索块匹配运动估计处理器包括用于缓冲（2P + N）×（2P + N）个搜索区域的搜索数据的存储器管理单元和处理器单元阵列单元。搜索区域被划分为搜索数据的行，并且存储器管理单元具有N个输出总线，并且在输出总线上顺序地输出搜索数据的行。处理器元件阵列单元包括处理器元件阵列，每个处理器元件具有至少一个参考数据输入，至少一个搜索数据输入连接到阵列的同一行上的处理器元件的搜索数据输入之一，并且还连接到存储器管理单元的输出总线之一，部分和输出和连接到阵列的同一行上的前一个处理器元件的部分和输出的部分和输入。每个处理器元件包括至少一个计算单元，用于计算参考数据输入之一处的参考数据与相应的一个搜索数据输入端的搜索数据之间的平均绝对差;以及加法器，用于将平均绝对差从计算单元到其部分和输入存在的输入部分和，以便在其部分和输出处提供输出部分和。

2. 发明授权

US5610873A Address generator for generating a plurality of addresses to be used in zig-zag scanning of contents of memory array 失效
标题翻译：地址发生器，用于产生要用于存储器阵列内容的锯齿形扫描的多个地址
公开(公告)号：US5610873A
公开(公告)日：1997-03-11
申请号：US619206
申请日：1996-03-21
申请人： Chen-Yi Lee
发明人： Chen-Yi Lee
IPC分类号： G11C8/00 , G11C8/04
CPC分类号： G11C8/00 , G11C8/04
摘要： An address generator includes an up/down counter driven by a clock to generate a varying output, an increment counter driven by the clock to generate an incrementing output, and a comparator comparing the varying output and the incrementing output and generating a comparing output. A first register is used for storing an initial address therein. A second register is capable of storing a plurality of step size values therein. The second register is connected electrically to the comparator to receive the comparing output and to the up/down counter to receive a least significant bit of the varying output. The second register outputs one of the step size values according to combination of the comparing output and the least significant bit of the varying output. An adder is connected electrically to the registers and generates a new address equal to a sum of the initial address and one of the step size values. The new address is to be stored in the first register so as to replace the initial address in the first register. A scan number detecting unit controls the up/down counter to generate the varying output in a first counting direction or in a second counting direction opposite to the first counting direction.
摘要翻译：地址发生器包括由时钟驱动以产生变化的输出的上/下计数器，由时钟驱动以产生递增输出的增量计数器，以及比较变化输出和递增输出并产生比较输出的比较器。第一寄存器用于存储初始地址。第二寄存器能够在其中存储多个步长值。第二寄存器电连接到比较器以接收比较输出和上/下计数器以接收变化输出的最低有效位。根据比较输出和变化输出的最低有效位的组合，第二个寄存器输出一个步长值。加法器电连接到寄存器，并产生等于初始地址和步长值之一的和的新地址。新地址将被存储在第一个寄存器中，以便替换第一个寄存器中的初始地址。扫描号码检测单元控制向上/向下计数器在第一计数方向或与第一计数方向相反的第二计数方向上产生变化的输出。

3. 发明授权

US5475327A Variable impedance circuit 失效
标题翻译：可变阻抗电路
公开(公告)号：US5475327A
公开(公告)日：1995-12-12
申请号：US342351
申请日：1994-11-18
申请人： Jieh-Tsong Wu , Wei-Zen Chen
发明人： Jieh-Tsong Wu , Wei-Zen Chen
IPC分类号： H03H11/24 , H03H11/46 , H03L5/00
CPC分类号： H03H11/46 , H03H11/24
摘要： A variable impedance circuit includes a differential circuit, an impedance element, a variable current attenuator and a pair of level shifters. The differential circuit includes a transistor pair with a pair of input terminals, a pair of output terminals, and a pair of emitters. The impedance element is connected between the emitters of the transistor pair. The variable current attenuator has a pair of input terminals connected respectively to the output terminals of the transistor pair, a pair of output terminals, and a pair of control inputs for receiving a control voltage to vary the current gain of the variable current attenuator. Each of the level shifters has an input terminal connected to a respective one of the output terminals of the variable current attenuator, and an output terminal connected to a respective one of the input terminals of the transistor pair. The level shifters ensure that the transistor pair and the variable current attenuator are properly biased. When the current gain of the variable current attenuator is varied, an impedance measured across the output terminals of the variable current attenuator is correspondingly varied.
摘要翻译：可变阻抗电路包括差分电路，阻抗元件，可变电流衰减器和一对电平移位器。差分电路包括具有一对输入端子，一对输出端子和一对发射极的晶体管对。阻抗元件连接在晶体管对的发射极之间。可变电流衰减器具有一对输入端子，分别连接到晶体管对的输出端子，一对输出端子和一对控制输入端，用于接收控制电压以改变可变电流衰减器的电流增益。每个电平移位器具有连接到可变电流衰减器的输出端的相应一个的输入端子和连接到晶体管对的相应一个输入端子的输出端子。电平转换器确保晶体管对和可变电流衰减器被正确偏置。当可变电流衰减器的电流增益变化时，在可变电流衰减器的输出端上测量的阻抗相应地变化。

4. 发明授权

US5783248A Process for producing a bioceramic composite material containing natural bone material on an alumina substrate 失效
标题翻译：在氧化铝基板上生产含天然骨料的生物陶瓷复合材料的方法
公开(公告)号：US5783248A
公开(公告)日：1998-07-21
申请号：US519935
申请日：1995-08-28
申请人： Ruey-Mo Lin , Nan-Chung Wu , Kuang-Hsing Liu
发明人： Ruey-Mo Lin , Nan-Chung Wu , Kuang-Hsing Liu
IPC分类号： A61L27/36 , A61L27/42 , C04B35/117 , C04B35/622 , C04B37/00 , C04B41/50 , C04B41/87 , B05D3/00
CPC分类号： A61L27/3691 , A61L27/3608 , A61L27/365 , A61L27/425 , C04B35/117 , C04B35/62222 , C04B37/005 , C04B41/009 , C04B41/5048 , C04B41/87 , C04B2111/00637 , C04B2111/00836 , C04B2237/06 , C04B2237/343 , C04B2237/363 , C04B2237/704 , C04B2237/708
摘要： A process is provided for producing a bioceramic composite in which an alumina based ceramic substrate is coated with an intermediate calcium pyrophosphate layer to cement a porous calcium phosphate material to the alumina based ceramic substrate. In one aspect of the invention, the porous calcium phosphate material is a porous lattice made from natural bone. A bioceramic composite which includes an alumina-based ceramic substrate, an intermediate calcium pyrophosphate layer and a porous natural bone material bonded to the intermediate calcium pyrophosphate layer is also disclosed.
摘要翻译：提供了一种用于生产生物陶瓷复合材料的方法，其中用氧化铝基陶瓷基材涂覆有中间焦磷酸钙层以将多孔磷酸钙材料粘结到氧化铝基陶瓷基材上。在本发明的一个方面，多孔磷酸钙材料是由天然骨制成的多孔晶格。还公开了一种生物陶瓷复合材料，其包括氧化铝基陶瓷基体，中间焦磷酸钙层和结合到中间焦磷酸钙层的多孔天然骨材料。

5. 发明授权

US5734290A Charge pumping circuit having cascaded stages receiving two clock signals 失效
标题翻译：具有级联级的电荷泵浦电路接收两个时钟信号
公开(公告)号：US5734290A
公开(公告)日：1998-03-31
申请号：US616882
申请日：1996-03-15
申请人： Kuen-Long Chang , Jieh-Tsorng Wu
发明人： Kuen-Long Chang , Jieh-Tsorng Wu
IPC分类号： H02M3/07 , G05F1/10
CPC分类号： H02M3/073
摘要： A charge pumping circuit includes a plurality of cascaded voltage gain circuit stages. Each circuit stage has an switching transistor with a source connected electrically to a drain of the transistor of an immediately succeeding one of the circuit stages, and a gate connected electrically to the source of the transistor of the immediately succeeding one of the circuit stages, and a capacitor. The capacitor of odd ones of the circuit stages is connected electrically across a first clock and the source of the transistor of the respective circuit stage. The capacitor of even ones of the circuit stages is connected electrically across a second clock, which is out of phase with the first clock, and the source of the transistor of the respective circuit stage. An output transistor has a drain connected electrically to the source of the transistor of a last voltage gain circuit stage, a source serving as an output terminal of the charge pumping circuit, and a gate connected electrically to the drain of the output transistor. An output capacitor is connected electrically across the source of the output transistor and the first clock when the total number of the voltage gain circuit stages is an even number and across the source of the output transistor and the second clock when the total number of the voltage gain circuit stages is an odd number.
摘要翻译：电荷泵浦电路包括多个级联的电压增益电路级。每个电路级具有开关晶体管，其源极电连接到紧接着的一个电路级的晶体管的漏极，以及电连接到紧接着的一个电路级的晶体管的源极的栅极，以及一个电容器。电路级的奇数电容器在第一时钟和相应电路级的晶体管的源极之间电连接。电路级的偶数电容器与第一个时钟不相位的第二个时钟和相应电路级晶体管的源极电连接。输出晶体管具有与最后的电压增益电路级的晶体管的源极电连接的漏极，用作电荷泵浦电路的输出端的源极和与输出晶体管的漏极电连接的栅极。当输出晶体管的总数和电压增益电路级的总数为偶数并且跨越输出晶体管的源极和第二时钟时，输出电容器电连接在输出晶体管的源极和第一时钟上，增益电路级是奇数。

6. 发明授权

US5582540A Hydrostatic and hydrodynamic polishing tool 失效
标题翻译：静压和流体动力抛光工具
公开(公告)号：US5582540A
公开(公告)日：1996-12-10
申请号：US589194
申请日：1996-01-22
申请人： Yaw-Terng Su , Chuen-Chyi Horng , Jiunn-Ji Wu , Jia-Yang Zhang
发明人： Yaw-Terng Su , Chuen-Chyi Horng , Jiunn-Ji Wu , Jia-Yang Zhang
IPC分类号： B24B37/16 , B24B37/26 , B24D13/14 , B24D13/18 , B24B1/00
CPC分类号： B24B37/16 , B24B37/26
摘要： A polishing tool includes a tool body and a polishing member which is mounted rotatably on the tool body and which has a central hole unit formed through the polishing member. The working surface of the polishing member has a plurality radially extending slots which are spaced apart from each other in an angularly equidistant relation and which extend from the inner periphery of the working surface to the outer periphery of the working surface. A plurality of flat working surface sections are defined on the working surface of the polishing member by the slots. When a slurry consisting of a lubricating liquid and abrasive grains flows onto the working surface of the polishing member via the central hole unit and when the polishing member is rotated on the tool body, each of the abrasive grains moves across all of the slots and from the inner periphery of the working surface to the outer periphery of the working surface, by hydrodynamic effect, so as to polish positively and effectively the workpiece.
摘要翻译：抛光工具包括工具主体和抛光构件，其被可旋转地安装在工具主体上，并且具有通过抛光构件形成的中心孔单元。抛光构件的工作面具有多个径向延伸的槽，它们以角度等距离的关系彼此间隔开并且从工作表面的内周延伸到工作表面的外周。多个平坦的工作表面部分通过狭槽限定在抛光部件的工作表面上。当由润滑液和磨粒组成的浆料经由中心孔单元流到抛光构件的工作表面上时，并且当抛光构件在工具体上旋转时，每个磨粒移动穿过所有槽和从通过流体动力学效应，工作面的内周面到工作面的外周，从而有效地抛光工件。

7. 发明授权

US5671238A Method and circuitry for generating r-bit parallel CRC code for an l-bit data source 失效
标题翻译：用于为1位数据源生成r位并行CRC码的方法和电路
公开(公告)号：US5671238A
公开(公告)日：1997-09-23
申请号：US550574
申请日：1995-10-31
申请人： Kim-Joan Chen , Ching-Long Chang
发明人： Kim-Joan Chen , Ching-Long Chang
IPC分类号： H03M13/09 , H03M13/29 , H03M13/00
CPC分类号： H03M13/091 , H03M13/29
摘要： A method for generating r-bit parallel CRC code for a data source grouped into at least one successive p-bit parallel data group and a q-bit parallel data group is disclosed. The number q is less than the number p. The method includes the steps of: providing a data processing unit which has an output side and an input side that is adapted to receive successively the p-bit and q-bit parallel data groups, the processing unit reflecting one of the p-bit parallel data groups at the input side to the output side when the p-bit parallel data group is present at the input side, the processing unit adding a bit string to the q-bit parallel data group such that sum of the number q and number of bits in the bit string is equal to the number p, the processing unit presenting the q-bit parallel data group and the bit string at the output side when the q-bit parallel data group is present at the input side; providing a binary output generating unit which operates in response to data at the output side to produce an r-bit parallel initial CRC code according to a predefined generating polynomial function; and providing a code correcting unit which receives the r-bit parallel initial CRC code from the generating unit and which operates in response to the parallel initial CRC code to produce an r-bit parallel final CRC code according to a predefined code correcting function.
摘要翻译：公开了一种用于为分组成至少一个连续的p位并行数据组和q位并行数据组的数据源产生r位并行CRC码的方法。数字q小于数字p。该方法包括以下步骤：提供一个数据处理单元，该数据处理单元具有适于连续接收p位和q位并行数据组的输出侧和输入端，该处理单元反映p位并行当在输入侧存在p位并行数据组时，在输出侧的输入侧的数据组，处理单元向q位并行数据组添加位串，使得数字q和数量的和比特串中的比特数等于数字p，当q比特并行数据组存在于输入侧时，表示q比特并行数据组的处理单元和输出侧的比特串; 提供二进制输出生成单元，其响应于输出侧的数据进行操作，以根据预定义的生成多项式函数产生r位并行初始CRC码; 并提供代码校正单元，其从所述生成单元接收所述r位并行初始CRC码，并且响应于所述并行初始CRC码操作以根据预定义的代码校正功能产生r位并行最终CRC码。

8. 发明授权

US5843736A Prevention of viral infection by the induction of apoptosis and/or the use of an antiviral gene, hem1 失效
标题翻译：通过诱导凋亡来预防病毒感染和/或使用抗病毒基因，hem1
公开(公告)号：US5843736A
公开(公告)日：1998-12-01
申请号：US249617
申请日：1994-05-26
申请人： Yu-Chan Chao
发明人： Yu-Chan Chao
IPC分类号： A61K38/00 , C07K14/01 , C12N15/113 , C12N15/00 , C12N5/00
CPC分类号： C12N15/1131 , C07K14/005 , A61K38/00 , C12N2330/10 , C12N2710/14122
摘要： Disclosed is a new, effective and general methodology to prevent viral infection, which methodology is divided into two parts: 1) induction of the apoptosis (programmed cell death) of a host upon viral infection to block viral reproduction; and 2) the use of an apoptosis triggering gene, the persistency-associated gene 1 (pag1, now renamed as hem1 in light of the position thereof in the restriction map of the Hz-1 viral genome) to prevent the viral infection.
摘要翻译：披露了一种新的有效和一般的方法来预防病毒感染，该方法分为两部分：1）诱导宿主在病毒感染后的凋亡（程序性细胞死亡）以阻断病毒繁殖; 和2）使用凋亡触发基因，持续性相关基因1（pag1，现在根据其在Hz-1病毒基因组的限制性图谱中的位置改名为hem1）以防止病毒感染。

9. 发明授权

US5712112A Gene expression system comprising the promoter region of the alpha-amylase genes 失效
标题翻译：包含α-淀粉酶基因启动子区的基因表达系统
公开(公告)号：US5712112A
公开(公告)日：1998-01-27
申请号：US343380
申请日：1994-11-22
申请人： Su May Yu , Li Fei Liu , Ming Tsair Chan
发明人： Su May Yu , Li Fei Liu , Ming Tsair Chan
IPC分类号： C12N15/29 , C12N15/56 , C12N15/82 , C12N15/84 , C12P21/06 , C12N5/00 , C12N15/00 , C12P21/02
CPC分类号： C12N15/8222 , C12N15/8234 , C12N15/8238
摘要： The present invention is directed to a method for producing a gene product by expressing a gene encoding the gene product in angiosperm host cells, comprising the steps of constructing a vector expressible in angiosperm host cells, the vector comprising a promoter region derived from an .alpha.-amylase gene of a plant, and a gene encoding a desired gene product; transforming a compatible angiosperm host cell with the vector; cultivating the resultant transformant host cell; subjecting the cultivated transformant host cell to a sugar-depleted or sugar-free condition to promote the expression of the gene under the control of the promoter region; and recovering the expressed gene product. The present invention also is directed to a method for the production of a transgenic plant of rice crop comprising the steps of infecting an immature embryo of rice crop with the genus Agrobacterium for transformation; co-culturing the infected embryo with a dicot suspension culture during the step of transformation; allowing the transformed embryo to grow into a callus in a selective medium comprising a sufficient amount of a plant growth hormone for the growth of rice crop; and allowing the cultured callus to regenerate root and shoot in a regeneration medium comprising a pre-determined amount of nutrients for the growth of rice crop. The invention is further directed to a transformed rice plant made by methods of this invention.
摘要翻译：本发明涉及通过在被子植物宿主细胞中表达编码基因产物的基因来产生基因产物的方法，包括以下步骤：构建被子植物宿主细胞中可表达的载体，所述载体包含衍生自α- 植物的淀粉酶基因和编码所需基因产物的基因; 用载体转化相容的被子植物宿主细胞; 培养所得转化体宿主细胞; 对培养的转化体宿主细胞进行糖消化或无糖条件以促进基因在启动子区域控制下的表达; 并回收表达的基因产物。本发明还涉及一种用于生产水稻作物转基因植物的方法，包括用农杆菌感染水稻作物未成熟胚的转化步骤; 在转化步骤期间用双子叶悬浮培养物共同培养感染的胚胎; 使得转化的胚胎在包含足够量的用于水稻作物生长的植物生长激素的选择培养基中生长成愈伤组织; 并且允许培养的愈伤组织在包含用于水稻作物生长的预定量的营养物质的再生培养基中再生根和芽。本发明进一步涉及通过本发明的方法制备的转化水稻植物。

10. 发明授权

US5506538A Vector summation device 失效
标题翻译：矢量求和装置
公开(公告)号：US5506538A
公开(公告)日：1996-04-09
申请号：US433837
申请日：1995-05-04
申请人： Shen-Iuan Liu
发明人： Shen-Iuan Liu
IPC分类号： G06G7/20 , G06G7/22 , G06G7/16
CPC分类号： G06G7/22 , G06G7/20
摘要： A vector summation device includes a squaring circuit for receiving a number of input voltage signals, and a square-root circuit having first and second current terminals connected electrically to the squaring unit. The squaring circuit receives first and second current signals respectively from the first and second current terminals of the square-root circuit. The difference between the current values of the first and second current signals is proportional to the sum of the squares of the voltage values of the input voltage signals. The square-root circuit generates an output voltage signal with a voltage value that is proportional to the square-root of the difference between the current values of the first and second current signals.
摘要翻译：矢量求和装置包括用于接收多个输入电压信号的平方电路，以及具有与平方单元电连接的第一和第二电流端子的平方根电路。平方电路分别从平方根电路的第一和第二电流端接收第一和第二电流信号。第一和第二电流信号的电流值的差异与输入电压信号的电压值的平方和成正比。平方根电路产生具有与第一和第二电流信号的电流值之间的差的平方根成比例的电压值的输出电压信号。

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