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    • 1. 发明申请
    • AUTOMATED CALIBRATION OF TEMPERATURE SENSORS IN RAPID THERMAL PROCESSING
    • 温度传感器在快速热处理中的自动校准
    • WO1997003342A1
    • 1997-01-30
    • PCT/US1996011545
    • 1996-07-10
    • CVC PRODUCTS, INC.
    • CVC PRODUCTS, INC.MOSLEHI, Mehrdad, M.LEE, Yong, Jin
    • G01K15/00
    • G01K1/146G01J5/10G01J5/522G01K15/00
    • An automatic calibration system (10) and method for calibration of a substrate temperature sensor (21) in a thermal processing system (20). The calibration system (10) includes a temperature probe (15) associated with the substrate temperature sensor (21) to be calibrated and an actuator (19) to position the temperature probe (15) relative to the substrate (97) during a calibration cycle. The actuator (19) and temperature probe (15) can be incorporated into the thermal processing system (20) in order to maintain the thermal processing system cleanliness and integrity during a calibration cycle, and to allow rapid automated calibration. In the preferred embodiment, the temperature probe (15) and the actuator (19) are implemented in the gas showerhead assembly (98) of a rapid thermal processing system (20).
    • 一种用于在热处理系统(20)中校准基板温度传感器(21)的自动校准系统(10)和方法。 校准系统(10)包括与要校准的衬底温度传感器(21)相关联的温度探测器(15)和在校准循环期间相对于衬底(97)定位温度探针(15)的致动器(19) 。 致动器(19)和温度探头(15)可以被结合到热处理系统(20)中,以便在校准周期期间保持热处理系统的清洁度和完整性,并允许快速的自动校准。 在优选实施例中,温度探测器(15)和致动器(19)被实现在快速热处理系统(20)的气体喷头组件(98)中。
    • 2. 发明申请
    • APPARATUS AND METHOD FOR ELECTROPLATING A MATERIAL LAYER ONTO A WAFER
    • 将材料层电镀到波浪上的装置和方法
    • WO0114618A3
    • 2001-07-26
    • PCT/US0022312
    • 2000-08-14
    • CVC PRODUCTS INC
    • PARANJPE AJIT PMOSLEHI MEHRDAD M
    • C25D7/12
    • C25D17/001C25D7/123
    • An apparatus and method for electroplating a material layer onto a wafer is disclosed. The apparatus comprises a wafer support for maintaining a wafer within an electrolyte solution during electroplating. A probe, proximate the wafer support, receives an electrical current and is operable to electrically couple to the wafer. An anode comprising the material is proximate the wafer support. An anode source is electrically coupled to the anode. The anode source induces electrical current between the wafer and the anode by providing a potential difference to the anode such that the anode is positively charged relative to the wafer. A current controller varies the induced electrical current as the material is deposited upon the wafer.
    • 公开了一种用于将材料层电镀到晶片上的装置和方法。 该装置包括用于在电镀期间将晶片保持在电解质溶液内的晶片支撑件。 靠近晶片支架的探头接收电流并且可操作以电耦合到晶片。 包括该材料的阳极靠近晶片支撑。 阳极源电耦合到阳极。 阳极源通过向阳极提供电位差使得阳极相对于晶片呈正电荷而在晶片和阳极之间引起电流。 当材料沉积在晶片上时,电流控制器改变感应的电流。
    • 3. 发明申请
    • METHOD FOR PLANARIZED DEPOSITION OF A MATERIAL
    • 材料平面沉积的方法
    • WO0063966A3
    • 2001-04-05
    • PCT/US0008676
    • 2000-03-30
    • CVC PRODUCTS INC
    • MOSLEHI MEHRDAD M
    • H01L21/768
    • H01L21/76879H01L21/7688
    • A method for selective deposition of a material, such as copper, to form planarized inlaid device interconnect structures. Once a formation is filled with metallization material, deposition is automatically ceased in situ to form a globally planarized interconnect structure. In one embodiment, a blocking agent layer inhibits material nucleation and deposition at the substrate surface plane until the formation is filled, and then flows over the filled inlaid metallization structure to cease further material deposition and to form a planarized surface without a need for chemical-mechanical polishing. In another embodiment, an enhancement agent is provided within formations to reduce material nucleation time, resulting in selective deposition of the material proximate to the enhancement agent layer within trenches and holes. A nucleation suppressing agent can be included in the deposition ambient to increase nucleation delay and to suppress material deposition over the patterned field regions and on the formation sidewalls.
    • 用于选择性沉积诸如铜的材料以形成平坦化的镶嵌器件互连结构的方法。 一旦地层填充有金属化材料,就会自动停止沉积,以形成一个全局平面化的互连结构。 在一个实施方案中,阻挡剂层抑制基材表面平面处的材料成核和沉积,直到形成被填充,然后流过填充的镶嵌金属化结构以停止进一步的材料沉积并形成平坦化表面,而不需要化学 - 机械抛光。 在另一个实施方案中,在地层内提供增强剂以减少材料成核时间,导致材料在沟槽和孔内靠近增强剂层的选择性沉积。 成核抑制剂可以包括在沉积环境中以增加成核延迟并抑制在图案化的场区域和形成侧壁上的材料沉积。
    • 6. 发明申请
    • APPARATUS AND METHOD FOR MULTI-ZONE HIGH-DENSITY INDUCTIVELY-COUPLED PLASMA GENERATION
    • 多区高密度电感耦合等离子体发生装置及方法
    • WO1998001893A1
    • 1998-01-15
    • PCT/US1997012243
    • 1997-07-09
    • CVC PRODUCTS, INC.
    • CVC PRODUCTS, INC.MOSLEHI, Mehrdad, M.
    • H01L21/00
    • H01J37/321
    • A multi-zone high-density inductively-coupled plasma source includes a first individually controlled RF antenna segment for producing a plasma from a process gas. A second individually controlled coil segment is included in the ICP source for producing a plasma from a process gas. In various embodiments, more than two sets of individually controlled coil segments may be used. In one embodiment, a separate power supply may be used for each coil segment individually. Another aspect of this invention is a hermetically-sealed inductively-coupled plasma source structure and method of fabrication which eliminates the possibility of process contamination, improves the source hardware reliability and functionality, and improves the vacuum integrity and ultimate base pressure of the plasma system.
    • 多区高密度感应耦合等离子体源包括用于从工艺气体产生等离子体的第一单独控制的RF天线段。 ICP源中包括第二个单独控制的线圈段,用于从工艺气体产生等离子体。 在各种实施例中,可以使用多于两组的单独控制的线圈段。 在一个实施例中,单独的电源可以单独用于每个线圈段。 本发明的另一方面是密封的电感耦合等离子体源结构和制造方法,其消除了工艺污染的可能性,提高了源硬件的可靠性和功能性,并提高了等离子体系统的真空完整性和最终的基础压力。