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1. 发明授权

US4468710A Digital video recorder 失效
标题翻译：数字录像机
公开(公告)号：US4468710A
公开(公告)日：1984-08-28
申请号：US252086
申请日：1981-04-08
申请人： Yoshitaka Hashimoto , Kaichi Yamamoto , Norihisa Shirota
发明人： Yoshitaka Hashimoto , Kaichi Yamamoto , Norihisa Shirota
IPC分类号： H04N5/928 , G11B20/10 , G11B20/12 , G11B20/18 , H03M13/00 , H04N5/92 , H04N5/926 , H04N9/808 , H04N5/91
CPC分类号： H04N9/8088 , G11B20/1809 , H04N5/9268 , H04N9/808
摘要： A digital video and audio data recording and/or reproducing apparatus includes a plurality of rotary magnetic heads provided in association with a tape guide drum assembly having a periphery about which a magnetic tape is helically transported at a predetermined wrap angle, a time compressing circuit for time compressing digitized audio and video data, a multiplexing circuit for mixing the digitized audio and video data to form a mixed signal, a processing circuit for processing the mixed signal, and a signal distributing circuit for supplying the processed mixed signal to each of the rotary magnetic heads so that the latter record the processed mixed signal on the magnetic tape.
摘要翻译：一种数字视频和音频数据记录和/或再现装置包括多个旋转磁头，该旋转磁头与带引导鼓组件相关联地设置，该导带鼓组件具有围绕磁带以预定的包角螺旋输送的周边;时间压缩电路，时间压缩数字化音频和视频数据，用于混合数字化音频和视频数据以形成混合信号的复用电路，用于处理混合信号的处理电路，以及用于将经处理的混合信号提供给每个旋转的信号分配电路磁头，使后者将经处理的混合信号记录在磁带上。

2. 发明授权

US4364081A Method and apparatus for processing a digital color video signal 失效
标题翻译：用于处理数字彩色视频信号的方法和装置
公开(公告)号：US4364081A
公开(公告)日：1982-12-14
申请号：US254851
申请日：1981-04-16
申请人： Yoshitaka Hashimoto , Norihisa Shirota , Kaichi Yamamoto
发明人： Yoshitaka Hashimoto , Norihisa Shirota , Kaichi Yamamoto
IPC分类号： G11B20/18 , H04N9/00
CPC分类号： G11B20/1813
摘要： A method for processing a digital color video signal formed of 8-bit words, includes the recording steps of converting each 8-bit word into a 10-bit word in accordance with a predetermined mapping function, grouping the 10-bit words into 48 word blocks, adding to each block an identification signal, identification signal check words P.sub.1 and Q.sub.1, and data check words P.sub.2 and Q.sub.2, the latter being formed by the equations: ##EQU1## where T.sup.-1, T.sup.-2, . . . T.sup.-(n-1), T.sup.-n, T.sup.1, T.sup.2, . . . T.sup.n-1, T.sup.n are distinct, non-zero elements of a Galois field (2.sup.m); and includes the reproducing steps of reconverting each of the 10-bit words to its corresponding 8-bit word in accordance with the predetermined mapping function with the reconverted 8-bit words forming a data unit for each 12 words thereof and a data block for each 48 words thereof, detecting whether any of the 8-bit words contain an error by failing to satisfy the mapping function reconversion, determining that each data unit that includes an 8-bit word having an error is erroneous, detecting and correcting any errors in the identification signals by means of the identification signal check words P.sub.1 and Q.sub.1, determining whether each erroneous data block and data unit is capable of being corrected and concealing each erroneous data unit that is determined to be uncorrectable and correcting errors in the 8-bit words in each erroneous data block and data unit that is determined to be correctable, by means of the data check words P.sub.2 and Q.sub.2 and parity words, respectively, thereby forming a continuous, composite digital color video signal, and correcting the phase of the color sub-carrier of each data unit of the composite digital color video signal by comparison of a reference signal with the identification signal of the block to which each respective data unit belongs.
摘要翻译：一种用于处理由8位字形成的数字彩色视频信号的方法，包括根据预定的映射函数将每个8位字转换成10位字的记录步骤，将10位字分组成48字块，向每个块添加识别信号，识别信号检查词P1和Q1，以及数据检查词P2和Q2，后者由以下等式形成：其中T-1，T-2，...。。。 T（n-1），T-n，T1，T2。。。 Tn-1，Tn是伽罗瓦域（2m）的不同零非零元素; 并且包括根据预定映射函数将10位字中的每一个重新转换为其对应的8位字的再现步骤，其中重新转换的8位字形成每12个字的数据单元，以及每个12位的数据块 48字，通过不能满足映射功能再转换来检测8位字中是否含有错误，确定包含具有错误的8位字的每个数据单元是错误的，检测和校正任何错误通过识别信号检查词P1和Q1识别信号，确定每个错误的数据块和数据单元是否能够被校正并隐藏被确定为不可校正的每个错误数据单元，并且修正8位字中的错误分别通过数据检查词P2和Q2和奇偶校验字来确定被确定为可校正的每个错误数据块和数据单元，从而形成连续的复合数字彩色视频信号，并且通过将参考信号与各个数据单元所属的块的识别信号进行比较来校正复合数字彩色视频信号的每个数据单元的彩色副载波的相位。

3. 发明授权

US4463387A Digital video data recording apparatus 失效
标题翻译：数字视频数据记录装置
公开(公告)号：US4463387A
公开(公告)日：1984-07-31
申请号：US254741
申请日：1981-04-16
申请人： Yoshitaka Hashimoto , Kaichi Yamamoto , Norihisa Shirota
发明人： Yoshitaka Hashimoto , Kaichi Yamamoto , Norihisa Shirota
IPC分类号： H04N5/7826 , H04N5/92 , H04N9/802 , H04N9/808 , H04N9/491 , G11B5/02 , G11B5/09 , H04N5/78
CPC分类号： H04N5/9201 , H04N5/78266 , H04N9/802 , H04N9/808
摘要： A digitized video data recording and/or reproducing system comprises a plurality of rotary magnetic heads are disposed on a rotary tape guide drum on the periphery of which a magnetic tape is helically transported at a predetermined wrap angle. A signal processing circuit divides a digitized video signal such that each horizontal scan interval thereof contains a plurality of data blocks, and a signal distributing circuit distributes the blocks of the digitized video data sequentially to the magnetic heads, so that every nth block of each horizontal scan interval is distributed to a respective one of the heads, where n is an even integer. Preferably, there are eight blocks in each horizontal scan interval, and every fourth block is distributed to a respective head.
摘要翻译：数字化视频数据记录和/或再现系统包括多个旋转磁头，其设置在旋转磁带引导鼓上，周边以预定的包角螺旋形地传送磁带。信号处理电路将数字化视频信号分割成其每个水平扫描间隔包含多个数据块，并且信号分配电路将数字化视频数据的块顺序地分配给磁头，使得每个水平的每第n个块扫描间隔被分配给相应的一个磁头，其中n是偶数整数。优选地，在每个水平扫描间隔中存在八个块，并且每个第四块被分配到相应的头。

4. 发明授权

US4429334A Method for recording and reproducing a digital color video signal 失效
标题翻译：用于记录和再现数字彩色视频信号的方法
公开(公告)号：US4429334A
公开(公告)日：1984-01-31
申请号：US194830
申请日：1980-10-07
申请人： Yoshitaka Hashimoto , Norihisa Shirota , Kaichi Yamamoto
发明人： Yoshitaka Hashimoto , Norihisa Shirota , Kaichi Yamamoto
IPC分类号： H04N9/808 , H04N9/873 , H04N9/877 , H04N5/91
CPC分类号： H04N9/808 , H04N9/873 , H04N9/877
摘要： A method for recording a color video signal in a plurality of parallel tracks extending obliquely on a magnetic tape includes the steps of sampling the video signal at a frequency which is at least three times the color sub-carrier frequency of the color video signal, converting the sampled video signal into digital form, and recording respective pluralities of the digitized samples which are arranged in a predetermined sequence sequentially in the plurality of parallel tracks, by either recording respective pluralities of contiguous digitized samples sequentially in the tracks, in which each plurality corresponds to at least one cycle of the color sub-carrier, or by alternately separating contiguous ones of the digitized samples into first and second blocks and recording respective pluralities of successive digitized samples of the first and second blocks sequentially in the tracks with the sampling frequency being equal to four times the color sub-carrier frequency, such that the chrominance component of the digital color video signal can be separated during reproduction so as to correct any error in the phase of the color sub-carrier, and such that with the first embodiment of the last-mentioned step, a digital filter having a chrominance characteristic C=(1-Z.sup. -2)/2 can be used, and with the method according to the second embodiment, a fourth order digital filter having a chrominance characteristic C=(-1=2Z.sup.-2 -Z.sup.-4)/2 can be used to reproduce the chrominance component, where Z is a delay transfer characteristic of the respective filters.
摘要翻译：用于在彩色视频信号的彩色副载波频率的至少三倍的频率上对视频信号进行采样的方法，用于在彩色视频信号的彩色副载波频率的至少三倍的频率上对视频信号进行采样，将采样的视频信号转换为数字形式，并且通过在轨道中顺序地记录多个连续的数字化样本来记录以预定顺序排列在多个并行轨道中的相应多个数字化样本，到彩色副载波的至少一个周期，或者通过将数字化样本中的相邻的样本交替地分离成第一和第二块，并且以采样频率为单位，在第一和第二块中顺序地记录第一和第二块的相应多个连续数字化采样等于颜色副载波频率的四倍，使得chr 在再现期间可以分离数字彩色视频信号的偶极分量，以便校正彩色副载波的相位中的任何误差，并且使得在最后提到的步骤的第一实施例中，具有色度特性的数字滤波器可以使用C =（1-Z -2）/ 2，并且根据第二实施例的方法，具有色度特性C =（ - 1 = 2Z-2-Z-4）/ 2的四阶数字滤波器可以用于再现色度分量，其中Z是相应滤波器的延迟传递特性。

5. 发明授权

US5341385A Method and apparatus for decoding Reed-Solomon code 失效
标题翻译：用于解码里德 - 所罗门码的方法和装置
公开(公告)号：US5341385A
公开(公告)日：1994-08-23
申请号：US950779
申请日：1992-09-24
申请人： Norihisa Shirota
发明人： Norihisa Shirota
IPC分类号： H03M13/03 , H03M13/15 , H03M13/00
CPC分类号： H03M13/151 , H03M13/033
摘要： A decoding method of Reed-Solomon code produces an error position polynomial .sigma.(x) and an error evaluation polynomial .omega.(x) by a Euclidean algorithm, whereby a syndrome polynomial S(x) is obtained, the highest degrees of the syndrome polynomial S(x) and of an initial polynomial x.sup.2t, which is determined by the number t of symbols to be corrected, are multiplied, while the degree is incrementally reduced, thereby obtaining polynomials h(x) and g(x) that satisfy the relation:f(x).multidot.B(x)+g(x).multidot.S(x)=h(x)(where the degree of h(x) is less than the degree of g(x).ltoreq.t). The polynomial g(x) is set to the error position polynomial .sigma.(x), and the polynomial h(x) is set to the error evaluation polynomial .omega.(x), thereby performing the decoding by real time processing.
摘要翻译： Reed-Solomon码的解码方法通过欧几里德算法产生误差位置多项式σ（x）和误差评估多项式ω（x），从而得到校正子多项式S（x），校正子多项式S （x）和由要校正的符号数t确定的初始多项式x2t相乘，同时递减地减小程度，从而获得满足以下关系的多项式h（x）和g（x）： f（x）xB（x）+ g（x）xS（x）= h（x）（其中h（x）的程度小于g（x）的程度

6. 发明授权

US5416615A Digital data transmitting apparatus 失效
标题翻译：数字数据发送装置
公开(公告)号：US5416615A
公开(公告)日：1995-05-16
申请号：US951083
申请日：1992-09-25
申请人： Norihisa Shirota
发明人： Norihisa Shirota
IPC分类号： H03M7/30 , G06T9/00 , H04N1/41 , H04N19/102 , H04N19/126 , H04N19/134 , H04N19/136 , H04N19/14 , H04N19/149 , H04N19/172 , H04N19/196 , H04N19/423 , H04N19/46 , H04N19/463 , H04N19/50 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/62 , H04N19/625 , H04N19/65 , H04N19/70 , H04N19/91 , H04N7/30
CPC分类号： H04N19/132 , H04N19/126 , H04N19/176 , H04N19/46 , H04N19/60 , H04N19/124 , H04N19/13 , H04N19/146 , H04N19/149 , H04N19/15 , H04N19/91
摘要： A digital data transmitting apparatus comprises: an original block forming circuit for extracting image data in horizontal direction and/or vertical direction at intervals of a predetermined number of samples and forming an original block consisting of (n.times.n) pixel data; a differential block forming circuit for forming a differential block consisting of (m.times.m) pixel data with differential data between adjacent pixel data in horizontal and/or vertical direction and the pixel data concerned; a coding circuit for transform coding the original block and the differential block, respectively; a flag generation circuit for transmitting meaningful data of coefficient data generated by transform coding the differential block and generating a flag representing omission of the transmission of coefficient data where there is no meaningful data; and a transmission circuit for transmitting the flag and the pixel data of each of the block.
摘要翻译：数字数据发送装置包括：原始块形成电路，用于以预定数量的采样的间隔在水平方向和/或垂直方向上提取图像数据，并形成由（n×n）像素数据组成的原始块; 差分块形成电路，用于形成由水平和/或垂直方向上的相邻像素数据之间的差分数据的像素数据（m×m）组成的差分块和与之相关的像素数据; 分别对原始块和差分块进行变换编码的编码电路; 标志产生电路，用于发送通过对差分块进行变换编码产生的系数数据的有意义的数据，并产生表示省略不存在有意义的数据的系数数据的传输的标志; 以及发送电路，用于发送每个块的标志和像素数据。

7. 发明授权

US4376290A Color video information processing apparatus 失效
标题翻译：彩色视频信息处理装置
公开(公告)号：US4376290A
公开(公告)日：1983-03-08
申请号：US197567
申请日：1980-10-16
申请人： Norihisa Shirota
发明人： Norihisa Shirota
IPC分类号： H04N9/804 , H04N5/92 , H04N9/808 , H04N9/873 , H04N9/877 , H04N9/888 , H04N5/76
CPC分类号： H04N9/888 , H04N9/873 , H04N9/877
摘要： In apparatus for processing color video information composed of a color video signal having luminance and chrominance components and a respective identifying signal which identifies a phase of the chrominance component, for example, by indicating the frame, field and/or line of which the respective color video signal is a part; the color video signal and respective identifying signal are temporarily stored in a memory and, when the color video signal and the respective identifying signal are simultaneously read out of the memory, a comparison is made between the read-out identifying signal and a corresponding reference or read request signal, and at least the phase of the chrominance component of the read-out color video signal is controlled on the basis of such comparison. In the case where a line of the read-out color video signal is indicated by its respective identifying signal to be of a field which is different from the read request field defined by the then occurring reference or read request signal so that it would be spatially displaced from the corresponding line of the read request field, the value of at least the luminance component in the read-out line is replaced by an interpolated value derived from values of the luminance component in the lines adjacent the read-out line. When a PAL color video signal is being processed, absolute values of color difference signals are derived, for certain sampling points where such color difference signals do not appear, by interpolation of the values for such color difference signals from adjacent sampling points.
摘要翻译：在用于处理由具有亮度和色度分量的彩色视频信号组成的彩色视频信息的处理装置中，以及用于标识色度分量的相位的各个识别信号，例如通过指示相应颜色的帧，场和/或行视频信号是一部分; 彩色视频信号和相应的识别信号被临时存储在存储器中，并且当彩色视频信号和相应的识别信号被同时从存储器中读出时，比较读出的识别信号和相应的参考信号读取请求信号，并且基于这样的比较来控制读出的彩色视频信号的色度分量的至少相位。在读出的彩色视频信号的一行由其相应的识别信号指示为与由当时出现的参考或读取请求信号定义的读取请求字段不同的字段的情况下，使得它将在空间上从读取请求字段的相应行移位，至少读出行中的亮度分量的值由从与读出行相邻的行中的亮度分量的值导出的内插值代替。当正在处理PAL彩色视频信号时，通过对来自相邻采样点的这种色差信号的值进行插值，对于不出现这种色差信号的某些采样点，导出色差信号的绝对值。

8. 发明授权

US5524264A Parallel arithmetic-logic processing device 失效
标题翻译：并行算术逻辑处理装置
公开(公告)号：US5524264A
公开(公告)日：1996-06-04
申请号：US209105
申请日：1994-03-09
申请人： Norihisa Shirota , Yasunobu Kato , Noboru Oya
发明人： Norihisa Shirota , Yasunobu Kato , Noboru Oya
IPC分类号： G06F15/80 , G06F15/76
CPC分类号： G06F15/8015
摘要： A parallel arithmetic-logical processing device in which arithmetic-logical processing is shared among and executed in a parallel fashion by a plurality of processing elements. The device includes a large-capacity serial access memory for continuous reading/writing of large-scale data, a small-capacity serial access memory for continuous reading/writing of small-scale data and a high-speed general-purpose random access memory for random writing/readout of small-scale data. A central processing unit (CPU) causes the memories to be used or not used depending on the scale of the arithmetic-logical processing. Since the serial access memory executes continuous data writing and reading, high-speed access may be achieved, so that it can be manufactured inexpensively with a large storage capacity. Consequently, the processing speed in the CPU may be increased, while the parallel arithmetic-logical processing device may be manufactured inexpensively.
摘要翻译：一种并行算术逻辑处理装置，其中算术逻辑处理由多个处理元件以并行方式共享并执行。该设备包括用于连续读/写大规模数据的大容量串行存取存储器，用于连续读/写小规模数据的小容量串行存取存储器以及高速通用随机存取存储器随机写入/读出小规模数据。中央处理单元（CPU）根据算术逻辑处理的规模使存储器被使用或不被使用。由于串行访问存储器执行连续数据写入和读取，所以可以实现高速访问，从而可以以大的存储容量廉价地制造。因此，可以增加CPU中的处理速度，而可以廉价地制造并行算术逻辑处理装置。

9. 发明授权

US5023710A Highly efficient coding apparatus 失效
标题翻译：高效编码设备
公开(公告)号：US5023710A
公开(公告)日：1991-06-11
申请号：US602477
申请日：1990-10-24
申请人： Tetsujiro Kondo , Michio Nagai , Norihisa Shirota
发明人： Tetsujiro Kondo , Michio Nagai , Norihisa Shirota
IPC分类号： H04N5/92 , H03M7/30 , H03M7/40 , H04N5/783 , H04N5/926 , H04N19/00 , H04N19/115 , H04N19/13 , H04N19/132 , H04N19/136 , H04N19/137 , H04N19/149 , H04N19/176 , H04N19/186 , H04N19/196 , H04N19/423 , H04N19/46 , H04N19/587 , H04N19/59 , H04N19/60 , H04N19/65 , H04N19/66 , H04N19/70 , H04N19/85 , H04N19/89 , H04N19/895 , H04N19/91 , H04N19/98
CPC分类号： H04N5/9261 , H04N19/89 , H04N19/98 , H04N5/783
摘要： A highly efficient coding apparatus is configured to divide a digital picture signal into picture blocks and, based on a signal from a coding circuit for performing variable-length coding of each picture block, generate an output signal in the form of serial sync blocks. By inserting the most significant bit of a coded output signal for each picture element in a predetermined position of each sync block, a reproduced picture is obtained in a picture search mode in which a magnetic head scans a video tape across a plurality of tracks.

10. 发明授权

US4677499A Digital time base corrector 失效
标题翻译：数字时基校正器
公开(公告)号：US4677499A
公开(公告)日：1987-06-30
申请号：US721658
申请日：1985-04-10
申请人： Norihisa Shirota , Takao Yamazaki , Seiichiro Iwase
发明人： Norihisa Shirota , Takao Yamazaki , Seiichiro Iwase
IPC分类号： G11B20/10 , A63F7/02 , G11B20/18 , H03K5/00 , H03K5/13 , H04N5/92 , H04N5/95 , H03K5/14
CPC分类号： H03K5/131 , G11B20/18 , H04N5/95 , H03K2005/00241
摘要： There is provided a digital time base corrector in which a digital input signal of one block consisting of a continuous data time sequence is converted to a digital signal including data lack intervals or vice versa by a variable delay circuit. A signal selecting circuit is divided into N first unit selecting circuits and a second unit selecting circuit. M of the output signals of a shift register are inputted to the first unit selecting circuits, by which one of them is selected. The outputs of the N first unit selecting circuits are supplied to the second unit selecting circuit, by which one of them is selected. A pipeline process is performed by inserting a delay circuit to delay the signal for the time of one clock period into the input/output line of the second unit selecting circuit. Further, the selecting signal can be made variable for every one clock and a delay circuit is inserted on the output side of a selecting signal forming circuit. With this corrector, the influence of the gate delay of the selectors can be reduced and the high speed data process can be performed.
摘要翻译：提供了一种数字时基校正器，其中由连续数据时间序列组成的一个块的数字输入信号通过可变延迟电路被转换为包括数据缺少间隔或反之亦然的数字信号。信号选择电路被分为N个第一单元选择电路和第二单元选择电路。移位寄存器的输出信号的M被输入到第一单元选择电路，通过它们中的一个被选择。 N个第一单位选择电路的输出被提供给第二单元选择电路，由此选择其中一个。通过插入延迟电路来执行一个时钟周期时间的信号到第二单元选择电路的输入/输出线中的流水线处理。此外，可以使选择信号每一个时钟变化，并且在选择信号形成电路的输出侧插入延迟电路。利用该校正器，可以减小选择器的门延迟的影响，并且可以执行高速数据处理。

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