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1. 发明授权

US07754562B2 Semiconductor device comprising capacitor and method of fabricating the same 失效
公开(公告)号：US07754562B2
公开(公告)日：2010-07-13
申请号：US12368606
申请日：2009-02-10
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L21/336
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.

2. 发明授权

US06194758B1 Semiconductor device comprising capacitor and method of fabricating the same 失效
标题翻译：包括电容器的半导体器件及其制造方法
公开(公告)号：US06194758B1
公开(公告)日：2001-02-27
申请号：US09095612
申请日：1998-06-11
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L27108
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： Obtained are a semiconductor device which can be implemented with high density of integration while ensuring a constant capacitor capacitance in high reliability and a method of fabricating the same. The semiconductor device, including a memory cell region and a peripheral circuit region, comprises an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode is formed in the memory cell region to upwardly extend beyond the upper surface of the insulating film on the major surface of the semiconductor substrate. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. The upper surface of the insulating film is located between the top surface and the bottom surface of the capacitor lower electrode part.
摘要翻译：获得的是可以以高可靠性确保恒定的电容器电容并实现高集成度的半导体器件及其制造方法。包括存储单元区域和外围电路区域的半导体器件包括形成在半导体衬底的主表面上以从存储单元区域延伸到外围电路区域的上表面的绝缘膜。在存储单元区域中形成电容器下电极，以向上延伸超过半导体衬底的主表面上的绝缘膜的上表面。电容器上电极通过电介质膜形成在电容器下电极上，延伸到绝缘膜的上表面。电容器下电极包括具有顶表面和底表面的电容器下电极部分。绝缘膜的上表面位于电容器下电极部的顶表面和底表面之间。

3. 发明申请

US20110001177A1 SEMICONDUCTOR DEVICE COMPRISING CAPACITOR AND METHOD OF FABRICATING THE SAME 有权
标题翻译：包含电容器的半导体器件及其制造方法
公开(公告)号：US20110001177A1
公开(公告)日：2011-01-06
申请号：US12880574
申请日：2010-09-13
申请人： Yoshinori TANAKA , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori TANAKA , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L27/108
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.
摘要翻译：具有存储单元区域和外围电路区域的半导体器件包括绝缘膜，其具有形成在半导体衬底的主表面上以从存储器单元区域延伸到外围电路区域的上表面。电容器下电极组件形成在存储单元区域中，以向上延伸到与半导体衬底的主表面上的绝缘膜的上表面大致相同的高度。此外，下电极组件包括通过绝缘膜相邻的第一和第二下电极。电容器上电极通过电介质膜形成在电容器下电极上，延伸到绝缘膜的上表面。电容器下电极包括具有顶表面和底表面的电容器下电极部分。如上所述组织的半导体器件允许具有高集成度的实现，同时确保电容器具有高可靠性和恒定的电容。

4. 发明申请

US20060128095A1 Semiconductor device comprising a highly-reliable, constant capacitance capacitor 失效
标题翻译：半导体器件包括高可靠性恒定电容电容器
公开(公告)号：US20060128095A1
公开(公告)日：2006-06-15
申请号：US11336966
申请日：2006-01-23
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L21/336
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, including a memory cell region and a peripheral circuit region, comprises an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.
摘要翻译：包括存储单元区域和外围电路区域的半导体器件包括在半导体衬底的主表面上形成有从表面延伸到外围电路区域的上表面的绝缘膜。电容器下电极组件形成在存储单元区域中，以向上延伸到与半导体衬底的主表面上的绝缘膜的上表面大致相同的高度。此外，下电极组件包括通过绝缘膜相邻的第一和第二下电极。电容器上电极通过电介质膜形成在电容器下电极上，延伸到绝缘膜的上表面。电容器下电极包括具有顶表面和底表面的电容器下电极部分。如上所述组织的半导体器件允许具有高集成度的实现，同时确保电容器具有高可靠性和恒定的电容。

5. 发明授权

US6066881A Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor 失效
公开(公告)号：US6066881A
公开(公告)日：2000-05-23
申请号：US119053
申请日：1998-07-20
申请人： Masahiro Shimizu , Yoshinori Tanaka , Hideaki Arima
发明人： Masahiro Shimizu , Yoshinori Tanaka , Hideaki Arima
IPC分类号： H01L21/8234 , H01L21/8242 , H01L27/088 , H01L27/108 , H01L29/772
CPC分类号： H01L27/10873 , H01L27/10894 , H01L27/10852
摘要： A gate insulating film in a memory cell portion is thicker than a gate insulating film in a peripheral circuitry. Source/drain of an MOS transistor in the memory cell portion have double-diffusion-layer structures, respectively, and source/drain of an MOS transistor in the peripheral circuitry have triple-diffusion-layer structures, respectively.

6. 发明授权

US07816204B2 Semiconductor device comprising capacitor and method of fabricating the same 有权
标题翻译：包括电容器的半导体器件及其制造方法
公开(公告)号：US07816204B2
公开(公告)日：2010-10-19
申请号：US12153763
申请日：2008-05-23
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L21/336
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.
摘要翻译：具有存储单元区域和外围电路区域的半导体器件包括绝缘膜，其具有形成在半导体衬底的主表面上以从存储器单元区域延伸到外围电路区域的上表面。电容器下电极组件形成在存储单元区域中，以向上延伸到与半导体衬底的主表面上的绝缘膜的上表面大致相同的高度。此外，下电极组件包括通过绝缘膜相邻的第一和第二下电极。电容器上电极通过电介质膜形成在电容器下电极上，延伸到绝缘膜的上表面。电容器下电极包括具有顶表面和底表面的电容器下电极部分。如上所述组织的半导体器件允许具有高集成度的实现，同时确保电容器具有高可靠性和恒定的电容。

7. 发明授权

US07795648B2 Semiconductor device comprising capacitor and method of fabricating the same 有权
公开(公告)号：US07795648B2
公开(公告)日：2010-09-14
申请号：US12368627
申请日：2009-02-10
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L29/76
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.

8. 发明授权

US07368776B2 Semiconductor device comprising a highly-reliable, constant capacitance capacitor 失效
标题翻译：半导体器件包括高可靠性恒定电容电容器
公开(公告)号：US07368776B2
公开(公告)日：2008-05-06
申请号：US11336966
申请日：2006-01-23
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.
摘要翻译：具有存储单元区域和外围电路区域的半导体器件包括绝缘膜，其具有形成在半导体衬底的主表面上以从存储器单元区域延伸到外围电路区域的上表面。电容器下电极组件形成在存储单元区域中，以向上延伸到与半导体衬底的主表面上的绝缘膜的上表面大致相同的高度。此外，下电极组件包括通过绝缘膜相邻的第一和第二下电极。电容器上电极通过电介质膜形成在电容器下电极上，延伸到绝缘膜的上表面。电容器下电极包括具有顶表面和底表面的电容器下电极部分。如上所述组织的半导体器件允许具有高集成度的实现，同时确保电容器具有高可靠性和恒定的电容。

9. 发明申请

US20060113579A1 Semiconductor device comprising capacitor and method of fabricating the same 有权
标题翻译：包括电容器的半导体器件及其制造方法
公开(公告)号：US20060113579A1
公开(公告)日：2006-06-01
申请号：US11336969
申请日：2006-01-23
申请人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
发明人： Yoshinori Tanaka , Masahiro Shimizu , Hideaki Arima
IPC分类号： H01L27/108
CPC分类号： H01L27/0629 , H01L27/10814 , H01L27/10817 , H01L27/10844 , H01L27/10852 , H01L27/10894 , H01L28/91
摘要： A semiconductor device, including a memory cell region and a peripheral circuit region, comprises an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized, as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.
摘要翻译：包括存储单元区域和外围电路区域的半导体器件包括在半导体衬底的主表面上形成有从表面延伸到外围电路区域的上表面的绝缘膜。电容器下电极组件形成在存储单元区域中，以向上延伸到与半导体衬底的主表面上的绝缘膜的上表面大致相同的高度。此外，下电极组件包括通过绝缘膜相邻的第一和第二下电极。电容器上电极通过电介质膜形成在电容器下电极上，延伸到绝缘膜的上表面。电容器下电极包括具有顶表面和底表面的电容器下电极部分。如上所述组织的半导体器件允许具有高集成度的实现，同时确保电容器具有高可靠性和恒定的电容。

10. 发明授权

US06762084B2 Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor 失效
标题翻译：具有存储单元晶体管的集成电路，其栅极氧化层比外围电路晶体管的栅氧化层厚
公开(公告)号：US06762084B2
公开(公告)日：2004-07-13
申请号：US10053543
申请日：2002-01-24
申请人： Masahiro Shimizu , Yoshinori Tanaka , Hideaki Arima
发明人： Masahiro Shimizu , Yoshinori Tanaka , Hideaki Arima
IPC分类号： H01L21336
CPC分类号： H01L27/10873 , H01L27/10852 , H01L27/10894
摘要： A gate insulating film in a memory cell portion is thicker than a gate insulating film in a peripheral circuitry. Source/drain of an MOS transistor in the memory cell portion have double-diffusion-layer structures, respectively, and source/drain of an MOS transistor in the peripheral circuitry have triple-diffusion-layer structures, respectively.
摘要翻译：存储单元部分中的栅极绝缘膜比外围电路中的栅极绝缘膜厚。存储单元部分的MOS晶体管的源极/漏极分别具有双扩散层结构，并且外围电路中的MOS晶体管的源极/漏极分别具有三重扩散层结构。

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