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1. 发明授权

US09812206B2 3D flash memory device having different dummy word lines and data storage devices including same 有权
公开(公告)号：US09812206B2
公开(公告)日：2017-11-07
申请号：US14162905
申请日：2014-01-24
申请人： Sang-Wan Nam , Kitae Park
发明人： Sang-Wan Nam , Kitae Park
IPC分类号： G11C11/34 , G11C16/04 , G11C16/16 , G11C16/34 , G11C16/08 , G11C16/10
CPC分类号： G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/3427
摘要： A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.

2. 发明授权

US09659662B2 Nonvolatile memory device and method of erasing nonvolatile memory device 有权
公开(公告)号：US09659662B2
公开(公告)日：2017-05-23
申请号：US14501352
申请日：2014-09-30
申请人： Sang-Wan Nam , Kang-Bin Lee , Kihwan Choi
发明人： Sang-Wan Nam , Kang-Bin Lee , Kihwan Choi
IPC分类号： G11C16/16 , G11C16/04
CPC分类号： G11C16/16 , G11C11/16 , G11C16/0483
摘要： A method is provided for erasing a nonvolatile memory device, including multiple memory blocks formed in a direction perpendicular to a substrate, each memory block having multiple strings connected to a bit line. The method includes selecting a memory block to be erased using a power supply voltage; unselecting a remaining memory block, other than the selected memory block, using a negative voltage; setting a bias condition to reduce leakage currents of the unselected memory block; and performing an erase operation on the selected memory block.

3. 发明授权

US09620232B2 Nonvolatile memory device and method of operating the same 有权
公开(公告)号：US09620232B2
公开(公告)日：2017-04-11
申请号：US15130237
申请日：2016-04-15
申请人： Sang-Wan Nam
发明人： Sang-Wan Nam
IPC分类号： G11C16/10 , G11C16/26 , G11C16/04 , G11C16/08 , G11C16/34 , H01L27/11582
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/08 , G11C16/34 , G11C16/3418 , G11C16/3427 , G11C16/3459 , H01L27/11582
摘要： According to example embodiments, an operation method of a nonvolatile memory device includes determining a location of a selected word line among word lines connected to the nonvolatile memory device, selecting one of a plurality of different read disturbance reducing modes according to the location of the selected word line, and performing a read or verification operation according to the selected read disturbance reducing modes. The nonvolatile memory device includes cell strings. Each one of the cell strings includes memory cells stacked on top of each other in a direction perpendicular to the substrate and between a ground select transistor and a string select transistor. The ground select transistor is between the substrate and the number of the memory cells. The string select transistor is connected to a bit line and is between the bit line and the number of the memory cells.

4. 发明授权

US09552886B2 Memory system and method of driving memory system using zone voltages 有权
标题翻译：使用区域电压驱动存储器系统的存储器系统和方法
公开(公告)号：US09552886B2
公开(公告)日：2017-01-24
申请号：US14855433
申请日：2015-09-16
申请人： Sang-Wan Nam , Minsu Kim , Kang-Bin Lee , Kitae Park
发明人： Sang-Wan Nam , Minsu Kim , Kang-Bin Lee , Kitae Park
IPC分类号： G11C16/10 , G11C16/26 , G11C16/30 , G11C5/14 , G11C16/24 , G11C16/08 , G11C16/04 , G11C16/16 , G11C16/34 , G11C16/14
CPC分类号： G11C16/24 , G11C5/147 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/3418 , G11C16/3459
摘要： A method is provided for driving a nonvolatile memory device, including multiple strings, where each string is formed by penetrating plate-shaped word lines stacked on a substrate. The method includes configuring the word lines of a string in multiple zones based on zone configuration information, and applying zone voltages to the zones, respectively. The zone configuration information is varied according to a mode of operation.
摘要翻译：提供一种用于驱动包括多个串的非易失性存储器件的方法，其中通过穿过堆叠在衬底上的板状字线形成每个串。该方法包括基于区域配置信息配置多个区域中的字符串的字线，并且将区域电压分别应用于区域。区域配置信息根据操作模式而变化。

5. 发明授权

US09424932B2 Nonvolatile memory device and programming method thereof 有权
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US09424932B2
公开(公告)日：2016-08-23
申请号：US14567639
申请日：2014-12-11
申请人： Yoon-Hee Choi , Sang-Wan Nam , Kang-Bin Lee
发明人： Yoon-Hee Choi , Sang-Wan Nam , Kang-Bin Lee
IPC分类号： G11C11/34 , G11C16/10 , G11C16/04 , G11C16/34 , G11C7/04 , H01L27/115
CPC分类号： G11C16/10 , G11C7/04 , G11C16/0483 , G11C16/3459 , H01L27/1157 , H01L27/11575 , H01L27/11582
摘要： A programming method is for programming a nonvolatile memory device including a plurality of strings disposed perpendicular to a substrate and connected between bitlines and a common source line. The programming method includes setting up the common source line to a predetermined voltage, floating the setup common source line, performing a program operation on memory cells connected to a selected wordline, and performing a verify operation on the memory cells.
摘要翻译：编程方法是用于编程非易失性存储器件，其包括垂直于衬底布置并连接在位线和公共源极线之间的多个串。编程方法包括将公共源线设置为预定电压，浮置设置公共源线，对连接到所选字线的存储器单元执行编程操作，以及对存储器单元执行验证操作。

6. 发明授权

US09391088B2 Nonvolatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US09391088B2
公开(公告)日：2016-07-12
申请号：US14674188
申请日：2015-03-31
申请人： Sang-Wan Nam
发明人： Sang-Wan Nam
IPC分类号： H01L27/115 , H01L29/82 , G11C16/04 , G11C11/34
CPC分类号： H01L27/1157 , G11C16/14 , G11C16/3427 , H01L27/11575 , H01L27/11582
摘要： The nonvolatile memory device includes a plurality of memory cells being stacked in a direction perpendicular to a substrate. A string select transistor is connected between the memory cells and a bit line. A string select line is connected to the string select transistor. A one directional device is connected between the substrate and the string select line and configured to transmit a bias voltage from the substrate toward the string select line in an erase operation.
摘要翻译：非易失性存储器件包括沿垂直于衬底的方向堆叠的多个存储器单元。一个串选择晶体管被连接在存储单元和位线之间。串选择线连接到串选择晶体管。单向器件连接在衬底和串选择线之间，并被配置为在擦除操作中从衬底向串选择线发送偏置电压。

7. 发明申请

US20160042792A1 NONVOLATILE MEMORY DEVICES AND DRIVING METHODS THEREOF 审中-公开
公开(公告)号：US20160042792A1
公开(公告)日：2016-02-11
申请号：US14887595
申请日：2015-10-20
申请人： Kyung-Hwa Kang , Sang-Wan Nam , Donghyuk Chae , ChiWeon Yoon
发明人： Kyung-Hwa Kang , Sang-Wan Nam , Donghyuk Chae , ChiWeon Yoon
IPC分类号： G11C16/04 , G11C16/08
CPC分类号： G11C16/0483 , G11C16/0466 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/11565 , H01L27/1157 , H01L27/11582
摘要： Nonvolatile memory devices including memory cell arrays with a plurality of cell strings connected between a substrate and a plurality of bit lines and selected by selection lines, and a gating circuit configured to drive the selection lines in at least two directions.

8. 发明授权

US09165669B2 Memory system and method of driving memory system using zone voltages 有权
标题翻译：使用区域电压驱动存储器系统的存储器系统和方法
公开(公告)号：US09165669B2
公开(公告)日：2015-10-20
申请号：US14056268
申请日：2013-10-17
申请人： Sang-Wan Nam , Minsu Kim , Kang-Bin Lee , Kitae Park
发明人： Sang-Wan Nam , Minsu Kim , Kang-Bin Lee , Kitae Park
IPC分类号： G11C16/10 , G11C16/26 , G11C16/30 , G11C5/14 , G11C16/34 , G11C16/16 , G11C16/08 , G11C16/04
CPC分类号： G11C16/24 , G11C5/147 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/3418 , G11C16/3459
摘要： A method is provided for driving a nonvolatile memory device, including multiple strings, where each string is formed by penetrating plate-shaped word lines stacked on a substrate. The method includes configuring the word lines of a string in multiple zones based on zone configuration information, and applying zone voltages to the zones, respectively. The zone configuration information is varied according to a mode of operation.
摘要翻译：提供一种用于驱动包括多个串的非易失性存储器件的方法，其中通过穿过堆叠在衬底上的板状字线形成每个串。该方法包括基于区域配置信息配置多个区域中的字符串的字线，并且将区域电压分别应用于区域。区域配置信息根据操作模式而变化。

9. 发明授权

US09076683B2 Operating method of nonvolatile memory and method of controlling nonvolatile memory 有权
标题翻译：非易失性存储器的操作方法和非易失性存储器的控制方法
公开(公告)号：US09076683B2
公开(公告)日：2015-07-07
申请号：US13587955
申请日：2012-08-17
申请人： Sang-Wan Nam , Kang-Bin Lee , Junghoon Park
发明人： Sang-Wan Nam , Kang-Bin Lee , Junghoon Park
IPC分类号： G11C16/04 , H01L27/115 , G11C16/34
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3459 , H01L27/1157 , H01L27/11582
摘要： An operating method of a nonvolatile memory, which includes a plurality of cell strings, each cell string having a plurality of memory cells and a string selection transistor stacked on a substrate, includes detecting threshold voltages of the string selection transistors of the plurality of cell strings; adjusting voltages to be supplied to the string selection transistors according to the detected threshold voltages; and applying the adjusted voltages to the string selection transistors to select or unselect the plurality of cell strings during a programming operation.
摘要翻译：一种非易失性存储器的操作方法，包括多个单元串，具有多个存储单元的每个单元串和堆叠在基板上的串选择晶体管，包括检测多个单元串中的串选择晶体管的阈值电压 ; 根据检测到的阈值电压调整提供给串选择晶体管的电压; 以及将调整后的电压施加到串选择晶体管，以在编程操作期间选择或取消选择多个单元串。

10. 发明授权

US08891307B2 Nonvolatile memory device and memory system including the same 有权
标题翻译：非易失性存储器件和包括其的存储器系统
公开(公告)号：US08891307B2
公开(公告)日：2014-11-18
申请号：US13620002
申请日：2012-09-14
申请人： Sang-Wan Nam
发明人： Sang-Wan Nam
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C16/04 , G11C16/24 , H01L27/1157 , H01L27/11582
摘要： According to example embodiments of inventive concepts, a nonvolatile memory device includes a first NAND string and a second NAND string. The first NAND string include a first string selection transistor, a first ground selection transistor having a threshold voltage higher than a threshold voltage of the first string selection transistor, and first memory cells stacked on a substrate. The a second NAND string includes a second string selection transistor, a second ground selection transistor having a threshold voltage higher than a threshold voltage of the second string selection transistor, and second memory cells stacked on the substrate. A first selection line may connect the first string selection line and the first ground selection line, and a second selection line may connect the second selection line and the second ground selection line. The first and second selection lines may be electrically isolated from each other.
摘要翻译：根据本发明构思的示例实施例，非易失性存储器件包括第一NAND串和第二NAND串。第一NAND串包括第一串选择晶体管，具有高于第一串选择晶体管的阈值电压的阈值电压的第一接地选择晶体管和堆叠在基板上的第一存储单元。第二NAND串包括第二串选择晶体管，具有高于第二串选择晶体管的阈值电压的阈值电压的第二接地选择晶体管，以及堆叠在基板上的第二存储单元。第一选择线可以连接第一串选择线和第一接地选择线，并且第二选择线可以连接第二选择线和第二接地选择线。第一选择线和第二选择线可以彼此电隔离。

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