会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07635890B2
    • 2009-12-22
    • US11783934
    • 2007-04-13
    • Yoshio OzawaAkihito YamamotoMasayuki TanakaKatsuaki NatoriKatsuyuki SekineDaisuke NishidaRyota Fujitsuka
    • Yoshio OzawaAkihito YamamotoMasayuki TanakaKatsuaki NatoriKatsuyuki SekineDaisuke NishidaRyota Fujitsuka
    • H01L29/76
    • H01L29/7883H01L27/115H01L27/11521H01L29/42324
    • A semiconductor device includes a semiconductor substrate, a plurality of nonvolatile memory cells provided on the semiconductor substrate, each of the plurality of nonvolatile memory cells comprising a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a control gate electrode provided above the charge storage layer, a second insulating film provided between the control gate electrode and the charge storage layer, the second insulating film between adjacent charge storage layers including a first region having permittivity lower than that of the second insulating film on a top surface of the charge storage layer in a cross-section view of a channel width direction of the nonvolatile memory cell, and the first region having composition differing from that of the second insulating film on the top surface of the charge storage layer.
    • 半导体器件包括半导体衬底,设置在半导体衬底上的多个非易失性存储单元,所述多个非易失性存储单元中的每一个包括设置在所述半导体衬底上的第一绝缘膜,设置在所述第一绝缘膜上的电荷存储层, 设置在所述电荷存储层上方的控制栅电极,设置在所述控制栅电极和所述电荷存储层之间的第二绝缘膜,所述相邻电荷存储层之间的所述第二绝缘膜包括具有低于所述第二绝缘膜的介电常数的第一区域 在电荷存储层的顶表面上,以非易失性存储单元的沟道宽度方向的横截面视图,并且第一区域具有与电荷存储层的顶表面上的第二绝缘膜不同的组成。
    • 9. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20090194808A1
    • 2009-08-06
    • US12362019
    • 2009-01-29
    • Ryota FUJITSUKAYoshio OzawaKatsuaki Natori
    • Ryota FUJITSUKAYoshio OzawaKatsuaki Natori
    • H01L29/792
    • H01L27/11568H01L27/112
    • A semiconductor device includes an element region having a channel region, and a unit gate structure inducing a channel in the channel region, the unit gate structure including a tunnel insulating film formed on the element region, a charge storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge storage insulating film, and a control gate electrode formed on the block insulating film, wherein a distance between the element region and the control gate electrode is shorter at a center portion of the unit gate structure than at both ends thereof, as viewed in a section parallel to a channel width direction.
    • 半导体器件包括具有沟道区域的元件区域和在沟道区域中引起沟道的单元栅极结构,所述单元栅极结构包括形成在元件区域上的隧道绝缘膜,形成在隧道绝缘层上的电荷存储绝缘膜 形成在电荷存储绝缘膜上的块绝缘膜和形成在块绝缘膜上的控制栅极电极,其中元件区域和控制栅电极之间的距离在单元栅极结构的中心部分较短 在与通道宽度方向平行的部分中看到的两端。