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1. 发明专利

JP2008219922A Programmable linear receiver 有权
标题翻译：可编程线性接收器
公开(公告)号：JP2008219922A
公开(公告)日：2008-09-18
申请号：JP2008096328
申请日：2008-04-02
申请人： Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
发明人： CICCARELLI STEVEN C , YOUNIS SAED G , KAUFMAN RALPH E
IPC分类号： H04B1/16 , H03F1/02 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10
CPC分类号： H03G3/3068 , H03F1/0261 , H03F1/342 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03G1/0088 , H04B1/1027 , H04B1/109
摘要： PROBLEM TO BE SOLVED: To provide the requisite level of performance while minimizing power consumption.
SOLUTION: Power consumption is minimized on the basis of the measurement of non-linearity in an output signal from a receiver 1,200. The amount of the non-linearity can be measured by an RSSI slope or an energy-per-chip-to-noise-ratio Ec/Io value. The RSSI slope is the ratio of a change in the output signal plus intermodulation to a change in an input signal. The input signal level is periodically increased by a prescribed level and the output signal from the receiver 1,200 is measured. The output signal comprises a desired signal and intermodulation products from the non-linearity within the receiver 1200. When the receiver 1,200 is operating linearly, the output signal level increases dB per dB with the input signal level. However, when the receiver 1,200 enters into a non-linear region, intermodulation products caused by a non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation caused by the non-linearity can be determined. This information is then used to adjust the IIP3 operating point of an amplifier 1,234 and a mixer.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供必要的性能水平，同时最大限度地降低功耗。解决方案：基于来自接收机1200的输出信号中的非线性的测量，使功耗最小化。非线性的量可以通过RSSI斜率或每芯片上的能量/比率Ec / Io值来测量。 RSSI斜率是输出信号加互调变化与输入信号变化的比率。输入信号电平周期性地增加规定电平，测量来自接收机1,200的输出信号。输出信号包括期望的信号和来自接收器1200内的非线性的互调产物。当接收器1,200线性运行时，输出信号电平随着输入信号电平而增加每dB dB。然而，当接收机1,200进入非线性区域时，由非线性引起的互调产物比期望的信号增加更快。通过检测RSSI斜率，可以确定由非线性引起的劣化量。然后，该信息用于调整放大器1,234和混频器的IIP3工作点。版权所有（C）2008，JPO＆INPIT

2. 发明专利

CA2313471C PROGRAMMABLE LINEAR RECEIVER 未知
公开(公告)号：CA2313471C
公开(公告)日：2008-10-14
申请号：CA2313471
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： KAUFMAN RALPH E , YOUNIS SAED G , CICCARELLI STEVEN C
IPC分类号： H04B1/10 , H03F1/02 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/16
摘要： A programmable linear receiver (1200) which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non- linearity in the ouput signal from the receiver (1200). The amount of non-linearity can be measured by the RSSI slope or energy-per-chip- to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver (1200) is measured. The ouput signal comprises the desired signal and intermodulation products from non-linearity within the receiver (1200). When the receiver (1200) is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver (1200) transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operating point of the amplifiers (1234) and mixer (1230) to provide the requisite level of performance while minimizing power consumption.

3. 发明专利

ID26491A 未知
公开(公告)号：ID26491A
公开(公告)日：2001-01-11
申请号：ID20001332
申请日：1999-01-06
申请人： QUALCOMM INC
发明人： KAUFMAN RALPH E , VLADIMIR APARIN
IPC分类号： H03C3/40 , H03D3/00 , H03D7/16 , H04L27/34 , H04L27/20 , H04L27/22 , H04L27/36
摘要： A quadrature modulator and demodulator which provide the requisite level of performance while minimizing power consumption. In the quadrature modulator, the I and Q signals are provided to two pairs of mixers. Each mixer in a pair of mixers modulates an I or Q signal with the respective inphase or quadrature IF sinusoid. The I and Q modulated signals from each pair of mixers are summed. The signals from the summers are provided to a third pair of mixer and modulated with the respective inphase and quadrature RF sinusoids. The signals from the third pair of mixers are summed and provided as the modulated signal. Using this quadrature modulator topology, the amplitude balance and phase error of the modulated signal are made insensitive to the amplitude imbalance and/or phase error of the quadrature splitters used to generate the IF and RF sinusoids. Furthermore, since the first two pairs of mixers and the two subsequent summers are operated at IF frequency, the performance requirements (e.g., bandwidth and linearity) of these components can be ensured while utilizing less power. The inventive concept can be further adopted for use in a quadrature demodulator.

4. 发明专利

NO20002931A 未知
公开(公告)号：NO20002931A
公开(公告)日：2000-07-31
申请号：NO20002931
申请日：2000-06-08
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN C , YOUNIS SAED G , KAUFMAN RALPH E
IPC分类号： H03F1/02 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10 , H04B1/16
CPC分类号： H03G3/3068 , H03F1/0261 , H03F1/342 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03G1/0088 , H04B1/1027 , H04B1/109

5. 发明专利

ES2251112T3 RECEPTOR LINEAL PROGRAMABLE. 未知
公开(公告)号：ES2251112T3
公开(公告)日：2006-04-16
申请号：ES98960823
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN C , YOUNIS SAED G , KAUFMAN RALPH E
IPC分类号： H03F1/02 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10 , H04B1/16
摘要： Receptor lineal programable (1200) que comprende: (a) un elemento de ganancia ajustable (1216) para recibir una señal RF, presentando el elemento de ganancia ajustable (1216) una entrada de control de ganancia; (b) un circuito de control de ganancia (1260) que es operativo para incrementar de forma periódica el nivel de la señal de entrada, y que está conectado a la entrada de control de ganancia del elemento de ganancia ajustable (1216); (c) por lo menos una etapa de amplificador (1220) que: (1) está conectada al elemento de ganancia ajustable y (2) presenta un punto operativo de IIP3 variable que se puede ajustar mediante una entrada de control de polarización; (d) un demodulador (1250) que: (1) está conectado a dicha por lo menos una etapa de amplificador y (2) es operativo para proporcionar datos de banda base; (e) un circuito de medición de no linealidad (1290) que: (1) está conectado al demodulador (1250) y (2) es operativo para: (A) medir la pendiente de RSSI resultante de dicho incremento del nivel de potencia o (B) calcular el cambio de la relación de energía por segmento/ruido (Ec/Io) resultante de dicho incremento del nivel de entrada; (f) un circuito de control de polarización (1280) para establecer el punto operativo de IIP3 de un dispositivo activo, controlando su corriente o tensión de polarización CC según dicha medición de la linealidad, estando conectado dicho circuito de control de polarización (1280) a: (1) el circuito de medición de no linealidad (1290) y (2) la entrada de control de polarización de la etapa de amplificador.

6. 发明专利

AU754973B2 Programmable linear receiver 未知
公开(公告)号：AU754973B2
公开(公告)日：2002-11-28
申请号：AU1632999
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN C , YOUNIS SAED G , KAUFMAN RALPH E
IPC分类号： H03F1/02 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10 , H04B1/16
摘要： A programmable linear receiver which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non-linearity in the output signal from the receiver. The amount of non-linearity can be measured by the RSSI slope or energy-per-chip-to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver is measured. The output signal comprises the desired signal and intermodulation products from non-linearity within the receiver. When the receiver is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operating point of the amplifiers and mixer to provide the requisite level of performance while minimizing power consumption.

7. 发明专利

BR9906790A 未知
公开(公告)号：BR9906790A
公开(公告)日：2000-10-31
申请号：BR9906790
申请日：1999-01-06
申请人： QUALCOMM INC
发明人： KAUFMAN RALPH E , APARIN VLADIMIR
IPC分类号： H04L27/34 , H03C3/40 , H03D3/00 , H03D7/16 , H04L27/20 , H04L27/22 , H04L27/36
摘要： A quadrature modulator and demodulator which provide the requisite level of performance while minimizing power consumption. In the quadrature modulator, the I and Q signals are provided to two pairs of mixers. Each mixer in a pair of mixers modulates an I or Q signal with the respective inphase or quadrature IF sinusoid. The I and Q modulated signals from each pair of mixers are summed. The signals from the summers are provided to a third pair of mixer and modulated with the respective inphase and quadrature RF sinusoids. The signals from the third pair of mixers are summed and provided as the modulated signal. Using this quadrature modulator topology, the amplitude balance and phase error of the modulated signal are made insensitive to the amplitude imbalance and/or phase error of the quadrature splitters used to generate the IF and RF sinusoids. Furthermore, since the first two pairs of mixers and the two subsequent summers are operated at IF frequency, the performance requirements (e.g., bandwidth and linearity) of these components can be ensured while utilizing less power. The inventive concept can be further adopted for use in a quadrature demodulator.

8. 发明专利

ZA9901713B Amplifier with adjustable bias current. 未知
公开(公告)号：ZA9901713B
公开(公告)日：1999-11-24
申请号：ZA9901713
申请日：1999-03-03
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN , PETERZELL PAUL E , KAUFMAN RALPH E
IPC分类号： H03F1/32 , H03F1/02 , H03F1/26 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10 , H04B1/16 , H03F , H03G
CPC分类号： H03G3/3068 , H03F1/0261 , H03F1/342 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03G1/0088 , H04B1/1027 , H04B1/109

9. 发明专利

CA2322787A1 AMPLIFIER WITH ADJUSTABLE BIAS CURRENT 未知
公开(公告)号：CA2322787A1
公开(公告)日：1999-09-10
申请号：CA2322787
申请日：1999-03-04
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN C , PETERZELL PAUL E , KAUFMAN RALPH E
IPC分类号： H03F1/32 , H03F1/02 , H03F1/26 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10 , H04B1/16
摘要： An amplifier (1220, 1220a, 12206) having an adjustable current source (1580) which can be controlled to provide the requisite level of performance at reduced current consumption. The amplifier is first designed using one of many designs available and known in the art. A current source is then designed to provide adjustable bias current for the amplifier. The current source (1580) can be designed with MOSFETs (1582, 1584) which require no additional bias current and can accept a standard digital control signal. The current source (1580) can also be designed with active devices which are selected based on the logic of the control signals for ease of interface. The bias current determines the linearity and noise performance of the amplifier. The bias current is adjusted to provide the requisite level of performance while reducing power consumption. The current source can be designed to operate in discrete steps or to have substantially continuous current steps.

10. 发明专利

CA2316969A1 QUADRATURE MODULATOR AND DEMODULATOR 未知
公开(公告)号：CA2316969A1
公开(公告)日：1999-07-15
申请号：CA2316969
申请日：1999-01-06
申请人： QUALCOMM INC
发明人： KAUFMAN RALPH E , APARIN VLADIMIR
IPC分类号： H04L27/34 , H03C3/40 , H03D3/00 , H03D7/16 , H04L27/20 , H04L27/22 , H04L27/36
摘要： A quadrature modulator (210) and demodulator (310) which provide the requisite level of performance while minimizing power consumption. In the quadrature modulator (210), the I and Q signals are provided to two pairs of mixers. Each mixer in a pair of mixers modulates an I or Q signal with the respective inphase or quadrature IF sinusoid. The I and Q modulated signals from each pair of mixers are summed. The signals from the summers are provided to a third pair of mixer and modulated with the respective inphase and quadrature RF sinusoids. The signals from the third pair of mixers are summed and provided as the modulated signal. Using this quadrature modulator (210) topology, the amplitude balance and phase error of the modulated signal are made insensitive to the amplitude imbalance and/or phase error of the quadrature splitters used to generate the IF and RF sinusoids. Furthermore, since the first two pairs of mixers and the two subsequent summers are operated at IF frequency, the performance requirements (e.g., bandwidth and linearity) of these components can be ensured while utilizing less power. The inventive concept can be further adopted for use in a quadrature demodulator (310).

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