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1. 发明申请

WO2001052015A2 CIRCUIT AND METHOD FOR FILTERING OSCILLATIONS AND SYNCHRONIZING SIGNALS 审中-公开
标题翻译：用于滤波振荡和同步信号的电路和方法
公开(公告)号：WO2001052015A2
公开(公告)日：2001-07-19
申请号：PCT/US2001001376
申请日：2001-01-16
申请人： QLOGIC CORPORATION
发明人： QLOGIC CORPORATION , VASHI, Kevin , DENNIN, William, W.
IPC分类号： G06F
CPC分类号： H03L7/00 , G11B20/1403 , H03K5/125 , H03K5/135
摘要： A filtering and synchronization circuit synchronizes an asynchronous input signal to a clock signal and generates a synchronous output signal. The circuit synchronizes both the leading edge and the trailing edge of the input signal and also blocks or filters out oscillations in the input signal for a period following the edges. The circuit includes an input signal latch which receives the input signal and provides a latched signal which does not change state even if the input signal subsequently changes state until the latched signal is synchronized to the clock signal. The circuit further includes a synchronizer which synchronizes the latched signal with the clock signal. The synchronizer provides feedback signals to the input signal latch to permit the input signal latch to recognize a change in the state of the input signal only after the synchronizer has synchronized the previous state of the input signal. The feedback signals can be selectively delayed to extend the time during which the input signal latch does not recognize changes in the state of the input signal.
摘要翻译：滤波和同步电路将异步输入信号与时钟信号同步并产生同步输出信号。电路同步输入信号的前沿和后沿，并且在边沿之后的一段时间内阻塞或滤除输入信号中的振荡。该电路包括输入信号锁存器，其接收输入信号并提供锁存信号，即使输入信号随后改变状态直到锁存信号与时钟信号同步，该信号也不改变状态。电路还包括同步器，其将锁存的信号与时钟信号同步。同步器向输入信号锁存器提供反馈信号，以允许输入信号锁存器仅在同步器已经同步输入信号的先前状态之后识别输入信号状态的变化。可以选择性地延迟反馈信号以延长输入信号锁存器不识别输入信号状态的变化的时间。

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