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1. 发明申请

US20050228913A1 Communication apparatus implementing time domain isolation with restricted bus access 有权
标题翻译：通信设备实现有限公共汽车访问的时域隔离
公开(公告)号：US20050228913A1
公开(公告)日：2005-10-13
申请号：US10814426
申请日：2004-03-31
申请人： Phillip Matthews , Frederick Rush , G. Vishakhadatta
发明人： Phillip Matthews , Frederick Rush , G. Vishakhadatta
IPC分类号： G06F13/366 , H04B1/16 , H04W52/02 , G06F13/00
CPC分类号： H04W52/0283 , H04W52/029 , Y02D70/1222 , Y02D70/1224 , Y02D70/1226 , Y02D70/21
摘要： A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a plurality of bus masters coupled to a shared bus. A bus arbiter is provided for arbitrating between requests to access the bus by a first bus master and one or more other bus masters. Accesses by the one or more other bus masters to the bus are restricted in response to a signal indicative of a change in a mode of operation of the RF circuit. In one particular implementation, a communication apparatus employs time domain isolation wherein the digital processing circuit may be placed in a shutdown mode when the radio frequency circuit is active.
摘要翻译：通信装置包括对射频信号进行动作的射频电路和与射频电路耦合的数字处理电路。数字处理电路包括耦合到共享总线的多个总线主控器。总线仲裁器被提供用于在由第一总线主机和一个或多个其他总线主机访问总线的请求之间进行仲裁。响应于指示RF电路的操作模式的变化的信号，限制了一个或多个其它总线主机对总线的访问。在一个具体实现中，通信设备采用时域隔离，其中当射频电路处于活动状态时，数字处理电路可以处于关闭模式。

2. 发明申请

US20060019686A1 Method of controlling a processor for radio isolation using a timer 有权
标题翻译：使用定时器控制用于无线电隔离的处理器的方法
公开(公告)号：US20060019686A1
公开(公告)日：2006-01-26
申请号：US10897953
申请日：2004-07-23
申请人： Frederick Rush , G. Vishakhadatta , Phillip Matthews
发明人： Frederick Rush , G. Vishakhadatta , Phillip Matthews
IPC分类号： H04B15/00
CPC分类号： H04B1/1615 , H04W52/0229 , Y02D70/1224 , Y02D70/40
摘要： A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.
摘要翻译：在移动电话设备中操作射频（RF）电路和信号处理电路的方法包括在发送或接收信号时至少部分禁用信号处理电路。在一个示例中，通过产生和服务具有较高优先级的中断来有效地禁止处理器。该示例的一个优点是，可以维持预先存在的遗留代码，同时仍然实现期望的目标。可以通过生成和维护第二个高优先级中断来使能处理器。

3. 发明申请

US20060004938A1 Communication apparatus including dual timer units 有权
标题翻译：通信设备包括双计时器单元
公开(公告)号：US20060004938A1
公开(公告)日：2006-01-05
申请号：US10881167
申请日：2004-06-30
申请人： Phillip Matthews , Frederick Rush , G. Vishakhadatta
发明人： Phillip Matthews , Frederick Rush , G. Vishakhadatta
IPC分类号： G06F13/00
CPC分类号： H04B15/04
摘要： A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a first timing circuit that provides timed signals to control timing of system operations during an active mode of operation of the digital processing circuit, and a second timing circuit that provides timing signals to control timing of system operations during an active mode of operation of the radio frequency circuit. In one particular embodiment, at least a portion of the first timing circuit is disabled when the radio frequency circuit is active (receiving and/or transmitting).
摘要翻译：通信装置包括对射频信号进行动作的射频电路和与射频电路耦合的数字处理电路。数字处理电路包括第一定时电路，其提供定时信号以控制在数字处理电路的主动操作模式期间的系统操作的定时;以及第二定时电路，其提供定时信号以控制在主动模式期间系统操作的定时的射频电路的操作。在一个具体实施例中，当射频电路处于活动状态（接收和/或发送）时，第一定时电路的至少一部分被禁用。

4. 发明申请

US20050008095A1 Apparatus using interrupts for controlling a processor for radio isolation and associated methods 审中-公开
标题翻译：使用中断控制处理器进行无线电隔离和相关方法的装置
公开(公告)号：US20050008095A1
公开(公告)日：2005-01-13
申请号：US10898057
申请日：2004-07-23
申请人： Frederick Rush , G. Vishakhadatta , Phillip Matthews
发明人： Frederick Rush , G. Vishakhadatta , Phillip Matthews
IPC分类号： G06F13/00 , G06Q10/00 , H04L12/58 , H04B1/10 , H04K1/02 , H04L25/03 , H04L25/49 , H03D3/00
CPC分类号： H04W16/14 , G06Q10/10 , G06Q10/107 , H04B1/10 , H04B15/04 , H04B2215/064 , H04W52/0287 , Y02D70/1224 , Y02D70/40
摘要： A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.
摘要翻译：在移动电话设备中操作射频（RF）电路和信号处理电路的方法包括在发送或接收信号时至少部分禁用信号处理电路。在一个示例中，通过产生和服务具有较高优先级的中断来有效地禁止处理器。该示例的一个优点是，可以维持预先存在的遗留代码，同时仍然实现期望的目标。可以通过生成和维护第二个高优先级中断来使能处理器。

5. 发明申请

US20060253634A1 Communication apparatus implementing time domain isolation with restricted bus access 有权
公开(公告)号：US20060253634A1
公开(公告)日：2006-11-09
申请号：US11479733
申请日：2006-06-30
申请人： Phillip Matthews , Frederick Rush , G. Vishakhadatta
发明人： Phillip Matthews , Frederick Rush , G. Vishakhadatta
IPC分类号： G06F13/00
CPC分类号： H04W52/0283 , H04W52/029 , Y02D70/1222 , Y02D70/1224 , Y02D70/1226 , Y02D70/21
摘要： A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a plurality of bus masters coupled to a shared bus. A bus arbiter is provided for arbitrating between requests to access the bus by a first bus master and one or more other bus masters. Accesses by the one or more other bus masters to the bus are restricted in response to a signal indicative of a change in a mode of operation of the RF circuit. In one particular implementation, a communication apparatus employs time domain isolation wherein the digital processing circuit may be placed in a shutdown mode when the radio frequency circuit is active.

6. 发明申请

US20060018401A1 Apparatus using interrupts for controlling a processor for radio isolation and associated method 有权
公开(公告)号：US20060018401A1
公开(公告)日：2006-01-26
申请号：US10898058
申请日：2004-07-23
申请人： Frederick Rush , G. Vishakhadatta , Phillip Matthews
发明人： Frederick Rush , G. Vishakhadatta , Phillip Matthews
IPC分类号： H04B1/10
CPC分类号： H04W52/028 , H04B1/1615 , Y02D70/1224 , Y02D70/40
摘要： A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.

7. 发明申请

US20060018372A1 Apparatus for controlling a digital signal processor for radio isolation and associated methods 有权
标题翻译：用于控制用于无线电隔离的数字信号处理器和相关方法的装置
公开(公告)号：US20060018372A1
公开(公告)日：2006-01-26
申请号：US10955926
申请日：2004-09-30
申请人： Shaojie Chen , Frederick Rush , G. Vishakhadatta , Phillip Matthews
发明人： Shaojie Chen , Frederick Rush , G. Vishakhadatta , Phillip Matthews
IPC分类号： H04B1/38
CPC分类号： H04B1/10 , G06Q10/10 , G06Q10/107 , H04B1/1615 , H04B15/04 , H04B2215/064 , H04B2215/065 , H04B2215/066 , H04W16/14 , H04W52/029 , Y02D70/1222 , Y02D70/1224 , Y02D70/40
摘要： A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.
摘要翻译：在移动电话设备中操作射频（RF）电路和信号处理电路的方法包括在发送或接收信号时至少部分禁用信号处理电路。在一个示例中，通过产生和服务具有较高优先级的中断来有效地禁止处理器。该示例的一个优点是，可以维持预先存在的遗留代码，同时仍然实现期望的目标。可以通过生成和维护第二个高优先级中断来使能处理器。

8. 发明申请

US20060072685A1 Wireless communication system with hardware-based frequency burst detection 有权
公开(公告)号：US20060072685A1
公开(公告)日：2006-04-06
申请号：US10955569
申请日：2004-09-30
申请人： Xue-Mei Gong , Jing Liang , Frederick Rush , Phillip Matthews , Gannavaram Vishakhadatta
发明人： Xue-Mei Gong , Jing Liang , Frederick Rush , Phillip Matthews , Gannavaram Vishakhadatta
IPC分类号： H04L27/06
CPC分类号： H04L27/0002 , H04B1/0028 , H04B1/40 , H04B15/02
摘要： A wireless communication system is provided that includes RF circuitry and signal processing circuitry. The signal processing circuitry includes a dedicated frequency burst (FB) search hardware circuit which exhibits relatively low noise in comparison with other digital processing circuitry, such as a DSP and MCU, within the system. The RF circuitry, dedicated FB search hardware circuit and the other digital processing circuitry can each be activated and inactivated. In one embodiment, when the RF circuitry and the dedicated FB search hardware are active, other digital processing circuitry remains inactive to avoid noise problems that could degrade reception and interfere with the FB search hardware locating the FB. Noise problems in the system are thus desirably reduced.

9. 发明授权

US06628999B1 Single-chip audio system volume control circuitry and methods 失效
标题翻译：单片机音频系统音量控制电路及方法
公开(公告)号：US06628999B1
公开(公告)日：2003-09-30
申请号：US09031112
申请日：1998-02-26
申请人： Jeff Klaas , Phillip Matthews
发明人： Jeff Klaas , Phillip Matthews
IPC分类号： G06F1700
CPC分类号： H04H60/04 , G06F3/162 , H03L3/00 , Y02D70/168
摘要： An audio system 100 includes circuitry 116 for generating an audio data stream and circuitry 103 for generating digital words defining a volume control level. System 100 also includes volume control circuitry 5000 for controlling the amplitude of the audio data stream in response to the digital words. Volume control circuitry 5000 includes a master register 5001 for holding digital words received from circuitry for generating 116 and a slave register 5002 for holding a digital word selectively transferred from master register 5001 in response to an enable signal. Output control circuitry 5005, 5006 and 5007 receive the audio data stream and apply a preselected gain defined by the digital word held in slave register 5002. Volume control circuitry 5000 also includes circuitry 5003, 5004 for generating the enable signal when a digital word held in the master register 5001 changes and the audio data stream output from ouput control circuitry 5005, 5006, 5007 reaches a zero crossing.
摘要翻译：音频系统100包括用于产生音频数据流的电路116和用于产生定义音量控制电平的数字字的电路103。系统100还包括用于响应于数字字来控制音频数据流的幅度的音量控制电路5000。音量控制电路5000包括用于保持从用于生成电路116的电路接收的数字字的主寄存器5001和用于保持从主寄存器5001响应于使能信号有选择地传送的数字字的从属寄存器5002。输出控制电路5005,5006和5007接收音频数据流并施加由保持在从寄存器5002中的数字字定义的预选增益。音量控制电路5000还包括电路5003,5004，用于当数字字保持在主寄存器5001改变，并且从输出控制电路5005,5006,5007输出的音频数据流达到零交叉。

10. 发明授权

US06405093B1 Signal amplitude control circuitry and methods 失效
标题翻译：信号幅度控制电路和方法
公开(公告)号：US06405093B1
公开(公告)日：2002-06-11
申请号：US09031439
申请日：1998-02-26
申请人： Ronald D. Malcolm, Jr. , Jeff Klaas , Mark Gentry , Phillip Matthews
发明人： Ronald D. Malcolm, Jr. , Jeff Klaas , Mark Gentry , Phillip Matthews
IPC分类号： G06F1700
CPC分类号： H04H60/04 , G06F3/162 , H03L3/00 , Y02D70/168
摘要： Amplitude control circuitry 5000 includes a first register 5001 for storing received amplitude control data and a second register 5002 for storing amplitude control data transfered from first register 5001. Output circuitry 5005, 5006, 5007 controls the amplitude of a received signal in response to amplitude data transferred from second register. A sensor 5003 determines when data stored in first register 5001 and second register 5002 does not match and enables a comparator 5004 when data in first register 5001 and, second register 5002 does not match. Comparator 5004 compares a signal output from output circuitry 5005, 5006, 5007 with a reference signal and generates a signal for enabling the transfer of data from first register 5001 to second register 5002 when the signal output from output circuitry 5005, 5006, 5007 falls within a window defined by the reference voltage.
摘要翻译：幅度控制电路5000包括用于存储接收到的幅度控制数据的第一寄存器5001和用于存储从第一寄存器5001传送的幅度控制数据的第二寄存器5002.输出电路5005,5006,5007响应于振幅数据控制接收信号的幅度从第二个寄存器转移。当第一寄存器5001和第二寄存器5002中的数据不匹配时，传感器5003确定存储在第一寄存器5001和第二寄存器5002中的数据何时不匹配并使能比较器5004。比较器5004将来自输出电路5005,5006,5007的信号与参考信号进行比较，并且当从输出电路5005,5006,5007输出的信号落在内部时，产生用于使得能够将数据从第一寄存器5001传送到第二寄存器5002的信号由参考电压定义的窗口。

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