会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明公开
    • AVALANCHE PHOTODIODE
    • 雪崩光电二极管
    • EP3229279A1
    • 2017-10-11
    • EP15864741.2
    • 2015-11-27
    • Nippon Telegraph and Telephone Corporation
    • NADA, MasahiroMURAMOTO, YoshifumiNAKAJIMA, FumitoMATSUZAKI, Hideaki
    • H01L31/107
    • To obtain high linearity without sacrificing light-receiving sensitivity and a high speed, an avalanche photodiode includes an avalanche layer (103) formed on a first light absorption layer (102), an n-field control layer (104) formed on the avalanche layer (103), and a second light absorption layer (105) formed on the field control layer (104). If a reverse bias voltage is applied, a donor impurity in the field control layer (104) ionizes, and a high electric field is induced in the avalanche layer (103). The n-type doping amount in the field control layer (104) is set such that the impurity concentration in the second light absorption layer (105) sufficiently depletes at the time of reverse bias application.
    • 为了在不牺牲光接收灵敏度和高速的情况下获得高线性度,雪崩光电二极管包括形成在第一光吸收层(102)上的雪崩层(103),形成在雪崩层上的n场控制层(104) (103)以及形成在场控制层(104)上的第二光吸收层(105)。 如果施加反向偏置电压,则场控制层(104)中的施主杂质电离,并且在雪崩层(103)中感应出高电场。 场控制层(104)中的n型掺杂量被设定为使得在施加反向偏压时第二光吸收层(105)中的杂质浓度充分消耗。
    • 5. 发明公开
    • SEMICONDUCTOR INTEGRATED OPTICS ELEMENT AND PRODUCTION METHOD THEREFOR
    • EP3764488A1
    • 2021-01-13
    • EP19763524.6
    • 2019-02-28
    • NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    • SHINDO, TakahikoFUJIWARA, NaokiSANO, KimikazuISHII, HiroyukiMATSUZAKI, HideakiYAMADA, TakashiHORIKOSHI, Kengo
    • H01S5/042H01S5/026H01S5/12H01S5/227H01S5/50
    • A semiconductor optical integrated element (AXEL) designed to output further intensified light dispenses with an additional inspection process and prevents an increase in manufacturing costs. A method for manufacturing such a semiconductor optical integrated element, includes the step of forming a semiconductor wafer by arranging a plurality of the semiconductor optical integrated elements two-dimensionally such that optical axes of the semiconductor optical integrated elements are aligned. The semiconductor optical integrated elements each include a DFB laser, an EA modulator, and a SOA that are monolithically integrated on an identical substrate and that are disposed in an order of the DFB laser, the EA modulator, and the SOA along a light emitting direction. The method further includes the steps of cleaving the semiconductor wafer along a plane orthogonal to the light emitting direction to form a semiconductor bar including a plurality of the semiconductor optical integrated elements arranged one-dimensionally along a direction orthogonal to the light emitting direction such that the semiconductor optical integrated elements adjacent to each other share an identical cleavage end face as a light emission surface, inspecting each of the semiconductor optical integrated elements of the semiconductor bar by energizing and driving the SOA and the DFB laser through a connection wiring part that electrically connects an electrode of the SOA and an electrode of the DFB laser together, and separating out each of the semiconductor optical integrated elements of the semiconductor bar at a boundary line between the adjacent semiconductor optical integrated elements after the inspection to cut the connection wiring part electrically connecting the electrode of the SOA and the electrode of the DFB laser and electrically isolate the SOA and the DFB laser from each other.