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    • 1. 发明授权
    • Implantable medical device with low power delta-sigma analog-to-digital converter
    • 具有低功耗delta-sigma模数转换器的可植入医疗设备
    • US07623053B2
    • 2009-11-24
    • US11861920
    • 2007-09-26
    • Michael B. TerryMichael W. HeinksJoel A. AndersonMark A. Frigaard
    • Michael B. TerryMichael W. HeinksJoel A. AndersonMark A. Frigaard
    • H03M1/66
    • A61N1/3704H03M3/34H03M3/37H03M3/434
    • In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.
    • 通常,本公开描述了用于降低可植入医疗装置(IMD)内的功率消耗的技术。 植入患者体内的IMD可能具有有限的功率资源,这些功率资源将持续数年。 为了促进设备使用寿命,IMD的感测和治疗电路被设计为包含在相对低的操作频率下提供相对高分辨率输出的模数转换器(ADC),并且以相对较低的功耗来实现。 根据本文描述的技术设计的ADC利用具有比用于负反馈的数模转换器(DAC)更低的分辨率的量化器。 这种配置提供了更高分辨率DAC反馈的优点,而不需要使用导致高功耗的高过采样比。 此外,该技术避免了在Σ-Δ环路内使用高分辨率闪存ADC的相关高耗能。
    • 2. 发明申请
    • IMPLANTABLE MEDICAL DEVICE WITH LOW POWER DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER
    • 具有低功耗DELTA-SIGMA模拟到数字转换器的可植入医疗设备
    • US20090079606A1
    • 2009-03-26
    • US11861920
    • 2007-09-26
    • Michael B. TerryMichael W. HeinksJoel A. AndersonMark A. Frigaard
    • Michael B. TerryMichael W. HeinksJoel A. AndersonMark A. Frigaard
    • H03M3/02
    • A61N1/3704H03M3/34H03M3/37H03M3/434
    • In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.
    • 通常,本公开描述了用于降低可植入医疗装置(IMD)内的功率消耗的技术。 植入患者体内的IMD可能具有有限的功率资源,这些功率资源将持续数年。 为了促进设备使用寿命,IMD的感测和治疗电路被设计为包含在相对低的操作频率下提供相对高分辨率输出的模数转换器(ADC),并且以相对较低的功耗来实现。 根据本文描述的技术设计的ADC利用具有比用于负反馈的数模转换器(DAC)更低的分辨率的量化器。 这种配置提供了更高分辨率DAC反馈的优点,而不需要使用导致高功耗的高过采样比。 此外,该技术避免了在Σ-Δ环路内使用高分辨率闪存ADC的相关高耗能。
    • 5. 发明授权
    • Detecting overloading of an analog-to-digital converter of an implantable medical device
    • 检测可植入医疗设备的模数转换器的过载
    • US07474247B1
    • 2009-01-06
    • US11861945
    • 2007-09-26
    • Michael W. HeinksJoel A. AndersonWenxiao Tan
    • Michael W. HeinksJoel A. AndersonWenxiao Tan
    • H03M1/12
    • H03M3/366A61N1/3706A61N1/3718H03M3/434
    • In general, this disclosure is related to detecting overload within an analog-to-digital converter (ADC) of an implantable medical device (IMD). The IMD may include an overload detection module that determines whether the ADC is operating in an overload condition. When the overload detection module determines the ADC is operating in the overload condition for a particular period of time, the ADC may send an overload signal to a processor that processes the output of the ADC. The overload signal notifies the processor that the ADC is operating in or is close to operating in the overload condition. In response to the indication from the ADC, the processor of the IMD may disregard the output of the ADC. The processor may continue to disregard the output of the ADC until the overload signal is deactivated, thereby indicating that the ADC is no longer in an overloaded condition.
    • 通常,本公开涉及检测可植入医疗装置(IMD)的模数转换器(ADC)中的过载。 IMD可以包括一个过载检测模块,用于确定ADC是否工作在过载状态。 当过载检测模块确定ADC在特定时间段内处于过载状态时,ADC可能会向处理ADC输出的处理器发送过载信号。 过载信号通知处理器ADC正在运行或接近工作在过载状态。 响应于ADC的指示,IMD的处理器可能会忽略ADC的输出。 处理器可以继续忽略ADC的输出,直到过载信号被去激活,从而指示ADC不再处于过载状态。
    • 6. 发明授权
    • Chopper-stabilized analog-to-digital converter
    • 斩波稳定的模数转换器
    • US07714757B2
    • 2010-05-11
    • US11861939
    • 2007-09-26
    • Timothy J. DenisonJoel A. AndersonMichael W. Heinks
    • Timothy J. DenisonJoel A. AndersonMichael W. Heinks
    • H03M3/00
    • A61B5/7203A61B5/04012A61B5/7217A61B5/7228A61B5/7242H03M3/34H03M3/39
    • This disclosure describes a chopper-stabilized sigma-delta analog-to-digital converter (ADC). The ADC is configured to provide accurate output at low frequency with relatively low power. The chopper-stabilized ADC substantially reduces or eliminates noise and offset from an output signal produced by the mixer amplifier. Dynamic limitations, i.e., glitching that result from chopper stabilization at low power are substantially eliminated or reduced through a combination of chopping at low impedance nodes within the mixer amplifier and feedback. The signal path of the ADC operates as a continuous time system, providing minimal aliasing of noise or external signals entering the signal pathway at the chop frequency or its harmonics. In this manner, the chopper-stabilized ADC can be used in a low power system, such as an implantable medical device (IMD), to provide a stable, low-noise output signal.
    • 本公开描述了斩波稳定的Σ-Δ模数转换器(ADC)。 ADC配置为以较低功率提供低频精确输出。 斩波稳定的ADC大大减少或消除了由混频放大器产生的输出信号的噪声和偏移。 通过在混频放大器和反馈中的低阻抗节点处的斩波的组合,基本上消除或减少动态限制,即,在低功率下由斩波器稳定产生的啁啾。 ADC的信号路径作为连续时间系统工作,在斩波频率或其谐波处提供噪声或进入信号通道的外部信号的最小混叠。 以这种方式,斩波稳定的ADC可以用在诸如可植入医疗设备(IMD)的低功率系统中,以提供稳定的低噪声输出信号。
    • 7. 发明申请
    • CHOPPER-STABILIZED ANALOG-TO-DIGITAL CONVERTER
    • CHOPPER稳定的模拟数字转换器
    • US20090079607A1
    • 2009-03-26
    • US11861939
    • 2007-09-26
    • Timothy J. DenisonJoel A. AndersonMichael W. Heinks
    • Timothy J. DenisonJoel A. AndersonMichael W. Heinks
    • H03M1/12H03M3/00
    • A61B5/7203A61B5/04012A61B5/7217A61B5/7228A61B5/7242H03M3/34H03M3/39
    • This disclosure describes a chopper-stabilized sigma-delta analog-to-digital converter (ADC). The ADC is configured to provide accurate output at low frequency with relatively low power. The chopper-stabilized ADC substantially reduces or eliminates noise and offset from an output signal produced by the mixer amplifier. Dynamic limitations, i.e., glitching that result from chopper stabilization at low power are substantially eliminated or reduced through a combination of chopping at low impedance nodes within the mixer amplifier and feedback. The signal path of the ADC operates as a continuous time system, providing minimal aliasing of noise or external signals entering the signal pathway at the chop frequency or its harmonics. In this manner, the chopper-stabilized ADC can be used in a low power system, such as an implantable medical device (IMD), to provide a stable, low-noise output signal.
    • 本公开描述了斩波稳定的Σ-Δ模数转换器(ADC)。 ADC配置为以较低功率提供低频精确输出。 斩波稳定的ADC大大减少或消除了由混频放大器产生的输出信号的噪声和偏移。 通过在混频放大器和反馈中的低阻抗节点处的斩波的组合,基本上消除或减少动态限制,即,在低功率下由斩波器稳定产生的啁啾。 ADC的信号路径作为连续时间系统工作,在斩波频率或其谐波处提供噪声或进入信号通道的外部信号的最小混叠。 以这种方式,斩波稳定的ADC可以用在诸如可植入医疗设备(IMD)的低功率系统中,以提供稳定的低噪声输出信号。
    • 8. 发明授权
    • Capacitive digital-to-analog converter reset in an implantable medical device analog-to-digital converter
    • 可植入医疗器件模数转换器中的电容数模转换器复位
    • US07479910B1
    • 2009-01-20
    • US11861856
    • 2007-09-26
    • Michael W. HeinksJoel A. AndersonWenxiao Tan
    • Michael W. HeinksJoel A. AndersonWenxiao Tan
    • H03M3/00
    • A61N1/3704H03M3/382H03M3/39
    • In general, this disclosure describes techniques for capacitive digit-to-analog converter (CAPDAC) resetting in an implantable medical device (IMD) analog-to-digital converter (ADC). The CAPDAC of an IMD ADC may occasionally be reset to increase the accuracy of its output. The output of the CAPDAC may be disconnected from a negative feedback input of an integrator and connected to a pseudo load during the reset. Disconnecting the CAPDAC from the negative feedback input of the integrator reduces the affect of the reset on the integrator. During the reset of the CAPDAC, the negative feedback input of integrator is coupled to a sample and hold capacitor, which temporarily provides an input approximately equal to a previous, e.g., immediate, value of the output of CAPDAC prior to the reset. Thus, the resetting of the CAPDAC is done in such a manner that the affect of the reset on integrator is substantially reduced or eliminated.
    • 通常,本公开描述了用于可植入医疗设备(IMD)模数转换器(ADC)中的电容性数模转换器(CAPDAC)复位的技术。 IMD ADC的CAPDAC可能偶尔被复位以提高其输出的精度。 CAPDAC的输出可能与积分器的负反馈输入断开,并在复位期间连接到伪负载。 将CAPDAC与积分器的负反馈输入断开,降低了积分器上复位的影响。 在CAPDAC的复位期间,积分器的负反馈输入耦合到采样和保持电容器,其在复位之前临时提供大约等于CAPDAC的先前(例如)立即数的输出值的输入。 因此,CAPDAC的复位以这样的方式完成,使得积分器上的复位的影响被显着地减少或消除。