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1. 发明授权

US08008147B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08008147B2
公开(公告)日：2011-08-30
申请号：US12320278
申请日：2009-01-22
申请人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
发明人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
IPC分类号： H01L21/8238
CPC分类号： H01L27/11521 , H01L21/28194 , H01L21/28202 , H01L29/4933 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.
摘要翻译：可以尽可能地防止器件特性的劣化。半导体器件包括：半导体衬底; 栅极绝缘膜，设置在所述半导体衬底的上方并且含有金属，氧和添加元素; 设置在所述栅极绝缘膜上方的栅电极; 以及设置在栅电极两侧的半导体衬底中的源/漏区。添加元素是选自浓度为0.003原子％以上且3原子％以下的第5,6,15和16族元素中的至少一种元素。

2. 发明授权

US07834408B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07834408B2
公开(公告)日：2010-11-16
申请号：US12320279
申请日：2009-01-22
申请人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
发明人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , H01L21/28194 , H01L21/28202 , H01L29/4933 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.
摘要翻译：可以尽可能地防止器件特性的劣化。半导体器件包括：半导体衬底; 栅极绝缘膜，设置在所述半导体衬底的上方并且含有金属，氧和添加元素; 设置在所述栅极绝缘膜上方的栅电极; 以及设置在栅电极两侧的半导体衬底中的源/漏区。添加元素是选自浓度为0.003原子％以上且3原子％以下的第5,6,15和16族元素中的至少一种元素。

3. 发明授权

US07612413B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07612413B2
公开(公告)日：2009-11-03
申请号：US11461646
申请日：2006-08-01
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/823835
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on the substrate, the p-channel MIS transistor having a first gate electrode, and an n-channel MIS transistor formed on the substrate separately from the p-channel MIS transistor, the n-channel MIS transistor having a second gate electrode. Each of the first gate electrode and the second gate electrode is formed of an alloy of Ta and C in which a mole ratio of C to Ta (C/Ta) is from 2 to 4.
摘要翻译：半导体器件包括衬底，形成在衬底上的p沟道MIS晶体管，具有第一栅电极的p沟道MIS晶体管和与p沟道MIS晶体管分开形成在衬底上的n沟道MIS晶体管，该n沟道MIS晶体管具有第二栅电极。第一栅极电极和第二栅极电极由Ta和C的合金形成，其中C与Ta（C / Ta）的摩尔比为2〜4。

4. 发明授权

US07205618B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07205618B2
公开(公告)日：2007-04-17
申请号：US11052036
申请日：2005-02-08
申请人： Masato Koyama , Akira Nishiyama , Yuuichi Kamimuta
发明人： Masato Koyama , Akira Nishiyama , Yuuichi Kamimuta
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392 , H01L31/119 , H01L31/113
CPC分类号： H01L21/823814 , H01L21/823864
摘要： A semiconductor device includes a silicon substrate, a channel region formed in a surface of the silicon substrate, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film, first gate side walls formed on the gate insulating film to sandwich the gate electrode in a gate length direction, second gate side walls which sandwich the gate electrode and the first gate side wall, first diffused layers formed on the surface of the silicon substrate to sandwich the channel region, second diffused layers which sandwich the channel region and the first diffused layer and have a larger depth than that of the first diffused layer, and low resistance layers which are formed between the first diffused layer and the second gate side wall and contain nitride, boride or carbide of Ti, Zr, Hf or Ta.
摘要翻译：半导体器件包括硅衬底，形成在硅衬底的表面中的沟道区，形成在沟道区上的栅极绝缘膜，形成在栅极绝缘膜上的栅极，形成在栅极绝缘膜上的第一栅极侧壁夹着栅极电极和第一栅极侧壁的第二栅极侧壁，形成在硅衬底的表面上以夹持沟道区域的第一扩散层，夹着所述栅极电极和第二栅极侧壁的第二扩散层，沟道区域和第一扩散层，并且具有比第一扩散层的深度更大的深度，以及形成在第一扩散层和第二栅极侧壁之间的低电阻层，并且包含Ti，Zr的氮化物，硼化物或碳化物， Hf或Ta。

5. 发明授权

US07075158B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07075158B2
公开(公告)日：2006-07-11
申请号：US11244295
申请日：2005-10-06
申请人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
发明人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
IPC分类号： H01L29/76
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.
摘要翻译：可以制造具有低电阻的半导体器件，其器件特性不变化。半导体器件包括硅层，形成在硅层上的栅极电介质膜，形成在栅极电介质膜上的栅电极，并且包括部分结晶的氮化金属硅化物层，以及形成在栅电极两侧的硅层。

6. 发明授权

US07745888B2 Method of making p-channel and n-channel MIS transistors using single film formation of TaC 有权
标题翻译：使用TaC单膜形成制造p沟道和n沟道MIS晶体管的方法
公开(公告)号：US07745888B2
公开(公告)日：2010-06-29
申请号：US12232078
申请日：2008-09-10
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L29/76
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
摘要翻译：半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

7. 发明授权

US07646072B2 Semiconductor device and method for manufacturing the same 有权
公开(公告)号：US07646072B2
公开(公告)日：2010-01-12
申请号：US12320280
申请日：2009-01-22
申请人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
发明人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
IPC分类号： H01L29/78
CPC分类号： H01L27/11521 , H01L21/28194 , H01L21/28202 , H01L29/4933 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.

8. 发明授权

US07498643B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07498643B2
公开(公告)日：2009-03-03
申请号：US11373140
申请日：2006-03-13
申请人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
发明人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , H01L21/28194 , H01L21/28202 , H01L29/4933 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.
摘要翻译：可以尽可能地防止装置特性的劣化。半导体器件包括：半导体衬底; 栅极绝缘膜，设置在所述半导体衬底的上方并且含有金属，氧和添加元素; 设置在所述栅极绝缘膜上方的栅电极; 以及设置在栅电极两侧的半导体衬底中的源/漏区。添加元素是选自浓度为0.003原子％以上且3原子％以下的第5,6,15和16族元素中的至少一种元素。

9. 发明申请

US20070034902A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070034902A1
公开(公告)日：2007-02-15
申请号：US11373140
申请日：2006-03-13
申请人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
发明人： Yuuichi Kamimuta , Akira Nishiyama , Yasushi Nakasaki , Tsunehiro Ino , Masato Koyama
IPC分类号： H01L31/00
CPC分类号： H01L27/11521 , H01L21/28194 , H01L21/28202 , H01L29/4933 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain regions provided in the semiconductor substrate on both sides of the gate electrode. The additive element is at least one element selected from elements of Group 5, 6, 15, and 16 at a concentration of 0.003 atomic % or more but 3 atomic % or less.
摘要翻译：可以尽可能地防止器件特性的劣化。半导体器件包括：半导体衬底; 栅极绝缘膜，设置在所述半导体衬底的上方并且含有金属，氧和添加元素; 设置在所述栅极绝缘膜上方的栅电极; 以及设置在栅电极两侧的半导体衬底中的源/漏区。添加元素是选自浓度为0.003原子％以上且3原子％以下的第5,6,15和16族元素中的至少一种元素。

10. 发明申请

US20060186488A1 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060186488A1
公开(公告)日：2006-08-24
申请号：US11407066
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
摘要翻译：公开了一种半导体器件，其包括基板，形成在基板上方并且包含金属Si，N和O的绝缘膜，所述绝缘膜含有大于金属 - 金属键和金属-Si键的总和的金属-N键，以及形成在绝缘膜上方的电极。

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