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1. 发明授权

US08811470B2 Integrated circuit for video/audio processing 有权
标题翻译：用于视频/音频处理的集成电路
公开(公告)号：US08811470B2
公开(公告)日：2014-08-19
申请号：US10599494
申请日：2005-04-01
申请人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
发明人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
IPC分类号： H04N7/12
CPC分类号： G06F13/4027 , H04N5/775 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/7921 , H04N9/8042
摘要： An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.
摘要翻译：用于视频/音频处理的集成电路，其中通过开发视频/音频设备获得的设计资源也可以用于其他类型的视频/音频设备。集成电路包括微型计算机，其包括CPU，用于向外部设备输入/输出视频和音频流的流输入/输出，执行媒体处理的媒体处理器，该媒体处理包括至少一个压缩和解压缩视频，以及输入到流输入/输出的音频流，将由媒体处理器进行媒体处理的视频和音频流转换成视频和音频信号并将这些信号输出到外部设备的AV输入/输出。存储器接口控制微机，流输入/输出，媒体处理器和AV输入/输出之间的数据传输以及外部存储器。

2. 发明申请

US20070286275A1 Integated Circuit For Video/Audio Processing 有权
标题翻译：用于视频/音频处理的整数电路
公开(公告)号：US20070286275A1
公开(公告)日：2007-12-13
申请号：US10599494
申请日：2005-04-01
申请人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
发明人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
IPC分类号： H04B1/66 , G06F13/12
CPC分类号： G06F13/4027 , H04N5/775 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/7921 , H04N9/8042
摘要： The present invention provides an integrated circuit for video/audio processing in which the design resources obtained by the development of video/audio devices can be used also for other types of video/audio devices. The integrated circuit comprises a microcomputer block 2 including a CPU, a stream I/O block 4 for inputting/outputting video and audio streams to and from an external device, a media processing block 3 for executing the media processing including at least one of the compression and decompression of the video and audio streams, etc. inputted to the stream I/O block 4, an AV IO block 5 for converting the video and audio streams subjected to the media processing in the media processing block 3 into video and audio signals and outputting these signals to the external device, etc, and a memory IF block 6 for controlling the data transfer between the microcomputer block 2, the stream I/C block 4, the media processing block 3 and the AV IO block 5 and an external memory 9.
摘要翻译：本发明提供了一种用于视频/音频处理的集成电路，其中通过开发视频/音频设备获得的设计资源也可以用于其他类型的视频/音频设备。该集成电路包括一个包括CPU的微处理器块2，用于向外部设备输入/输出视频和音频流的流I / O块4，用于执行媒体处理的媒体处理块3，包括至少一个输入到流I / O块4的视频和音频流等的压缩和解压缩，用于将经过媒体处理块3中的媒体处理的视频和音频流转换成视频和音频信号的AV IO块5 并将这些信号输出到外部设备等;以及存储器IF块6，用于控制微计算机块2，流I / C块4，媒体处理块3和AV IO块5之间的数据传输，以及外部记忆9。

3. 发明申请

US20120058924A1 WORKING FLUID FOR BRITTLE MATERIAL AND WORKING FLUID FOR HARD MATERIAL 审中-公开
标题翻译：用于脆性材料的工作流体和用于硬质材料的工作流体
公开(公告)号：US20120058924A1
公开(公告)日：2012-03-08
申请号：US13259611
申请日：2010-03-19
申请人： Tomohiko Kitamura
发明人： Tomohiko Kitamura
IPC分类号： C10M145/14 , C10M145/26
CPC分类号： C10M173/02 , C10M2207/022 , C10M2207/126 , C10M2209/084 , C10M2209/10 , C10M2209/103 , C10M2209/104 , C10M2209/107 , C10M2215/042 , C10N2220/021 , C10N2220/023 , C10N2230/02 , C10N2230/04 , C10N2230/06 , C10N2240/50 , C10N2210/01 , C10M2209/105
摘要： Provided is a water-containing working fluid for a brittle material and a hard material, which includes (A) water, (B) a water soluble polymeric compound having an oxygen-containing group and a number average molecular weight of 6,000 to 3,000,000, and (C) a nonionic surfactant having a clouding point of 10 to 70° C. in a 1% by mass aqueous solution. In a loose-abrasive grain method, the working fluid allows a slurry thereof to be supplied into the working gap sufficiently and has excellent abrasive grain dispersion stability and excellent properties to wash and disperse cutting swarf. In a method using a fixed-abrasive grain wire saw, the working fluid rarely causes detachment of the fixed abrasive grains and has excellent properties to wash and disperse cutting swarf.
摘要翻译：本发明提供一种脆性材料和硬质材料的含水工作流体，其包括（A）水，（B）具有含氧基团的数均分子量为6000〜3,000万的水溶性高分子化合物，以及（C）1质量％水溶液中的浊点为10〜70℃的非离子表面活性剂。在松散磨粒方法中，工作流体允许其浆料充分地供应到工作间隙中，并且具有优异的磨料颗粒分散稳定性和用于洗涤和分散切割切屑的优异性能。在使用固定磨粒锯线的方法中，工作流体很少导致固定磨粒的分离，并且具有优异的洗涤和分散切割切屑的性质。

4. 发明申请

US20110196994A1 DMA CONTROL DEVICE AND DATA TRANSFER METHOD 审中-公开
标题翻译： DMA控制设备和数据传输方法
公开(公告)号：US20110196994A1
公开(公告)日：2011-08-11
申请号：US12675460
申请日：2008-08-12
申请人： Masaaki Harada , Tomohiko Kitamura , Tsutomu Sekibe
发明人： Masaaki Harada , Tomohiko Kitamura , Tsutomu Sekibe
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F21/85
摘要： A DMA control device and a data transfer method, which make it possible to use a DMA channel independent of an operation mode of a processor and realize the protection of DMA control parameters during DMA operation (during a data transfer), while reducing the number of shift of an operating mode of the processor as small as possible, are provided. In requesting a DMA start by locking an access to a ch-0 DMA control register 114 in a secure mode, a CPU 101 instructs an unlock set register 118 to release an access lock when the transfer is completed. Then, when a parameter controlling circuit 119 receives a notification of transfer completion from a ch-0 state managing circuit 116, such parameter controlling circuit instructs a lock set register 115 to release the lock in accordance with the setting of the unlock set register 118.
摘要翻译：一种DMA控制装置和数据传输方法，其可以独立于处理器的操作模式使用DMA通道，并且在DMA操作期间（在数据传输期间）实现对DMA控制参数的保护，同时减少提供了尽可能小的处理器的操作模式的移动。在通过在安全模式下锁定对ch-0 DMA控制寄存器114的访问来请求DMA开始时，CPU 101指示解锁设置寄存器118在传送完成时释放访问锁定。然后，当参数控制电路119从ch-0状态管理电路116接收到传送完成的通知时，该参数控制电路根据解锁设定寄存器118的设定指示锁定设定寄存器115释放锁定。

5. 发明申请

US20050108774A1 Content reproduction apparatus and reproduction method 有权
标题翻译：内容再现装置和再现方法
公开(公告)号：US20050108774A1
公开(公告)日：2005-05-19
申请号：US11022393
申请日：2004-12-23
申请人： Hiroko Sugimoto , Tomohiko Kitamura
发明人： Hiroko Sugimoto , Tomohiko Kitamura
IPC分类号： H04N5/76 , H04N7/16 , H04N21/258 , H04N21/262 , H04N21/431 , H04N21/45 , H04N21/458 , H04N21/485 , H04N21/81 , H04N7/173 , H04H9/00
CPC分类号： H04N21/26208 , H04N5/76 , H04N7/162 , H04N21/25866 , H04N21/4316 , H04N21/4532 , H04N21/458 , H04N21/485 , H04N21/812
摘要： A content reproduction apparatus functioning to (a) reproduce broadcast program content (“BC”), being image, sound, and other data, that has been received, (b) store commercial content (“CC”), being data such as commercials, announcements, and the like, and (c) cancel the reproduction of the CC during specified broadcast programs.
摘要翻译：一种内容再现装置，其功能是（a）再现已经接收到的作为图像，声音和其他数据的广播节目内容（“BC”），（b）存储广告内容（“CC”），作为诸如广告的数据，公告等，（c）在指定的广播节目中取消CC的再现。

6. 发明授权

US06477606B1 Bus system and a master device that stabilizes bus electric potential during non-access periods 有权
标题翻译：总线系统和主设备，可在非访问期间稳定总线电位
公开(公告)号：US06477606B1
公开(公告)日：2002-11-05
申请号：US09378548
申请日：1999-08-20
申请人： Osamu Kawamura , Tomohiko Kitamura , Tsutomu Sekibe
发明人： Osamu Kawamura , Tomohiko Kitamura , Tsutomu Sekibe
IPC分类号： G06F1314
CPC分类号： G06F13/423 , Y02D10/14 , Y02D10/151
摘要： A master device in a system including a bidirectional bus and at least one device manages whether the system is in an access state in which the master device permits an access to or from one device or a non-access state in which the master device permits an access to none of the devices. The master device drives the bidirectional bus using a predetermined current to transfer data to or from one device connected to the bidirectional bus when the system is in the access state. When the state of the system changes from the access state to the non-access state, the master device drives the bidirectional bus in order to stabilize the potential of the bidirectional bus to keep the bus potential from changing when the system is in a non-access state, thereby eliminating the need for conventional pull-up/pull-down resistors for stabilizing the bus potential during a non-access state.
摘要翻译：包括双向总线和至少一个设备的系统中的主设备管理系统是否处于主设备允许接入或来自一个设备的接入状态或主设备允许的非接入状态无法访问任何设备。当系统处于访问状态时，主设备使用预定的电流来驱动双向总线，以将数据传送到连接到双向总线的一个设备。当系统的状态从访问状态变为非访问状态时，主设备驱动双向总线，以便稳定双向总线的电位，以便在系统处于非接入状态时保持总线电位不变，从而消除了在非访问状态期间稳定总线电位的常规上拉/下拉电阻的需要。

7. 发明申请

US20110305234A1 NETWORK POSITIONING SYSTEM AND TERMINAL POSITIONING DEVICE 有权
标题翻译：网络定位系统和终端定位设备
公开(公告)号：US20110305234A1
公开(公告)日：2011-12-15
申请号：US13203052
申请日：2010-08-31
申请人： Tomohiko Kitamura
发明人： Tomohiko Kitamura
IPC分类号： H04W16/24
CPC分类号： H04W40/20 , H04W40/244
摘要： A terminal positioning device (150) receives, from each terminal (501-506), network path information listing intermediary device identifiers that identify each intermediary device in the network on the path from the terminal to a path search target device (100). The terminal positioning device (150) creates, in accordance with the network path information received from each terminal (501-506), terminal position information representing relations of connection between routers and relations of connection between routers and the terminals (501-506).
摘要翻译：终端定位设备（150）从每个终端（501-506）接收网络路径信息，其中列出了从终端到路径搜索目标设备（100）的路径上标识网络中的每个中间设备的中间设备标识符。终端定位装置（150）根据从每个终端（501-506）接收的网络路径信息，创建表示路由器之间的连接与路由器与终端之间的连接关系的终端位置信息（501-506）。

8. 发明授权

US06804742B1 System integrated circuit 失效
标题翻译：系统集成电路
公开(公告)号：US06804742B1
公开(公告)日：2004-10-12
申请号：US09711432
申请日：2000-11-13
申请人： Tomohiko Kitamura , Masataka Osaka , Tsutomu Sekibe
发明人： Tomohiko Kitamura , Masataka Osaka , Tsutomu Sekibe
IPC分类号： G06F1336
CPC分类号： G06F11/366 , G06F11/364 , G06F11/3648
摘要： A system integrated circuit that identifies the cause of a malfunction even if the number of output terminals of a system LSI to be assigned to internal buses in the system LSI is strictly restricted. Comparators 11 to 15 are connected to any of a plurality of buses. Each comparator judges whether a certain expected value matches data transferred on a bus connected to the comparator. The selector unit 10 selects one of the plurality of buses in accordance with the judgement result of the comparator, and outputs data transferred on the selected bus to outside the system integrated circuit so that an observer can observe internal state of the system integrated circuit from outside.
摘要翻译：即使系统LSI中分配给内部总线的系统LSI的输出端子数量受到严格限制，也能够识别故障原因的系统集成电路。比较器11至15连接到多个总线中的任一个。每个比较器判断某个预期值是否匹配与连接到比较器的总线上传输的数据。选择器单元10根据比较器的判断结果选择多个总线中的一个，并将在所选择的总线上传送的数据输出到系统集成电路外部，使得观察者可以从外部观察系统集成电路的内部状态。

9. 发明授权

US08681760B2 Network positioning system and terminal positioning device 有权
标题翻译：网络定位系统和终端定位装置
公开(公告)号：US08681760B2
公开(公告)日：2014-03-25
申请号：US13203052
申请日：2010-08-31
申请人： Tomohiko Kitamura
发明人： Tomohiko Kitamura
IPC分类号： H04W4/00
CPC分类号： H04W40/20 , H04W40/244
摘要： A terminal positioning device receives, from each terminal, network path information listing intermediary device identifiers that identify each intermediary device in the network on the path from the terminal to a path search target device. The terminal positioning device creates, in accordance with the network path information received from each terminal, terminal position information representing connections between routers and connections between routers and the terminals.
摘要翻译：终端定位设备从每个终端接收网络路径信息，其中列出了从终端到路径搜索目标设备的路径中标识网络中的每个中间设备的中间设备标识符。终端定位设备根据从每个终端接收到的网络路径信息，创建表示路由器与路由器与终端之间的连接之间的连接的终端位置信息。

10. 发明授权

US08180990B2 Integrated circuit including a plurality of master circuits transmitting access requests to an external device and integrated circuit system including first and second interated circuits each including a plurality of master circuits transmitting access requests 有权
标题翻译：包括向外部设备发送访问请求的多个主电路的集成电路和包括第一和第二相互连接的电路的集成电路系统，每个电路包括多个发送访问请求的主电路
公开(公告)号：US08180990B2
公开(公告)日：2012-05-15
申请号：US12282058
申请日：2007-01-19
申请人： Tomohiko Kitamura
发明人： Tomohiko Kitamura
IPC分类号： G06F12/00
CPC分类号： G06F13/1605 , G06F13/364
摘要： A main LSI includes a plurality of master circuits transmitting access requests to a SDRAM, and includes an input interface receiving an access request from a master circuit in a sub LSI. Further, the main LSI includes an arbitration circuit receiving the access requests from the internal master circuits and from the input interface, sequentially selecting, in accordance with a predetermined arbitration rule, a master circuit to be allowed to access the SDRAM, and determining output timings for addresses pertaining to the data transfers from the sequentially selected master circuits. The main LSI also includes an access signal generation circuit causing the sequentially selected master circuits to access the SDRAM in accordance with the corresponding output timings.
摘要翻译：主LSI包括向SDRAM发送访问请求的多个主电路，并且包括从子LSI中的主电路接收访问请求的输入接口。此外，主LSI包括仲裁电路，其接收来自内部主电路和输入接口的访问请求，根据预定的仲裁规则顺序地选择要允许访问SDRAM的主电路，并且确定输出定时用于与依次选择的主电路的数据传输有关的地址。主LSI还包括一个访问信号发生电路，使得依次选择的主电路根据相应的输出定时访问SDRAM。

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