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1. 发明授权

US08160632B2 Method for controlling power in dual-standby mode mobile terminal and apparatus thereof 失效
标题翻译：用于控制双待机模式移动终端电力的方法及其装置
公开(公告)号：US08160632B2
公开(公告)日：2012-04-17
申请号：US12431343
申请日：2009-04-28
申请人： Mathew Lee , Young Deuk An , Ki Yong Lee , Jae Suk Kim
发明人： Mathew Lee , Young Deuk An , Ki Yong Lee , Jae Suk Kim
IPC分类号： H04B7/00
CPC分类号： H04W52/287 , H04W88/06
摘要： The present invention relates to a method for controlling a transmission power of a dual standby mode mobile terminal. A method of controlling a transmission power of the invention includes performing a conversation standby service with a first communications network while performing a conversation service with a second communications network, and receiving a first power control level from a base station of the first communications network; comparing a second power control level that corresponds to a power code, which is set for a current output signal power, with the first power control level; and decreasing a current power code when the first power control level is greater than or equal to the second power control level.
摘要翻译：本发明涉及一种用于控制双待机模式移动终端的发射功率的方法。一种控制本发明的发送功率的方法包括在与第二通信网络进行对话服务的同时，与第一通信网络进行会话备用服务，以及从第一通信网络的基站接收第一功率控制级别; 将对应于针对当前输出信号功率设置的功率代码的第二功率控制电平与第一功率控制电平进行比较; 以及当所述第一功率控制电平大于或等于所述第二功率控制电平时，减小当前功率代码。

2. 发明授权

US07553720B2 Non-volatile memory device and fabrication method thereof 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US07553720B2
公开(公告)日：2009-06-30
申请号：US11604222
申请日：2006-11-27
申请人： Byoung Deog Choi , Ki Yong Lee , Ho Kyoon Chung , Jun Sin Yi , Sung Wook Jung , Hyun Min Kim , Jun Sik Kim
发明人： Byoung Deog Choi , Ki Yong Lee , Ho Kyoon Chung , Jun Sin Yi , Sung Wook Jung , Hyun Min Kim , Jun Sik Kim
IPC分类号： H01L21/8238 , H01L21/336
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/513
摘要： A non-volatile memory device includes a buffer oxide film on a substrate; a polysilicon layer on the buffer oxide film; a silicon oxy-nitride (SiON) layer on the polysilicon layer, a first insulator layer on the SiON layer, a nitride film on the first insulator, a second insulator layer on the nitride film, an electrode on the second insulator, and a source/drain in the polysilicon layer.
摘要翻译：非易失性存储器件包括在衬底上的缓冲氧化膜; 缓冲氧化膜上的多晶硅层; 所述多晶硅层上的硅氮化物（SiON）层，所述SiON层上的第一绝缘体层，所述第一绝缘体上的氮化物膜，所述氮化物膜上的第二绝缘体层，所述第二绝缘体上的电极和源极 /漏极在多晶硅层。

3. 发明申请

US20090156065A1 MULTIPLE GROUND TERMINAL ASSEMBLY FOR VEHICLES 有权
标题翻译：多用途车辆终端总成
公开(公告)号：US20090156065A1
公开(公告)日：2009-06-18
申请号：US12276639
申请日：2008-11-24
申请人： Ki Yong Lee
发明人： Ki Yong Lee
IPC分类号： H01R11/01 , H01R33/00
CPC分类号： H01R11/12 , H01R4/305 , H01R4/34
摘要： Disclosed herein is a multiple ground terminal assembly for vehicles. The multiple ground terminal assembly includes a multiple ground terminal unit 100 and a ground bolt 200, and can be formed by layering multiple ground terminals 110 to be in surface contact with each other.
摘要翻译：这里公开了一种用于车辆的多地面终端组件。多接地端子组件包括多个接地端子单元100和接地螺栓200，并且可以通过将多个接地端子110层叠以彼此表面接触而形成。

4. 发明授权

US06825494B2 Polycrystalline silicon thin film used in a thin film transistor and a device using the same 有权
标题翻译：用于薄膜晶体管的多晶硅薄膜及使用其的器件
公开(公告)号：US06825494B2
公开(公告)日：2004-11-30
申请号：US10454612
申请日：2003-06-05
申请人： Ki Yong Lee , Ji Yong Park , Woo Young So
发明人： Ki Yong Lee , Ji Yong Park , Woo Young So
IPC分类号： H01L31036
CPC分类号： H01L29/78696 , H01L27/1285 , H01L27/1296 , H01L29/04 , H01L29/78672
摘要： A polycrystalline silicon thin film of a TFT in which probabilities P1 and P2 for which the maximum number of respective primary crystal grain boundaries for transistors TR1 and TR2 arranged perpendicular to each other are contained in active channel regions are P1=(D1−(Nmax1−1)*Gs1)/Gs1 and P2=(D2−(Nmax2−1)*Gs2)/Gs2: where P1 or P2 is not 0.5, D1=L1 cos &thgr;, W1 sin &thgr;, D2=L2 cos&thgr;+W2 sin &thgr;, L1 and L2 are lengths of active channels, and W1 and W2 are widths of the active channels, of the transistors TR1 and TR2, Nmax1 and Nmax2 are the maximum numbers of the primary crystal grain boundaries contained in the active channel regions for each of TR1 and TR2, Gs1 and Gs2 are crystal grain sizes having a fatal effect on characteristics of each of TR1 and TR2, and &thgr; is an angle in which the primary crystal grain boundaries are inclined perpendicular to an active channel direction of the respective transistors TR1 and TR2.
摘要翻译：在有源沟道区域中包含TFT的多晶硅薄膜，其中在有源沟道区域中包含晶体管TR1和TR2的各自的主晶粒边界的最大数目的概率P1和P2为P1 =（D1-（Nmax1- 1）* Gs1）/ Gs1和P2 =（D2-（Nmax2-1）* Gs2）/ Gs2：其中P1或P2不为0.5，D1 = L1cosθ，W1sinθ，D2 = L2 costheta +W2sinθ ，L1和L2是有源沟道的长度，并且W1和W2是晶体管TR1和TR2的有源沟道的宽度，Nmax1和Nmax2是包含在每个的有源沟道区域中的主晶粒边界的最大数量 TR1和TR2，Gs1和Gs2是对TR1和TR2中每一个的特性具有致命影响的晶粒尺寸，θ是垂直于各个晶体管TR1和TR2的有源沟道方向倾斜的角度 TR2。

5. 发明授权

US09282626B2 Printed circuit board and method for manufacturing the same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US09282626B2
公开(公告)日：2016-03-08
申请号：US13880896
申请日：2011-07-01
申请人： Jae Hyoun Yoo , Hyung Jong Kim , Jun Soo Park , Ki Yong Lee , Jin Goo Jeon
发明人： Jae Hyoun Yoo , Hyung Jong Kim , Jun Soo Park , Ki Yong Lee , Jin Goo Jeon
IPC分类号： H05K3/02 , H05K3/04 , H05K3/46 , H05K1/02 , H05K3/00
CPC分类号： H05K1/02 , H05K3/0035 , H05K3/4697 , H05K2201/09127
摘要： Disclosed are a printed circuit board and a method for manufacturing the same. The method for manufacturing the printed circuit board includes forming a base circuit board including a cavity circuit pattern in a cavity region on upper and lower portions of a substrate and internal circuit layers outside the cavity region, forming a cavity separation layer on the cavity circuit pattern, forming at least one pair of an insulating layer and a circuit layer on the base circuit board, cutting the insulating layer and the cavity separation layer provided on an etch stop pattern by controlling a focal length of a laser beam such that the laser beam reaches a surface of the base circuit board, and removing the insulating layer by separating the cavity separation layer to form the cavity. The cavity separation layer is formed on the cavity circuit pattern, and the resultant structure is cut to the cavity separation layer by using a laser so that the insulating layer is separated. Accordingly, the insulating layer in the cavity is easily removed.
摘要翻译：公开了一种印刷电路板及其制造方法。制造印刷电路板的方法包括在基板的上部和下部的空腔区域中形成包括空腔电路图案的基底电路板和在腔区域外部的内部电路层，在空腔电路图案上形成空腔分离层在所述基底电路板上形成至少一对绝缘层和电路层，通过控制所述激光束的焦距来切割设置在所述蚀刻停止图案上的所述绝缘层和所述腔分离层，使得所述激光束到达基底电路板的表面，并且通过分离空腔分离层以形成空腔来去除绝缘层。空腔分离层形成在空腔电路图案上，并且通过使用激光将所得结构切割到空腔分离层，使得绝缘层被分离。因此，容易去除空腔中的绝缘层。

6. 发明申请

US20130299223A1 PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20130299223A1
公开(公告)日：2013-11-14
申请号：US13880896
申请日：2011-07-01
申请人： Jae Hyoun Yoo , Hyung Jong Kim , Jun Soo Park , Ki Yong Lee , Jin Goo Jeon
发明人： Jae Hyoun Yoo , Hyung Jong Kim , Jun Soo Park , Ki Yong Lee , Jin Goo Jeon
IPC分类号： H05K1/02 , H05K3/46
CPC分类号： H05K1/02 , H05K3/0035 , H05K3/4697 , H05K2201/09127
摘要： Disclosed are a printed circuit board and a method for manufacturing the same. The method for manufacturing the printed circuit board includes forming a base circuit board including a cavity circuit pattern in a cavity region on upper and lower portions of a substrate and internal circuit layers outside the cavity region, forming a cavity separation layer on the cavity circuit pattern, forming at least one pair of an insulating layer and a circuit layer on the base circuit board, cutting the insulating layer and the cavity separation layer provided on an etch stop pattern by controlling a focal length of a laser beam such that the laser beam reaches a surface of the base circuit board, and removing the insulating layer by separating the cavity separation layer to form the cavity. The cavity separation layer is formed on the cavity circuit pattern, and the resultant structure is cut to the cavity separation layer by using a laser so that the insulating layer is separated. Accordingly, the insulating layer in the cavity is easily removed.
摘要翻译：公开了一种印刷电路板及其制造方法。制造印刷电路板的方法包括在基板的上部和下部的空腔区域中形成包括空腔电路图案的基底电路板和在腔区域外部的内部电路层，在空腔电路图案上形成空腔分离层在所述基底电路板上形成至少一对绝缘层和电路层，通过控制所述激光束的焦距来切割设置在所述蚀刻停止图案上的所述绝缘层和所述腔分离层，使得所述激光束到达基底电路板的表面，并且通过分离空腔分离层以形成空腔来去除绝缘层。空腔分离层形成在空腔电路图案上，并且通过使用激光将所得结构切割到空腔分离层，使得绝缘层被分离。因此，容易去除空腔中的绝缘层。

7. 发明申请

US20130288842A1 CONTINUOUSLY VARIABLE SPEED GEAR SET 审中-公开
标题翻译：连续可变速度齿轮组
公开(公告)号：US20130288842A1
公开(公告)日：2013-10-31
申请号：US13989788
申请日：2011-11-24
申请人： David Hyung Kim , Ki Yong Lee , Kwang Yong Shin
发明人： David Hyung Kim , Ki Yong Lee , Kwang Yong Shin
IPC分类号： F16H3/72
CPC分类号： F16H3/725 , F16H3/724 , F16H2200/2005
摘要： There is disclosed a continuously variable speed gear set including a driving input shaft, a carrier extended from one end of the driving input shaft to rotate integrally with the driving input shaft, a spindle gear provided in a predetermined portion of the carrier to relatively rotate with respect to the driving input shaft, the spindle gear comprising a shaft identical to the driving input shaft, a planetary gear arranged in the carrier, a driving output gear comprising a shaft arranged on the same line with the axis of the driving input shaft to relatively rotate, the driving output gear engaging with the planetary gear rotating and revolving along the rotation of the carrier to receive a rotation force from the planetary force, and a transmission input unit configured to control a rotation speed of the driving output gear by controlling a rotation speed of the spindle gear.
摘要翻译：公开了一种无级变速齿轮组，包括驱动输入轴，从驱动输入轴的一端延伸以与驱动输入轴一体旋转的载体，设置在载体的预定部分中以相对旋转的主轴齿轮，相对于驱动输入轴，主轴齿轮包括与驱动输入轴相同的轴，布置在载体中的行星齿轮，驱动输出齿轮，其包括与驱动输入轴的轴线布置在同一直线上的相对所述驱动输出齿轮与所述行星齿轮接合，所述行星齿轮沿着所述载体的旋转而旋转并旋转，以接收来自所述行星力的旋转力;以及变速器输入单元，被配置为通过控制所述驱动输出齿轮的旋转来控制所述驱动输出齿轮的转速主轴齿轮转速。

8. 发明授权

US08383461B2 Method for manufacturing semiconductor package having improved bump structures 失效
标题翻译：具有改善的凸块结构的半导体封装的制造方法
公开(公告)号：US08383461B2
公开(公告)日：2013-02-26
申请号：US12260231
申请日：2008-10-29
申请人： Ki Yong Lee , Seung Kweon Ha
发明人： Ki Yong Lee , Seung Kweon Ha
IPC分类号： H01L21/00
CPC分类号： H01L21/6835 , H01L21/4846 , H01L25/105 , H01L2221/68345 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/15331 , H05K3/205 , H05K3/4007 , H05K3/4644 , H05K2201/0367 , H01L2224/05599
摘要： A method for manufacturing a semiconductor package includes the steps of forming first circuit patterns on an upper surface of a carrier substrate. Bumps are formed in recesses defined on the upper surface of the carrier substrate. An insulation layer is formed on the upper surface of the carrier substrate to cover the first circuit patterns. Second circuit patterns are formed on an upper surface of the insulation layer so as to be electrically connected with the first circuit patterns. The carrier substrate is then separated from the insulation layer.
摘要翻译：一种制造半导体封装件的方法包括以下步骤：在载体衬底的上表面上形成第一电路图案。凸起形成在限定在载体基板的上表面上的凹部中。在载体基板的上表面上形成绝缘层以覆盖第一电路图案。第二电路图案形成在绝缘层的上表面上，以便与第一电路图案电连接。然后将载体衬底与绝缘层分离。

9. 发明授权

US08314428B2 Thin film transistor with LDD/offset structure 有权
标题翻译：具LDD /偏移结构的薄膜晶体管
公开(公告)号：US08314428B2
公开(公告)日：2012-11-20
申请号：US10734162
申请日：2003-12-15
申请人： Ji Yong Park , Ki Yong Lee , Hye Hyang Park
发明人： Ji Yong Park , Ki Yong Lee , Hye Hyang Park
IPC分类号： H01L27/14
CPC分类号： H01L29/78696 , H01L27/1296 , H01L29/04 , H01L29/66757 , H01L29/78621 , H01L29/78675
摘要： A thin film transistor including a lightly doped drain (LDD) region or offset region, wherein the thin film transistor is formed so that primary crystal grain boundaries of a polysilicon substrate are not positioned in the LDD or offset region.
摘要翻译：一种薄膜晶体管，包括轻掺杂漏极（LDD）区域或偏移区域，其中所述薄膜晶体管形成为使得多晶硅衬底的初晶晶界不位于LDD或偏移区域中。

10. 发明授权

US07867044B2 Multiple ground terminal assembly for vehicles 有权
标题翻译：用于车辆的多个接地端子组件
公开(公告)号：US07867044B2
公开(公告)日：2011-01-11
申请号：US12276639
申请日：2008-11-24
申请人： Ki Yong Lee
发明人： Ki Yong Lee
IPC分类号： H01R11/11
CPC分类号： H01R11/12 , H01R4/305 , H01R4/34
摘要： Disclosed herein is a multiple ground terminal assembly for vehicles. The multiple ground terminal assembly includes a multiple ground terminal unit 100 and a ground bolt 200, and can be formed by layering multiple ground terminals 110 to be in surface contact with each other.
摘要翻译：这里公开了一种用于车辆的多地面终端组件。多接地端子组件包括多个接地端子单元100和接地螺栓200，并且可以通过将多个接地端子110层叠以彼此表面接触而形成。

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