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    • 5. 发明授权
    • Private key delivery system and a private key delivery method
    • 私钥交付系统和私钥交付方式
    • US07801309B2
    • 2010-09-21
    • US11209677
    • 2005-08-24
    • Kazuya TakemotoTatsuya Usuki
    • Kazuya TakemotoTatsuya Usuki
    • H04L9/08H04L9/00G06E3/00
    • B82Y20/00B82Y10/00H04L9/0858H04L2209/56
    • A private key delivery system and a private key delivery method are disclosed. The private key delivery system includes a transmitter, a receiver, and an optical transmission line connecting the transmitter and the receiver. The transmitter includes a single photon generating unit for simultaneously generating two or more single photons having different wavelengths using a quantum dot structure that has quantum dots of various sizes, an optical splitter for splitting the single photons by wavelengths, a phase modulating unit for modulating each of the single photons split by the wavelengths with private key information, and an optical multiplexer for multiplexing the modulated single photons of the different wavelength and for transmitting the multiplexed single photons to the optical transmission line. The multiplexed single photons are received by the receiver, and the private key information is taken out from the received single photons.
    • 公开了私钥传送系统和私钥递送方法。 私钥传送系统包括发射机,接收机和连接发射机和接收机的光传输线路。 发射机包括单个光子产生单元,用于使用具有各种尺寸的量子点的量子点结构同时产生具有不同波长的两个或更多个单个光子,用于通过波长分割单个光子的光分路器,用于调制每个光子的相位调制单元 由具有私钥信息的波长分离的单个光子,以及用于复用不同波长的调制单个光子并用于将多路复用单个光子发射到光传输线的光复用器。 复用的单个光子由接收机接收,并且从接收的单个光子中取出私钥信息。
    • 6. 发明申请
    • Private key delivery system and a private key delivery method
    • 私钥交付系统和私钥交付方式
    • US20060210083A1
    • 2006-09-21
    • US11209677
    • 2005-08-24
    • Kazuya TakemotoTatsuya Usuki
    • Kazuya TakemotoTatsuya Usuki
    • H04L9/00
    • B82Y20/00B82Y10/00H04L9/0858H04L2209/56
    • A private key delivery system and a private key delivery method are disclosed. The private key delivery system includes a transmitter, a receiver, and an optical transmission line connecting the transmitter and the receiver. The transmitter includes a single photon generating unit for simultaneously generating two or more single photons having different wavelengths using a quantum dot structure that has quantum dots of various sizes, an optical splitter for splitting the single photons by wavelengths, a phase modulating unit for modulating each of the single photons split by the wavelengths with private key information, and an optical multiplexer for multiplexing the modulated single photons of the different wavelength and for transmitting the multiplexed single photons to the optical transmission line. The multiplexed single photons are received by the receiver, and the private key information is taken out from the received single photons.
    • 公开了私钥传送系统和私钥递送方法。 私钥传送系统包括发射机,接收机和连接发射机和接收机的光传输线路。 发射机包括单个光子产生单元,用于使用具有各种尺寸的量子点的量子点结构同时产生具有不同波长的两个或更多个单个光子,用于通过波长分割单个光子的光分路器,用于调制每个光子的相位调制单元 由具有私钥信息的波长分离的单个光子,以及用于复用不同波长的调制单个光子并用于将多路复用单个光子发射到光传输线的光复用器。 复用的单个光子由接收机接收,并且从接收的单个光子中取出私钥信息。
    • 8. 发明授权
    • Direct tunneling semiconductor memory device and fabrication process thereof
    • 直接隧道半导体存储器件及其制造工艺
    • US07432153B2
    • 2008-10-07
    • US11898685
    • 2007-09-14
    • Kouji TsunodaTatsuya Usuki
    • Kouji TsunodaTatsuya Usuki
    • H01L21/336
    • H01L27/11521H01L27/115H01L29/42324H01L29/7883
    • A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.
    • 直接隧道半导体存储器件包括形成在半导体衬底上的器件隔离结构,包括器件隔离沟槽和填充器件隔离沟槽的器件隔离绝缘膜,覆盖两个侧壁表面的电介质膜和浮动栅极的顶表面 形成在所述半导体基板上的电极,经由所述电介质膜设置在所述浮栅电极的侧壁面上的导电部,构成控制栅电极的一部分的导体部,以及形成在所述第一扩散区 浮置栅电极,其中所述第一和第二扩散区形成在所述器件隔离槽的表面上,偏离所述浮置栅电极正下方的区域,所述导电部分形成在所述器件区域中,偏离所述器件隔离沟槽。
    • 10. 发明授权
    • Direct tunneling semiconductor memory device and fabrication process thereof
    • 直接隧道半导体存储器件及其制造工艺
    • US07288813B2
    • 2007-10-30
    • US11012277
    • 2004-12-16
    • Kouji TsunodaTatsuya Usuki
    • Kouji TsunodaTatsuya Usuki
    • H01L29/788
    • H01L27/11521H01L27/115H01L29/42324H01L29/7883
    • A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.
    • 直接隧道半导体存储器件包括形成在半导体衬底上的器件隔离结构,包括器件隔离沟槽和填充器件隔离沟槽的器件隔离绝缘膜,覆盖两个侧壁表面的电介质膜和浮动栅极的顶表面 形成在所述半导体基板上的电极,经由所述电介质膜设置在所述浮栅电极的侧壁面上的导电部,构成控制栅电极的一部分的导体部,以及形成在所述第一扩散区 浮置栅电极,其中所述第一和第二扩散区形成在所述器件隔离槽的表面上,偏离所述浮置栅电极正下方的区域,所述导电部分形成在所述器件区域中,偏离所述器件隔离沟槽。