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1. 发明授权

US07702307B2 Frequency modulation radio receiver including a noise estimation unit 失效
标题翻译：包括噪声估计单元的调频无线电接收机
公开(公告)号：US07702307B2
公开(公告)日：2010-04-20
申请号：US11374533
申请日：2006-03-13
申请人： Dana J. Taipale , G. Tyson Tuttle , Gerald D. Champagne , Javier Elenes
发明人： Dana J. Taipale , G. Tyson Tuttle , Gerald D. Champagne , Javier Elenes
IPC分类号： H04B17/00
CPC分类号： H04B1/1027 , H04B17/336
摘要： A frequency modulation (FM) radio receiver includes a processing unit that may generate a magnitude value corresponding to a signal strength of each of a plurality of digital samples of a received FM signal. The receiver also includes a noise estimation unit that may filter the magnitude values using a high pass filter and may generate a noise value representative of a noise portion of the received FM signal based upon the filtered magnitude values.
摘要翻译：一种频率调制（FM）无线电接收机包括一个处理单元，该处理单元可产生对应于所接收的FM信号的多个数字样本中的每一个的信号强度的幅度值。接收机还包括噪声估计单元，该噪声估计单元可以使用高通滤波器对幅度值进行滤波，并且可以基于滤波的幅值产生代表所接收的FM信号的噪声部分的噪声值。

2. 发明授权

US07835468B2 Impulse detection and reduction in a frequency modulation radio receiver 失效
标题翻译：调频无线电接收机的脉冲检测和减少
公开(公告)号：US07835468B2
公开(公告)日：2010-11-16
申请号：US11374577
申请日：2006-03-13
申请人： Javier Elenes , Dana J. Taipale
发明人： Javier Elenes , Dana J. Taipale
IPC分类号： H04L27/00 , H03K7/06 , H03D3/00
CPC分类号： H03D3/002 , H03D3/006
摘要： A radio receiver includes a processing unit that may generate a respective phase value corresponding to each of a plurality of digital samples of a received complex frequency modulation (FM) signal. The receiver also includes an impulse unit that may detect whether a linear combination of a phase value of a current sample and a phase value of one or more previous samples will produce an impulse at an output of an FM demodulator. If the impulse unit detects that an impulse will be produced at the output, the impulse unit may replace the output of the FM discriminator with a predetermined value.
摘要翻译：无线电接收机包括处理单元，该处理单元可以生成与接收的复频调制（FM）信号的多个数字样本中的每一个对应的各个相位值。接收机还包括一个脉冲单元，其可以检测当前采样的相位值和一个或多个先前采样的相位值的线性组合是否将在FM解调器的输出端产生脉冲。如果脉冲单元检测到在输出端产生脉冲，脉冲单元可以用预定值代替FM鉴频器的输出。

3. 发明授权

US06477679B1 Methods for decoding data in digital communication systems 有权
标题翻译：数字通信系统中数据解码的方法
公开(公告)号：US06477679B1
公开(公告)日：2002-11-05
申请号：US09499402
申请日：2000-02-07
申请人： Paula F. Such , Dana J. Taipale
发明人： Paula F. Such , Dana J. Taipale
IPC分类号： H03M1300
CPC分类号： H03M13/6502 , H03M13/3905
摘要： In a decoding system having a first constituent decoder and a second constituent decoder, a sequence of inputs that includes a system input, a first parity input, and a second parity input, is decoded. The first constituent decoder receives a feedback input and the first parity input, and based on these inputs, the first constituent decoder produces a first constituent decoder output. The output of the first constituent decoder is modified to obtain a first combined feedback and system input, thereby including a statistical dependency. The second constituent decoder receives this combined input and the second parity input and based on these inputs, produces a second constituent decoder output. The second constituent decoder output is processed to produce decoded bits. Embodiments further include modifying the output of the second constituent decoder and providing the modified output as the feedback to the first constituent decoder.
摘要翻译：在具有第一组成解码器和第二组成解码器的解码系统中，解码包括系统输入，第一奇偶校验输入和第二奇偶校验输入的输入序列。第一组成解码器接收反馈输入和第一奇偶校验输入，并且基于这些输入，第一组成解码器产生第一组成解码器输出。修改第一组成解码器的输出以获得第一组合反馈和系统输入，从而包括统计依赖性。第二组成解码器接收该组合输入和第二奇偶校验输入，并且基于这些输入，产生第二组成解码器输出。处理第二组成解码器输出以产生解码比特。实施例还包括修改第二组成解码器的输出并将经修改的输出提供给第一组成解码器的反馈。

4. 发明授权

US06477681B1 Methods for decoding data in digital communication systems 有权
标题翻译：数字通信系统中数据解码的方法
公开(公告)号：US06477681B1
公开(公告)日：2002-11-05
申请号：US09498852
申请日：2000-02-07
申请人： Dana J. Taipale , Paula F. Such
发明人： Dana J. Taipale , Paula F. Such
IPC分类号： H03M1300
CPC分类号： H03M13/3961 , H03M13/3905 , H03M13/6502
摘要： The present invention includes methods relating generally to communication systems. In decoding a sequence of symbols output by an encoder having a first constituent encoder and a second constituent encoder, where the output of these encoders correspond to unterminated trellises, a forward calculation is performed along each trellis to compute a forward state metric value for a first node of each trellis. Prior to performing a backward calculation along each trellis, a backward state metric value of a second node of each trellis is initialized to the forward state metric values of the corresponding first nodes of each trellis. Using these forward and backward state metric values, the sequence of symbols is decoded. Other embodiments include decoding terminated trellises in a similar manner, or dividing each trellis into smaller windows and processing the series of windows.
摘要翻译：本发明包括一般涉及通信系统的方法。在对由具有第一组成编码器和第二组成编码器的编码器输出的符号序列进行解码时，其中这些编码器的输出对应于未终结的网格，沿着每个格架执行正向计算，以计算第一每个网格的节点。在沿着每个网格执行反向计算之前，将每个网格的第二节点的后向状态量度值初始化为每个网格的对应的第一个节点的前向状态量度值。使用这些向前和向后状态度量值，对符号序列进行解码。其他实施例包括以类似的方式解码封闭的网格，或者将每个网格划分成更小的窗口并处理该系列窗口。

5. 发明申请

US20100266068A1 Low-IF terrestrial data receiver and related communication systems and methods 审中-公开
标题翻译：低IF地面数据接收机及相关通信系统及方法
公开(公告)号：US20100266068A1
公开(公告)日：2010-10-21
申请号：US12386537
申请日：2009-04-20
申请人： Lokesh K. Duraiappah , Dana J. Taipale , Wade R. Gillham , George Tyson Tuttle
发明人： Lokesh K. Duraiappah , Dana J. Taipale , Wade R. Gillham , George Tyson Tuttle
IPC分类号： H04L27/22
CPC分类号： H04L27/14 , H04L27/0008 , H04L27/22
摘要： Low-IF terrestrial data receivers and related communication systems and methods are disclosed that provide efficient solutions for reception of data services in FM broadcast channels. In particular, systems and methods are provided for data service information modulated on a 67.65 kHz sub-carrier, for example, using QPSK modulation. Intermediate data service information is output by the data receiver, and this intermediate data service information takes the form of demodulated digital I/Q signals provided through a digital interface of the data receiver. As such, partial digital signal processing is provided by the data receiver and the remaining digital processing is provided by a host processor.
摘要翻译：公开了低IF地面数据接收机和相关通信系统和方法，其提供用于在FM广播信道中接收数据业务的有效解决方案。具体地，提供了用于例如使用QPSK调制在67.65KHz子载波上调制的数据业务信息的系统和方法。中间数据业务信息由数据接收机输出，该中间数据业务信息采用通过数据接收机的数字接口提供的解调数字I / Q信号的形式。这样，部分数字信号处理由数据接收机提供，其余的数字处理由主处理器提供。

6. 发明授权

US06959035B2 Post-correlation interpolation for delay locked loops 有权
标题翻译：延迟锁定环路的后相关插值
公开(公告)号：US06959035B2
公开(公告)日：2005-10-25
申请号：US10033513
申请日：2001-12-26
申请人： Dana J. Taipale , Dipesh Koirala
发明人： Dana J. Taipale , Dipesh Koirala
IPC分类号： H04B1/7085 , H04B1/7095 , H04B1/69 , H04B1/707 , H04B1/713
CPC分类号： H04B1/7085 , H04B1/7095
摘要： A Code Division Multiple Access (CDMA) post-correlation processing system (12) for delay locked loop processing reduces the control data rate into a delay locked loop (DLL) processor and the number of required interpolation operations by executing a portion of the interpolation operations at a symbol data rate rather than at a chiprate. Specifically, an interpolator (16) generates time shifted chip samples based on input CDMA chip samples. First and second correlators (22, 24) extract ontime control and data symbol samples, respectively, from ontime input CDMA chip samples. A third correlator (26) extracts first non-ontime control symbol samples from non-ontime CDMA chip samples. The first non-ontime control symbol samples are then input with the ontime control symbol samples to a post-correlation interpolator (28) operating at a symbol rate to generate second non-ontime symbol samples necessary for Delay Locked Loop (DLL) processing.
摘要翻译：用于延迟锁定环路处理的码分多址（CDMA）后相关处理系统（12）通过执行插值操作的一部分将控制数据速率降低到延迟锁定环（DLL）处理器和所需插值操作的数量以符号数据速率而不是码率。具体地，内插器（16）基于输入的CDMA芯片样本生成时移芯片样本。第一和第二相关器（22,24）分别从准时输入的CDMA芯片样本中提取准时控制和数据符号采样。第三相关器（26）从非正时CDMA芯片样本中提取第一非开时控制符号样本。然后，将第一非接通时间控制符号样本随时间控制符号采样输入到以符号速率工作的后相关内插器（28），以产生延迟锁定环（DLL）处理所需的第二非开启时间符号采样。

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