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1. 发明申请

WO2014209693A1 POWER MANAGEMENT IN MULTI-DIE ASSEMBLIES 审中-公开
标题翻译：多模组件电源管理
公开(公告)号：WO2014209693A1
公开(公告)日：2014-12-31
申请号：PCT/US2014/042830
申请日：2014-06-18
申请人： INTEL CORPORATION , DROEGE, Guido , SCHAEFER, Andre , ZILLMANN, Uwe
发明人： DROEGE, Guido , SCHAEFER, Andre , ZILLMANN, Uwe
IPC分类号： H02J17/00 , H02J7/00 , H01F38/14
CPC分类号： H02J1/00 , G05F1/618 , G11C5/025 , G11C5/14 , G11C5/147 , G11C7/00 , H01L2924/19042 , H01L2924/19104 , H02M1/088
摘要： An apparatus such as heterogeneous device includes at least a first die and a second die. The apparatus further includes a first inductive element, a second inductive element, and switch control circuitry. The switch control circuitry is disposed in the first die. The switch control circuitry controls current through the first inductive element to produce a first voltage. The first voltage powers the first die. The second inductive element is coupled to the first inductive element. The second inductive element produces a second voltage to power the second die. The first die and second die can be fabricated in accordance with different technologies and in which the first die and second die withstand different maximum voltages. A magnitude of the first voltage can be greater than a magnitude of the second voltage.
摘要翻译：诸如异种装置的装置至少包括第一模具和第二模具。该装置还包括第一电感元件，第二电感元件和开关控制电路。开关控制电路设置在第一管芯中。开关控制电路控制通过第一电感元件的电流以产生第一电压。第一个电压为第一个模具供电。第二电感元件耦合到第一电感元件。第二电感元件产生第二电压以对第二管芯供电。第一模具和第二模具可以根据不同的技术制造，并且其中第一模具和第二模具耐受不同的最大电压。第一电压的大小可以大于第二电压的幅度。

2. 发明申请

WO2015099668A1 THROUGH-BODY-VIA ISOLATED COAXIAL CAPACITOR AND TECHNIQUES FOR FORMING SAME 审中-公开
标题翻译：通过分离的同轴电容器和形成其的技术
公开(公告)号：WO2015099668A1
公开(公告)日：2015-07-02
申请号：PCT/US2013/077559
申请日：2013-12-23
申请人： INTEL CORPORATION , LEE, Kevin, J. , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas, P. , SCHAEFER, Andre , JAIN, Rinkle , DROEGE, Guido
发明人： LEE, Kevin, J. , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas, P. , SCHAEFER, Andre , JAIN, Rinkle , DROEGE, Guido
IPC分类号： H01L27/108
CPC分类号： H01L23/5223 , H01L21/4846 , H01L21/486 , H01L21/4875 , H01L21/76898 , H01L21/8221 , H01L23/481 , H01L23/492 , H01L23/498 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L25/0657 , H01L27/0629 , H01L28/90 , H01L2225/06544 , H01L2924/0002 , H01L2924/00
摘要： Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).
摘要翻译：公开了用于在半导体管芯中形成通孔通孔（TBV）隔离同轴电容器的技术。在一些实施例中，使用所公开的技术提供的圆柱形电容器可以包括例如由介电材料和外导体板包围的导电TBV。根据一些实施例，TBV和外板可以例如形成为以同轴布置彼此自对准。所公开的电容器可以延伸穿过主模具的主体，使得其端子在其上表面和/或下表面上可接近。因此，根据一些实施例，在一些情况下，主体管芯可以与另一个管芯电连接以提供管芯堆叠或其他三维集成电路（3D IC）。在一些情况下，所公开的电容器可用于例如在开关电容器电压调节器（SCVR）中提供集成电容。

3. 发明申请

WO2013101249A1 FULLY INTEGRATED VOLTAGE REGULATORS FOR MULTI-STACK INTEGRATED CIRCUIT ARCHITECTURES 审中-公开
标题翻译：用于多层集成电路架构的全面集成电压调节器
公开(公告)号：WO2013101249A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/068285
申请日：2011-12-31
申请人： INTEL CORPORATION , SARASWAT, Ruchir , SCHAEFER, Andre , ZILLMANN, Uwe , DUEVEL, Andreas , RAO, Valluri , KAMGAING, Telesphor , KRISHNAMURTHY, Harish
发明人： SARASWAT, Ruchir , SCHAEFER, Andre , ZILLMANN, Uwe , DUEVEL, Andreas , RAO, Valluri , KAMGAING, Telesphor , KRISHNAMURTHY, Harish
IPC分类号： G05F1/08 , G05F1/565 , H01L23/31
CPC分类号： G05F1/618 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L23/642 , H01L23/645 , H01L25/0657 , H01L25/18 , H01L27/0207 , H01L28/10 , H01L28/40 , H01L2225/06513 , H01L2225/06544 , H01L2225/06565 , H01L2924/0002 , H02M3/156 , H02M7/003 , H01L2924/00
摘要： A voltage regulator for one or more dies in a multi-stack integrated circuit includes an inductor located on a die, a voltage controller that is electrically coupled to the inductor and is also located on the die, and a capacitor that is electrically coupled to the inductor and the voltage controller and is also located on the die. The inductor defines an interior space and the voltage controller and the capacitor are located within the interior space of the inductor. The inductor can be a lateral inductor or a through layer via inductor. The multi-stack integrated circuit may have multiple dies. A voltage controller may be electrically coupled to each of the dies, although it may be located on only one of the dies. Alternatively, separate voltage controllers may be electrically coupled to each of the multiple dies and may be located on each of the respective dies.
摘要翻译：用于多堆叠集成电路中的一个或多个管芯的电压调节器包括位于管芯上的电感器，电耦合到电感器并且还位于管芯上的电压控制器，以及电耦合到电感和电压控制器，也位于模具上。电感器定义了内部空间，电压控制器和电容器位于电感器的内部空间内。电感器可以是横向电感器或通过电感器的贯穿层。多层集成电路可以具有多个管芯。电压控制器可以电耦合到每个模具，尽管它可以仅位于一个模具上。或者，单独的电压控制器可以电耦合到多个管芯中的每个，并且可以位于每个相应的管芯上。

4. 发明申请

WO2016043738A1 DIE WITH INTEGRATED MICROPHONE DEVICE USING THROUGH-SILICON VIAS (TSVs) 审中-公开
标题翻译：使用通过硅胶（TSV）的集成麦克风设备
公开(公告)号：WO2016043738A1
公开(公告)日：2016-03-24
申请号：PCT/US2014/056133
申请日：2014-09-17
申请人： INTEL CORPORATION , LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , RAO, Valluri Bob , LUND-LARSEN, Tor , COWLEY, Nicholas P.
发明人： LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , RAO, Valluri Bob , LUND-LARSEN, Tor , COWLEY, Nicholas P.
IPC分类号： H01L27/04 , H01L21/60 , B81B7/02
CPC分类号： H04R1/04 , B81B7/02 , B81B2201/0257 , B81B2207/096 , B81C1/00158 , B81C2201/0132 , B81C2203/0109 , H01L21/6835 , H01L21/6836 , H01L21/76898 , H01L23/481 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/131 , H01L2224/16227 , H01L2224/27002 , H01L2224/27618 , H01L2224/27848 , H01L2224/29011 , H01L2224/2919 , H01L2224/3201 , H01L2224/32058 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/83005 , H01L2224/83193 , H01L2224/83438 , H01L2224/8346 , H01L2224/83488 , H01L2224/8359 , H01L2224/83688 , H01L2224/83862 , H01L2224/92 , H01L2224/9222 , H01L2224/92225 , H01L2924/1461 , H01L2924/15311 , H01L2924/161 , H01L2924/16151 , H01L2924/16152 , H01L2924/163 , H01L2924/166 , H04R1/406 , H04R19/005 , H04R19/04 , H01L2924/014 , H01L2924/0665 , H01L2924/01014 , H01L2924/00014 , H01L2924/00012 , H01L2224/11 , H01L2224/27 , H01L2224/83 , H01L2224/81 , H01L2221/68304
摘要： Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了具有使用穿硅通孔（TSV）和相关联的技术和配置的集成麦克风设备的管芯。在一个实施例中，一种装置包括一种装置，包括具有第一侧和与第一侧相对设置的第二侧的半导体衬底，形成在半导体衬底的第一侧上的互连层，形成的穿硅通孔（TSV）通过半导体衬底并且被配置为在半导体衬底的第一侧和半导体衬底的第二侧之间布置电信号，以及形成在半导体衬底的第二侧上并与TSV电耦合的麦克风器件。可以描述和/或要求保护其他实施例。

5. 发明申请

WO2016022125A1 METHOD AND APPARATUS FOR FORMING BACKSIDE DIE PLANAR DEVICES AND SAW FILTER 审中-公开
标题翻译：用于形成背面平面设备和SAW滤波器的方法和装置
公开(公告)号：WO2016022125A1
公开(公告)日：2016-02-11
申请号：PCT/US2014/050134
申请日：2014-08-07
申请人： INTEL CORPORATION , LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas P. , GOLDMAN, Richard J.
发明人： LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas P. , GOLDMAN, Richard J.
IPC分类号： H03H7/00 , H04B1/00
CPC分类号： H01L24/09 , G06F1/16 , H01F27/2804 , H01L23/481 , H01L23/5226 , H01L23/5227 , H01L23/525 , H01L23/645 , H01L23/66 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L2223/6616 , H01L2223/6661 , H01L2223/6677 , H01L2224/0233 , H01L2224/02372 , H01L2224/02375 , H01L2224/02379 , H01L2224/0401 , H01L2224/05548 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H03H7/42 , H03H9/64
摘要： Described is an apparatus which comprises: a backside of a first die having a redistribution layer(RDL); one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL; a front-side of the first die having an active region; and one or more vias to couple the active region with the one or more passive planar devices.
摘要翻译：描述了一种装置，其包括：具有再分配层（RDL）的第一管芯的背面; 设置在背面的一个或多个无源平面装置，形成在RDL中的一个或多个无源平面装置; 所述第一管芯的前侧具有活性区域; 以及一个或多个通孔，以将有源区域与一个或多个无源平面器件耦合。

6. 发明申请

WO2016022124A1 ON-DIE INDUCTOR WITH IMPROVED Q-FACTOR 审中-公开
标题翻译：带改进Q因子的电感式电感器
公开(公告)号：WO2016022124A1
公开(公告)日：2016-02-11
申请号：PCT/US2014/050133
申请日：2014-08-07
申请人： INTEL CORPORATION , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas, P. , GOLDMAN, Richard, J.
发明人： SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas, P. , GOLDMAN, Richard, J.
IPC分类号： H01F17/00 , H01F27/28
CPC分类号： H01L23/645 , H01F17/0006 , H01F27/2804 , H01F41/041 , H01F2017/002 , H01L23/481 , H01L23/5227 , H01L28/10
摘要： Described is an apparatus which comprises: a substrate; a plurality of holes formed as vias (e.g., through-silicon-vias (TSVs)) in the substrate; and a metal loop formed in a metal layer positioned above the plurality of holes such that a plane of the metal loop is orthogonal to the plurality of holes.
摘要翻译：描述了一种装置，其包括：基板; 在衬底中形成为通孔（例如，通过硅通孔（TSV））的多个孔; 以及金属环，其形成在位于所述多个孔的上方的金属层中，使得所述金属环的平面与所述多个孔正交。

7. 发明申请

WO2014110273A1 BACKSIDE REDISTRIBUTION LAYER PATCH ANTENNA 审中-公开
标题翻译：背面重新分配层天线
公开(公告)号：WO2014110273A1
公开(公告)日：2014-07-17
申请号：PCT/US2014/010895
申请日：2014-01-09
申请人： INTEL CORPORATION , SARASWAT, Ruchir , COWLEY, Nicholas, P. , ZILLMANN, Uwe
发明人： SARASWAT, Ruchir , COWLEY, Nicholas, P. , ZILLMANN, Uwe
IPC分类号： H01Q13/08 , H01Q1/38
CPC分类号： H01L21/486 , H01L23/481 , H01L23/522 , H01L23/5225 , H01L23/5227 , H01L23/66 , H01L2924/0002 , H01Q1/2283 , H01Q21/065 , H01L2924/00
摘要： A patch antenna system comprising: an integrated circuit die having an active side including an active layer, and a backside; a dielectric layer formed on the backside; and a redistribution layer formed on the dielectric layer wherein the redistribution layer forms an array of patches. The patch antenna further comprises a plurality of through-silicon vias (TSV), wherein the TSVs electrically connect the array of patches to the active layer.
摘要翻译：一种贴片天线系统，包括：集成电路芯片，具有包括有源层的有源侧和背面; 形成在背面的电介质层; 以及形成在所述电介质层上的再分布层，其中所述再分布层形成一组贴片。贴片天线还包括多个穿硅通孔（TSV），其中TSV将贴片阵列电连接到有源层。

8. 发明申请

WO2013101131A1 INTEGRATED INDUCTOR FOR INTEGRATED CIRCUIT DEVICES 审中-公开
标题翻译：集成电路集成电路
公开(公告)号：WO2013101131A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/067980
申请日：2011-12-29
申请人： INTEL CORPORATION , DUEVEL, Andreas , KAMGAING, Telesphor , RAO, Valluri R. , ZILLMANN, Uwe
发明人： DUEVEL, Andreas , KAMGAING, Telesphor , RAO, Valluri R. , ZILLMANN, Uwe
IPC分类号： H01L27/04 , H01L23/522 , H01F17/00
CPC分类号： H01L28/10 , H01F17/0006 , H01F2017/002 , H01L21/76898 , H01L23/481 , H01L23/5227 , H01L27/0688 , H01L27/08 , H01L2224/4813 , H01L2924/0002 , H01L2924/00012
摘要： A three-dimensional inductor is formed in an integrated circuit die using conductive through-body-vias which pass through the body of the die and contact one or more metal interconnect layers on the front side of the die and terminate on the back side of the die. In another embodiment, the through-body-vias may pass through a dielectric material disposed in a plug in the body of the die. In yet another aspect, a transformer may be formed by coupling multiple inductors formed using through-body-vias. In still another aspect, a three-dimensional inductor may include conductors formed of stacks of on chip metallization layers and conductive through-layer-vias disposed in insulation layers between metallization layers. Other embodiments are described.
摘要翻译：使用导电贯穿体通孔在集成电路管芯中形成三维电感器，该穿通体通孔穿过管芯的主体并与管芯前侧上的一个或多个金属互连层接触并终止在管芯的背面死。在另一个实施例中，通孔通孔可以穿过设置在管芯主体中的插塞中的电介质材料。另一方面，变压器可以通过耦合使用通孔通孔形成的多个电感器来形成。在另一方面，三维电感器可以包括由片上金属化层的堆叠形成的导体和设置在金属化层之间的绝缘层中的导电贯通层通孔。描述其他实施例。

9. 发明申请

WO2014051977A1 INTEGRATED VOLTAGE REGULATORS WITH MAGNETICALLY ENHANCED INDUCTORS 审中-公开
标题翻译：集成电压调节器与磁性增强型电感器
公开(公告)号：WO2014051977A1
公开(公告)日：2014-04-03
申请号：PCT/US2013/058796
申请日：2013-09-09
申请人： INTEL CORPORATION
发明人： ZILLMANN, Uwe , SCHAEFER, Andre , SARASWAT, Ruchir , KAMGAING, Telesphor , FISCHER, Paul, B. , DROEGE, Guido
IPC分类号： H01L23/48
CPC分类号： G06F1/3296 , H01L2924/0002 , H05K1/0262 , H05K1/165 , Y02D10/172 , Y10T29/4913 , H01L2924/00
摘要： Magnetically enhanced inductors integrated with microelectronic devices at chip-level. In embodiments, magnetically enhanced inductors include a through substrate vias (TSVs) with fill metal to carry an electrical current proximate to a magnetic layer disposed on a substrate through which the TSV passes. In certain magnetically enhanced inductor embodiments, a TSV fill metal is disposed within a magnetic material lining the TSV. In certain magnetically enhanced inductor embodiments, a magnetically enhanced inductor includes a plurality of interconnected TSVs disposed proximate to a magnetic material layer on a side of a substrate. In embodiments, voltage regulation circuitry disposed on a first side of a substrate is integrated with one or more magnetically enhanced inductors utilizing a TSV passing through the substrate. In further embodiments, integrated circuitry on a same substrate as the magnetically enhanced inductor, or on another substrate stacked thereon, completes the VR and/or is powered by the VR circuitry.
摘要翻译：在芯片级与微电子器件集成的磁性增强型电感器。在实施例中，磁增强电感器包括具有填充金属的贯穿衬底通孔（TSV），以承载靠近设置在TSV通过的衬底上的磁性层的电流。在某些磁增强电感器实施例中，TSV填充金属设置在衬在TSV内的磁性材料内。在某些磁增强电感器实施例中，磁增强电感器包括靠近基板一侧的磁性材料层设置的多个互连TSV。在实施例中，设置在衬底的第一侧上的电压调节电路与利用穿过衬底的TSV的一个或多个磁增强电感器集成。在另外的实施例中，在与磁增强电感器相同的衬底上或在其上堆叠的另一衬底上的集成电路完成VR和/或由VR电路供电。

10. 发明公开

EP3195358A1 DIE WITH INTEGRATED MICROPHONE DEVICE USING THROUGH-SILICON VIAS (TSVs) 审中-公开
标题翻译：带有集成麦克风装置的硅通孔硅通孔硅（TSV）
公开(公告)号：EP3195358A1
公开(公告)日：2017-07-26
申请号：EP14901871.5
申请日：2014-09-17
申请人： Intel Corporation
发明人： LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , RAO, Valluri Bob , LUND-LARSEN, Tor , COWLEY, Nicholas P.
IPC分类号： H01L27/04 , H01L21/60 , B81B7/02
CPC分类号： H04R1/04 , B81B7/02 , B81B2201/0257 , B81B2207/096 , B81C1/00158 , B81C2201/0132 , B81C2203/0109 , H01L21/6835 , H01L21/6836 , H01L21/76898 , H01L23/481 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/131 , H01L2224/16227 , H01L2224/27002 , H01L2224/27618 , H01L2224/27848 , H01L2224/29011 , H01L2224/2919 , H01L2224/3201 , H01L2224/32058 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/83005 , H01L2224/83193 , H01L2224/83438 , H01L2224/8346 , H01L2224/83488 , H01L2224/8359 , H01L2224/83688 , H01L2224/83862 , H01L2224/92 , H01L2224/9222 , H01L2224/92225 , H01L2924/1461 , H01L2924/15311 , H01L2924/161 , H01L2924/16151 , H01L2924/16152 , H01L2924/163 , H01L2924/166 , H04R1/406 , H04R19/005 , H04R19/04 , H01L2924/014 , H01L2924/0665 , H01L2924/01014 , H01L2924/00014 , H01L2924/00012 , H01L2224/11 , H01L2224/27 , H01L2224/83 , H01L2224/81 , H01L2221/68304
摘要： Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了具有使用硅通孔（TSV）和相关技术和配置的集成麦克风装置的裸片。在一个实施例中，一种设备包括装置，该装置包括具有第一侧和与第一侧相对设置的第二侧的半导体衬底，形成在半导体衬底的第一侧上的互连层，形成的硅通孔（TSV）通过半导体衬底并且被配置为在半导体衬底的第一侧和半导体衬底的第二侧之间路由电信号，以及形成在半导体衬底的第二侧上并且与TSV电耦合的麦克风器件。其他实施例可以被描述和/或要求保护。

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