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1. 发明专利

JP2002279387A CARD AND MANUFACTURING METHOD THEREFOR 失效
公开(公告)号：JP2002279387A
公开(公告)日：2002-09-27
申请号：JP2001078343
申请日：2001-03-19
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , DENSO CORP , NEC TOKIN CORP
发明人： HOTTA YOSHIAKI , WAI SHINICHI , TOZAKI HIROMI , YAMAGUCHI AKIRA , YAMAMOTO HIDEAKI , WATANABE ATSUSHI , HIRATA TATSUYA , SUGIURA MASAHIRO , SATO HIROMI , MIURA TORU
IPC分类号： B42D15/10 , B42D15/00 , G06K19/06 , G06K19/07 , G06K19/077
摘要： PROBLEM TO BE SOLVED: To provide a card having a pattern with sharpness thereof not impaired, and to provide a manufacturing method thereof. SOLUTION: In a non-contact IC card 100, a semi conductor IC chip 120, an antenna 130, and a wire 140 for connecting the semi conductor IC chip 120 to the antenna 130 are embedded in a card base material 110. In addition, scooped out patterns 150 and 152 formed through the card base material 110 are provided. The scooped out patterns include characters, symbol marks and logos.

2. 发明专利

JP2000260738A GRINDING OF SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JP2000260738A
公开(公告)日：2000-09-22
申请号：JP6382299
申请日：1999-03-10
申请人： HITACHI LTD
发明人： WAI SHINICHI , SHIRASE KAZUO , MORITA KENJI , SASAKI HIDEAKI , ODAJIMA HITOSHI
IPC分类号： B24B7/04 , B24B1/00 , B28D5/00 , H01L21/301 , H01L21/304 , H01L21/683
摘要： PROBLEM TO BE SOLVED: To increase the throughput of a thickness reducing process, prevent the breakage, reduce the cost, and increase the accuracy of the finished thickness only by a grinding process by using a grinding stone whose grain diameter is within a specified range and processing at a specified rotating speed. SOLUTION: A grinding stone 32 supported by a finish grinding spindle 20 is a resin bonded grinding stone whose grain diameter is about 2-4 μm (about #4000). When N1 is a rotating speed of the grinding stone 32 and N2 is a rotating speed of a wafer 90, a grinding work is executed under the conditions that N2/N1

3. 发明专利

JP2000151057A ELECTRONIC COMPONENT MOUNTING STRUCTURE, MANUFACTURE THEREOF, WIRELESS IC CARD AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000151057A
公开(公告)日：2000-05-30
申请号：JP31751098
申请日：1998-11-09
申请人： HITACHI LTD
发明人： MATSUMOTO KUNIO , WAI SHINICHI , TAKAOKA ISAMU , HASHIMOTO YUTAKA , OZEKI YOSHIO , SAKAGUCHI MASARU
IPC分类号： H05K3/32 , H01L21/60 , H05K1/18
摘要： PROBLEM TO BE SOLVED: To realize in a simple process connection and mounting between electronic components of semiconductor elements, module boards, indication elements, etc., and a wiring conductor patterned on a sheet with a raised connection reliability to manufacture with a high yield a low cost. SOLUTION: A wiring conductor 22 is patterned on a wiring sheet base 21 with sharply tipped bumps formed on electrode pads of an electronic component 10, thereby forming a wiring sheet 20 on which connection parts of the wiring conductor are broken through to mutually diffuse the connection parts of the bumps and the wiring conductor to bond and connect them, and the gap between the electronic component 10 and the wiring sheet 20 is filled with a seal resin.

4. 发明专利

JPH11316110A METHOD FOR MEASURING SOLDER BUMP 失效
公开(公告)号：JPH11316110A
公开(公告)日：1999-11-16
申请号：JP7079199
申请日：1999-03-16
申请人： HITACHI LTD
发明人： HASHIMOTO YUTAKA , SASAKI HIDEAKI , KOBAYASHI MAMORU , WAI SHINICHI
IPC分类号： G01B11/02 , G01B11/26 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To achieve high-speed measurement of the top sections of solder bumps of a work, such as the LSI, etc., having a large number of solder bumps on a substrate. SOLUTION: A work having a large number of bumps 10 on a substrate is mounted on a work positioning mechanism 230 and an optical micro-head 250 measures the mounting attitude error of the work by scanning the work. After each stage is operated so as to correct the error, the positions of the top sections of the bumps are measured by scanning. Measured results are collected to a personal computer 266, sent to a main personal computer 110 together with the control data of each shaft, and displayed on a screen 112. The positional error of the top section of each bump from a regressive plane is computed and, when the error falls within a tolerance, the work is discriminated as defectless.

5. 发明专利

JP2947824B2 CIRCUIT SUBSTRATE AND METHOD OF ITS SURFACE TREATMENT 失效
公开(公告)号：JP2947824B2
公开(公告)日：1999-09-13
申请号：JP19983189
申请日：1989-08-01
申请人： HITACHI LTD
发明人： KATAYAMA KAORU , SHIRAI MITSUGI , SASAKI HIDEAKI , WAI SHINICHI , KOBAYASHI MAMORU , SATO RYOHEI , MIYAUCHI TAKEOKI
IPC分类号： B23K1/20 , H01L21/48 , H01L21/52 , H01L21/60 , H01L23/50 , H05K1/03 , H05K1/09 , H05K3/24 , H05K3/34

6. 发明专利

JPH0936286A COOLING FIN FIXING METHOD 失效
公开(公告)号：JPH0936286A
公开(公告)日：1997-02-07
申请号：JP18383695
申请日：1995-07-20
申请人： HITACHI LTD
发明人： WAI SHINICHI , SHIRAI MITSUGI , SASAKI HIDEAKI
IPC分类号： C09J7/02 , C09J5/00 , H01L23/40 , H05K7/20
摘要： PROBLEM TO BE SOLVED: To facilitate the replacement of an LSI and to make it possible to reuse a cooling fin by incorporating a releasing function in the one surface side of a double-sided tape made of heat conductive adhesive by heating or adding means, and fixing an electronic component and the fin by the tape. SOLUTION: An LSI 3 having adhesive metal is connected onto a circuit board 5 by soldering. For the purpose of lowering the junction temperature of an element during operating of the LSI 3 and normally conducting the electric operation, a heat conductive adhesive tape 2 is connected to the fin 1, and connected to the LSI 3. The tape 2 has a releasing function at least at one surface side by heating or adding means. The releasing surface is assembled in contact with the fin 1, and hence the fin 1 can be removed. Accordingly, when an electronic component can be easily removed only at the specific LSI by sucking when a connecting metal 4 is melted by vacuum suction by a rubber pad or the like.

7. 发明专利

JPH06155082A WELDING SYSTEM 失效
公开(公告)号：JPH06155082A
公开(公告)日：1994-06-03
申请号：JP30989492
申请日：1992-11-19
申请人： HITACHI LTD
发明人： UMEO KOUJI , WAI SHINICHI , SASAKI HIDEAKI , TANI MITSUKIYO , SHIOKAWA TAKEJI , IMAI KUNINORI
IPC分类号： B23K15/00 , B23K15/06 , B23K26/21 , B23K31/00 , B23K37/00 , B23K26/00
摘要： PURPOSE:To stably obtain a high-quality welded part and to enable high- efficiency welding operation by providing a plural welding jigs conveying means for welding a product as they are circulated, vacuum spare rooms before and behind a welding room and a cooling means for the welding. CONSTITUTION:An automatic conveying machine 4 is equipped so that an electronic beam welding machine 1 is enclosed in a portal shape and eight welding jigs are held in its inner part. Eight welding jigs are circulated through the inner part of a work loader 6, the welding machine 1 and the automatic conveying machine 4 along directions shown by the arrow of physical distribution direction 8 and the arrow of welding flow direction 7. Further, the vacuum spare rooms are equipped before and behind the welding room in the welding machine 1 and when a work enters this room, it stands by in such a state that it is evacuated. As a result, an evacuating time is reduced and a high vacuum is maintained in the welding room. Furthermore, cold air by a spot cooler 2 is supplied into a horizontal conveying part 4b through a Y form duct 3. Consequently, the welding jigs which stand by in the horizontal conveying part 4b after welding is finished can be cooled.

8. 发明专利

JPH0675007A CIRCUIT WIRING BOARD FOR LSI TEST, TEST EQUIPMENT EMPLOYING THE CIRCUIT WIRING BOARD, AND METHOD FOR MOUNTING TESTED LSI ON MULTILAYER CIRCUIT WIRING BOARD 失效
公开(公告)号：JPH0675007A
公开(公告)日：1994-03-18
申请号：JP21117292
申请日：1992-08-07
申请人： HITACHI LTD
发明人： MATSUI KIYOSHI , SATO RYOHEI , TAKEDA KENJI , HAYASHIDA TETSUYA , WAI SHINICHI
IPC分类号： G01R31/26 , H01L21/66 , H01L23/522 , H01L23/538
摘要： PURPOSE:To obtain a circuit wiring board for LSI test which realizes enhancement of reliability in electrical connection and simplification of process from a step for removing an LSI chip from the circuit wiring board for testing electrical characteristics of the LSI chip to a step for performing flip-chip mounting of the LSI chip onto a multilayer circuit wiring board, a method for mounting an LSI chip on the multilayer circuit wiring board, and an electronic circuit device. CONSTITUTION:With regard to electrode terminals 4 for a microchip carrier 1 and a circuit wiring board 3 for test, diameter of electrode on the board 3 side is set extremely smaller than that on the chip carrier 1 side and a plurality of connecting electrodes are provided. This constitution eliminates the need of a step for removing excess solder from the chip carrier side and refeeding the solder in the process after removing the chip carrier 1 from the board 1 before mounting it on a multilayer circuit wiring board.

9. 发明专利

JPH05180648A ACCURACY MEASURING APPARATUS FOR ANALOGOUSLY-SHAPED STRUCTURE 失效
公开(公告)号：JPH05180648A
公开(公告)日：1993-07-23
申请号：JP34681291
申请日：1991-12-27
申请人： HITACHI LTD
发明人： OGURO TAKAHIRO , SASAKI SHIGEYUKI , WAI SHINICHI , MORITA KENJI
IPC分类号： G01B5/16 , G01B21/16 , H01L23/34
摘要： PURPOSE:To obtain the accuracy measuring apparatus for an analogously-shaped structure for measuring the shape of the grooves of a fin structure simply in a short time it relatively high accuracy. CONSTITUTION:A gage 2, which has many fins at the same pitch, is provided so that the fins are intermeshed to each other with all groove parts of a fin structure to be measured 1. The errors in groove widths, the errors in groove pitch and the errors in inclinations of the grooves are collectively measured based on the amount of displacement caused by reciprocating any of the fin structure to be measured 1 or the gage 2 into the right and left directions orthogonal to the fins. The machining accuracy after the machining of the grooves of the fin structure can be measured in a short time in relatively high accuracy by the simple reciprocating operation of any of the material to be measured or the gage.

10. 发明专利

JPH04372349A GRINDING METHOD AND GRINDING DEVICE 失效
公开(公告)号：JPH04372349A
公开(公告)日：1992-12-25
申请号：JP14909891
申请日：1991-06-21
申请人： HITACHI LTD , HITACHI SEIKO KK
发明人： WAI SHINICHI , OGINO HIROYUKI , MORITA KENJI , IMAI KUNINORI , SASAKI HIDEAKI , OGURO TAKAO
IPC分类号： B24B7/22 , B24B1/00
摘要： PURPOSE:To reduce grinding resistance so as to heighten grinding efficiency and grinding accuracy by setting the peripheral speed satisfying V >=35phi+2000 where the diamond grain diameter of a diamond grinding wheel is phi and the peripheral speed of the diamond grinding wheel is V. CONSTITUTION:In the case of a workpiece being made of AIN ceramics, a diamond grinding wheel 1 is rotated in such a way as to have the peripheral speed satisfying V>=35phi+2000, where the diamond grain diameter of the diamond grinding wheel 1 is phi(mum) and the peripheral speed of the diamond grinding wheel 1 is V(m/min). In addition, when the feed speed of the workpiece is made f(m/min), the workpiece is ground under the grinding condition set to V/f satisfying f70>=+800.

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