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1. 发明申请

US20140085321A1 DISPLAY DRIVER INTEGRATED CIRCUIT, A DISPLAY SYSTEM HAVING THE SAME, AND A DISPLAY DATA PROCESSING METHOD THEREOF 有权
标题翻译：显示驱动器集成电路，具有该显示驱动器集成电路的显示系统及其显示数据处理方法
公开(公告)号：US20140085321A1
公开(公告)日：2014-03-27
申请号：US13785832
申请日：2013-03-05
申请人： Jong-Kon Bae , Dokyung Kim , Chulho Kim , Junho Park , Sooyoung Woo , Chiho Cha , Jeung Hwan Lee
发明人： Jong-Kon Bae , Dokyung Kim , Chulho Kim , Junho Park , Sooyoung Woo , Chiho Cha , Jeung Hwan Lee
IPC分类号： G09G5/39
CPC分类号： G09G5/39 , G09G5/006 , G09G5/18 , G09G5/393 , G09G2370/08
摘要： A display driver integrated circuit which includes a distributor configured to output display data; a plurality of first-in first-out (FIFO) memories configured to receive the display data from the distributor according to an external clock and output the display data in response to an internal clock; and a plurality of graphics memories configured to receive the display data from the FIFO memories.
摘要翻译：一种显示驱动器集成电路，包括配置成输出显示数据的分配器; 多个先进先出（FIFO）存储器，被配置为根据外部时钟从分配器接收显示数据，并响应于内部时钟输出显示数据; 以及配置成从FIFO存储器接收显示数据的多个图形存储器。

2. 发明授权

US08015380B2 Launching multiple concurrent memory moves via a fully asynchronoous memory mover 失效
标题翻译：通过完全异步的内存移动器启动多个并发内存移动
公开(公告)号：US08015380B2
公开(公告)日：2011-09-06
申请号：US12024690
申请日：2008-02-01
申请人： Ravi K. Arimilli , Robert S. Blackmore , Chulho Kim , Balaram Sinharoy , Hanhong Xue
发明人： Ravi K. Arimilli , Robert S. Blackmore , Chulho Kim , Balaram Sinharoy , Hanhong Xue
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3836 , G06F9/3851 , G06F12/10
摘要： A data processing system has an asynchronous memory mover, which includes multiple sets of registers for storing addressing and control parameters utilized to generate one or more asynchronous memory move (AMM) operations. The memory mover detects a receipt of a first set of parameters in a first set of registers from the processor. The processor forwards the parameters after the processor initiates a data move in virtual address space, utilizing a source effective address and a destination effective address. The memory mover responds to receiving the first set of parameters by generating and launching a first asynchronous memory move (AMM) operation. When the memory mover receives a second set of parameters in a second set of registers before the first AMM operation completes, the memory mover generates and launches a second AMM operation concurrently with the first AMM operation if no address conflicts exist.
摘要翻译：数据处理系统具有异步存储器移动器，其包括用于存储用于生成一个或多个异步存储器移动（AMM）操作的寻址和控制参数的多组寄存器。存储器移动器检测来自处理器的第一组寄存器中的第一组参数的接收。处理器在虚拟地址空间中启动数据移动后，使用源有效地址和目标有效地址，处理器转发参数。存储器移动器响应于通过生成和启动第一异步存储器移动（AMM）操作来接收第一组参数。当存储器移动器在第一个AMM操作完成之前在第二组寄存器中接收到第二组参数时，如果不存在地址冲突，则存储器移动器生成并与第一个AMM操作同时启动第二个AMM操作。

3. 发明授权

US07966454B2 Issuing global shared memory operations via direct cache injection to a host fabric interface 有权
标题翻译：通过直接缓存注入向主机结构接口发出全局共享内存操作
公开(公告)号：US07966454B2
公开(公告)日：2011-06-21
申请号：US12024437
申请日：2008-02-01
申请人： Lakshimarayana B. Arimilli , Ravi K. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , William J. Starke , Hanhong Xue
发明人： Lakshimarayana B. Arimilli , Ravi K. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , William J. Starke , Hanhong Xue
IPC分类号： G06F9/318
CPC分类号： G06F12/0815 , G06F12/0897 , G06F12/10
摘要： A data processing system enables global shared memory (GSM) operations across multiple nodes with a distributed EA-to-RA mapping of physical memory. Each node has a host fabric interface (HFI), which includes HFI windows that are assigned to at most one locally-executing task of a parallel job. The tasks perform parallel job execution, but map only a portion of the effective addresses (EAs) of the global address space to the local, real memory of the task's respective node. The HFI window tags all outgoing GSM operations (of the local task) with the job ID, and embeds the target node and HFI window IDs of the node at which the EA is memory mapped. The HFI window also enables processing of received GSM operations with valid EAs that are homed to the local real memory of the receiving node, while preventing processing of other received operations without a valid EA-to-RA local mapping.
摘要翻译：数据处理系统通过物理内存的分布式EA-to-RA映射实现跨多个节点的全局共享存储（GSM）操作。每个节点都有一个主机结构接口（HFI），它包括分配给并行作业最多一个本地执行任务的HFI窗口。任务执行并行作业执行，但将全局地址空间的有效地址（EA）的一部分映射到任务相应节点的本地实际存储器。 HFI窗口使用作业ID对所有传出的GSM操作（本地任务）进行标记，并嵌入EA被映射到的节点的目标节点和HFI窗口ID。 HFI窗口还能够利用归属于接收节点的本地实际存储器的有效EA来处理接收的GSM操作，同时防止在没有有效的EA到RA本地映射的情况下处理其他接收到的操作。

4. 发明申请

US20110078410A1 EFFICIENT PIPELINING OF RDMA FOR COMMUNICATIONS 审中-公开
标题翻译： RDMA通信的有效管道
公开(公告)号：US20110078410A1
公开(公告)日：2011-03-31
申请号：US11457921
申请日：2006-07-17
申请人： Robert S. Blackmore , Rama K. Govindaraju , Peter H. Hochschild , Chulho Kim , Rajeev Sivaram , Richard R. Treumann , Hanhong Xue
发明人： Robert S. Blackmore , Rama K. Govindaraju , Peter H. Hochschild , Chulho Kim , Rajeev Sivaram , Richard R. Treumann , Hanhong Xue
IPC分类号： G06F12/00 , G06F15/76 , G06F9/02
CPC分类号： G06F15/17375
摘要： Disclosed are a method of and system for multiple party communications in a processing system including multiple processing subsystems. Each of the processing subsystems includes a central processing unit and one or more network adapters for connecting said each processing subsystem to the other processing subsystems. A multitude of nodes are established or created, and each of these nodes is associated with one of the processing subsystems. A first aspect of the invention involves pipelined communication using RDMA among three nodes, where the first node breaks up a large communication into multiple parts and sends these parts one after the other to the second node using RDMA, and the second node in turn absorbs and forwards each of these parts to a third node before all parts of the communication arrive from the first node.
摘要翻译：公开了一种包括多个处理子系统的处理系统中的多方通信的方法和系统。每个处理子系统包括中央处理单元和用于将所述每个处理子系统连接到其他处理子系统的一个或多个网络适配器。建立或创建多个节点，并且这些节点中的每一个都与处理子系统之一相关联。本发明的第一方面涉及在三个节点之间使用RDMA的流水线通信，其中第一节点将大型通信分解成多个部分，并且使用RDMA将这些部分一个接一个地发送到第二节点，并且第二节点依次吸收和在通信的所有部分从第一节点到达之前，将这些部分中的每一个转发到第三节点。

5. 发明授权

US07694310B2 Method for implementing MPI-2 one sided communication 有权
标题翻译：实现MPI-2单向通信的方法
公开(公告)号：US07694310B2
公开(公告)日：2010-04-06
申请号：US11467946
申请日：2006-08-29
申请人： Su-Hsuan Huang , Chulho Kim , Richard R. Treumann , William G. Tuel, Jr.
发明人： Su-Hsuan Huang , Chulho Kim , Richard R. Treumann , William G. Tuel, Jr.
IPC分类号： G06F3/00 , G06F9/44 , G06F9/46 , G06F13/00
CPC分类号： G06F9/544 , G06F9/546 , H04L67/10 , H04L67/40
摘要： A method for implementing Message Passing Interface (MPI-2) one-sided communication by using Low-level Applications Programming Interface (LAPI) active messaging capabilities, including providing at least three data transfer types, one of which is used to send a message with a message header greater than one packet where Data Gather and Scatter Programs (DGSP) are placed as part of the message header; allowing a multi-packet header by using a LAPI data transfer type; sending the DGSP and data as one message; reading the DSGP with a header handler; registering the DSGP with the LAPI to allow the LAPI to scatter the data to one or more memory locations; defining two sets of counters, one counter set for keeping track of a state of a prospective communication partner, and another counter set for recording activities of local and Remote Memory Access (RMA) operations; comparing local and remote counts of completed RMA operations to complete synchronization mechanisms; and creating a mpci_wait_loop function.
摘要翻译：一种通过使用低级应用程序编程接口（LAPI）活动消息传递功能实现消息传递接口（MPI-2）单向通信的方法，包括提供至少三种数据传输类型，其中一种用于发送消息一个消息头大于一个数据包，数据收集和散布程序（DGSP）作为消息头的一部分放置; 通过使用LAPI数据传输类型允许多分组报头; 发送DGSP和数据作为一个消息; 用头处理程序读取DSGP; 将DSGP注册到LAPI以允许LAPI将数据分散到一个或多个存储器位置; 定义两组计数器，一个用于跟踪预期通信伙伴的状态的计数器集合，以及用于记录本地和远程存储器访问（RMA）操作的活动的另一个计数器集合; 比较完成的RMA操作的本地和远程计数以完成同步机制; 并创建一个mpci_wait_loop函数。

6. 发明申请

US20090199209A1 Mechanism for Guaranteeing Delivery of Multi-Packet GSM Message 失效
标题翻译：保证多分组GSM消息传递的机制
公开(公告)号：US20090199209A1
公开(公告)日：2009-08-06
申请号：US12024678
申请日：2008-02-01
申请人： Lakshminarayana B. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , Hanhong Xue
发明人： Lakshminarayana B. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , Hanhong Xue
IPC分类号： G06F3/00
CPC分类号： H04L1/1642 , G06F9/542
摘要： A target task ensures complete delivery of a global shared memory (GSM) message from an originating task to the target task. The target task's HFI receives a first of multiple GSM packets generated from a single GSM message sent from the originating task. The HFI logic assigns a sequence number and corresponding tuple to track receipt of the complete GSM message. The sequence number is unique relative to other sequence numbers assigned to GSM messages that have not been completely received from the initiating task. The HFI updates a count value within the tuple, which comprises the sequence number and the count value for the first GSM packet and for each subsequent GSM packet received for the GSM message. The HFI determines when receipt of the GSM message is complete by comparing the count value with a count total retrieved from the packet header.
摘要翻译：目标任务确保从始发任务到目标任务的全局共享存储器（GSM）消息的完全传递。目标任务的HFI接收从发起任务发送的单个GSM消息产生的多个GSM分组中的第一个。 HFI逻辑分配序列号和对应的元组来跟踪完整GSM消息的接收。相对于分配给尚未完全从发起任务接收的GSM消息的其他序列号，序列号是唯一的。 HFI更新元组内的计数值，其包括第一GSM分组的序列号和计数值以及为GSM消息接收的每个后续GSM分组。通过将计数值与从分组报头检索的计数总数进行比较，HFI确定接收到GSM消息的完成。

7. 发明申请

US20090199194A1 Mechanism to Prevent Illegal Access to Task Address Space by Unauthorized Tasks 有权
标题翻译：通过未经授权的任务防止非法访问任务地址空间的机制
公开(公告)号：US20090199194A1
公开(公告)日：2009-08-06
申请号：US12024410
申请日：2008-02-01
申请人： Lakshminarayana B. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , Hanhong Xue
发明人： Lakshminarayana B. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , Hanhong Xue
IPC分类号： G06F9/50
CPC分类号： G06F9/544 , G06F9/468
摘要： A method and data processing system for tracking global shared memory (GSM) operations to and from a local node configured with a host fabric interface (HFI) coupled to a network fabric. During task/job initialization, the system OS assigns HFI window(s) to handle the GSM packet generation and GSM packet receipt and processing for each local task. HFI processing logic automatically tags each GSM packet generated by the HFI window with a global job identifier (ID) of the job to which the local task is affiliated. The job ID is embedded within each GSM packet placed on the network fabric. On receipt of a GSM packet from the network fabric, the HFI logic retrieves the embedded job ID and compares the embedded job ID with the ID within the HFI window(s). GSM packets are forwarded to an HFI window only when the embedded job ID matches the HFI window's job ID.
摘要翻译：一种用于跟踪与配置有耦合到网络结构的主机结构接口（HFI）的本地节点的全局共享存储器（GSM）操作的方法和数据处理系统。在任务/作业初始化期间，系统OS分配HFI窗口来处理每个本地任务的GSM分组生成和GSM分组接收和处理。 HFI处理逻辑自动将由HFI窗口生成的每个GSM分组标记为本地任务附属于该作业的全局作业标识符（ID）。作业ID被嵌入到放置在网络结构上的每个GSM分组内。在从网络结构接收到GSM分组时，HFI逻辑检索嵌入的作业ID，并将嵌入的作业ID与HFI窗口内的ID进行比较。仅当嵌入的作业ID与HFI窗口的作业ID匹配时，才将GSM数据包转发到HFI窗口。

8. 发明申请

US20090198936A1 REPORTING OF PARTIALLY PERFORMED MEMORY MOVE 有权
标题翻译：报告部分执行记忆移动
公开(公告)号：US20090198936A1
公开(公告)日：2009-08-06
申请号：US12024504
申请日：2008-02-01
申请人： Ravi K. Arimilli , Robert S. Blackmore , Ronald N. Kalla , Chulho Kim , Balaram Sinharoy , Hanhong Xue
发明人： Ravi K. Arimilli , Robert S. Blackmore , Ronald N. Kalla , Chulho Kim , Balaram Sinharoy , Hanhong Xue
IPC分类号： G06F12/02
CPC分类号： G06F9/30043 , G06F12/0831 , G06F12/0862 , G06F12/1027
摘要： A method performed in a data processing system initiates an asynchronous memory move (AMM) operation, whereby a processor performs a move of data in virtual address space from a first effective address to a second effective address and forwards parameters of the AMM operation to asynchronous memory mover logic for completion of the physical movement of data from a first memory location to a second memory location. The processor executes a second operation, which checks a status of the completion of the data move and returns a notification indicating the status. The notification indicates a status, which includes one of: data move in progress; data move totally done; data move partially done; data move cannot be performed; and occurrence of a translation look-aside buffer invalidate entry (TLBIE) operation. The processor initiates one or more actions in response to the notification received.
摘要翻译：在数据处理系统中执行的方法启动异步存储器移动（AMM）操作，由此处理器执行将虚拟地址空间中的数据从第一有效地址移动到第二有效地址，并将AMM操作的参数转发到异步存储器用于完成数据从第一存储器位置到第二存储器位置的物理移动的移动器逻辑。处理器执行第二操作，其检查数据移动完成的状态，并返回指示状态的通知。该通知表示状态，其中包括：数据移动进行中的一个; 数据移动完成; 数据移动部分完成; 无法执行数据移动; 以及出现翻译后备缓冲区无效条目（TLBIE）操作。处理器响应于收到的通知发起一个或多个动作。

9. 发明申请

US20090198935A1 METHOD AND SYSTEM FOR PERFORMING AN ASYNCHRONOUS MEMORY MOVE (AMM) VIA EXECUTION OF AMM STORE INSTRUCTION WITHIN INSTRUCTION SET ARCHITECTURE 有权
标题翻译：通过在指令集结构中执行AMM存储指令执行异步存储器移动（AMM）的方法和系统
公开(公告)号：US20090198935A1
公开(公告)日：2009-08-06
申请号：US12024494
申请日：2008-02-01
申请人： RAVI K. ARIMILLI , Robert S. Blackmore , Chulho Kim , Balaram Sinharoy , Hanhong Xue
发明人： RAVI K. ARIMILLI , Robert S. Blackmore , Chulho Kim , Balaram Sinharoy , Hanhong Xue
IPC分类号： G06F12/00
CPC分类号： G06F9/30032 , G06F12/0831 , G06F12/0862 , G06F12/10
摘要： A data processing system with a processor and memory includes an instruction set architecture (ISA) that provides an asynchronous memory move (AMM) store (ST) instruction. When the processor executes the AMM ST instruction, the processor performs a series of functions, which initiates an asynchronous memory move (AMM) operation. The AMM ST instruction moves data from a first memory location having a first real address to a second memory location having a second real address by: (a) performing a move of the data in virtual address space utilizing a source effective address that is memory mapped to the first memory location and a destination effective address that is memory mapped to the second memory location. When the move is completed in the virtual address space, the AMM operation performs the physical move of the data to the second memory location outside the processor core, without processor involvement.
摘要翻译：具有处理器和存储器的数据处理系统包括提供异步存储器移动（AMM）存储（ST）指令的指令集架构（ISA）。当处理器执行AMM ST指令时，处理器执行一系列功能，其启动异步存储器移动（AMM）操作。 AMM ST指令通过以下方式将数据从具有第一实际地址的第一存储器位置移动到具有第二实际地址的第二存储器位置：（a）使用存储器映射的源有效地址来执行虚拟地址空间中的数据移动到第一存储器位置和存储器映射到第二存储器位置的目的地有效地址。当在虚拟地址空间中完成移动时，AMM操作将数据物理移动到处理器核心外部的第二存储器位置，而无需处理器参与。

10. 发明申请

US20080226993A1 Method of fabricating color filter substrate and infrared heating apparatus for the same 有权
标题翻译：彩色滤光片基板和红外线加热装置的制造方法
公开(公告)号：US20080226993A1
公开(公告)日：2008-09-18
申请号：US12003777
申请日：2007-12-31
申请人： Chulho Kim , Jonggo Lim , Samyeoul Kim , Taeyoung Oh
发明人： Chulho Kim , Jonggo Lim , Samyeoul Kim , Taeyoung Oh
IPC分类号： G03F1/00 , F27D11/12
CPC分类号： G03F7/0007 , G02B5/201 , G02B5/223 , G03F7/40
摘要： A method of fabricating a color filter substrate and an infrared heating apparatus for the same are provided. A post-baking process is replaced with an infrared irradiation method with a rapid thermal transfer characteristic. Therefore, the yield and production efficiency can be improved. The method of fabricating a color filter substrate includes coating a color resist layer on an entire surface of a substrate, placing a mask on the substrate and exposing the substrate, developing the exposed color resist layer to form a color filter pattern, and curing the color filter pattern by irradiating the substrate with infrared rays.
摘要翻译：提供了制造滤色器基板的方法和用于其的红外线加热装置。后烘烤过程由具有快速热转印特性的红外辐射方法代替。因此，可以提高产量和生产效率。制造滤色器基板的方法包括在基板的整个表面上涂覆着色抗蚀剂层，在基板上放置掩模并曝光基板，显影曝光的抗蚀剂层以形成滤色器图案，并固化颜色通过用红外线照射基板来形成滤光图案。

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