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1. 发明授权

US07545689B2 Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information 失效
标题翻译：通过保证冗余信息的健康来提高半导体器件产量的方法和装置
公开(公告)号：US07545689B2
公开(公告)日：2009-06-09
申请号：US11894861
申请日：2007-08-21
申请人： Alper Ilkbahar , Derek J. Bosch
发明人： Alper Ilkbahar , Derek J. Bosch
IPC分类号： G11C7/00
CPC分类号： G11C29/76
摘要： A method is provided comprising reading a set of memory cells indicating whether stored redundancy information is reliable and, if the set of memory cells indicates that the stored redundancy information is reliable, determining whether to read primary memory or redundant memory based on the stored redundancy information. Another method is provided comprising reading a set of memory cells associated with a group of memory cells in a primary memory, the set of memory cells indicating whether data can be reliably stored in the group of memory cells; if the set of memory cells indicates that data can be reliably stored in the group of memory cells, storing data in the group of memory cells; and if the set of memory cells does not indicate that data can be reliably stored in the group of memory cells, storing data in a group of memory cells in a redundant memory. In another preferred embodiment, a method for providing memory redundancy is provided.
摘要翻译：提供了一种方法，其包括：读取一组存储器单元，指示存储的冗余信息是否可靠;以及如果存储单元组指示所存储的冗余信息是可靠的，则基于所存储的冗余信息确定是否读取主存储器还是冗余存储器。提供了另一种方法，包括读取与主存储器中的一组存储器单元相关联的一组存储器单元，该组存储器单元指示数据是否可以可靠地存储在存储器单元组中; 如果存储器单元组指示数据可以可靠地存储在存储器单元组中，则将数据存储在存储单元组中; 并且如果存储器单元组不指示数据可以可靠地存储在存储器单元组中，则将数据存储在冗余存储器中的一组存储器单元中。在另一个优选实施例中，提供了一种用于提供存储器冗余的方法。

2. 发明授权

US07277336B2 Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information 失效
公开(公告)号：US07277336B2
公开(公告)日：2007-10-02
申请号：US11024516
申请日：2004-12-28
申请人： Alper Ilkbahar , Derek J. Bosch
发明人： Alper Ilkbahar , Derek J. Bosch
IPC分类号： G11C7/00
CPC分类号： G11C29/76
摘要： A method is provided comprising reading a set of memory cells indicating whether stored redundancy information is reliable and, if the set of memory cells indicates that the stored redundancy information is reliable, determining whether to read primary memory or redundant memory based on the stored redundancy information. Another method is provided comprising reading a set of memory cells associated with a group of memory cells in a primary memory, the set of memory cells indicating whether data can be reliably stored in the group of memory cells; if the set of memory cells indicates that data can be reliably stored in the group of memory cells, storing data in the group of memory cells; and if the set of memory cells does not indicate that data can be reliably stored in the group of memory cells, storing data in a group of memory cells in a redundant memory. In another preferred embodiment, a method for providing memory redundancy is provided.

3. 发明授权

US06996017B2 Redundant memory structure using bad bit pointers 有权
标题翻译：冗余内存结构使用坏位指针
公开(公告)号：US06996017B2
公开(公告)日：2006-02-07
申请号：US10961501
申请日：2004-10-08
申请人： Roy E. Scheuerlein , Mark G. Johnson , Derek J. Bosch , Alper Ilkbahar , J. James Tringali
发明人： Roy E. Scheuerlein , Mark G. Johnson , Derek J. Bosch , Alper Ilkbahar , J. James Tringali
IPC分类号： G11C7/00
CPC分类号： G11C29/76 , G11C7/1006 , G11C7/24 , G11C29/44 , G11C29/4401 , G11C29/78
摘要： The preferred embodiments described herein relate to a redundant memory structure using bad bit pointers. In one preferred embodiment, data is written in a first plurality of memory cells, and an error is detected in writing data in one of the memory cells. In response to the detected error, a pointer is written in a second plurality of memory cells, the pointer identifying which memory cell in the first plurality of memory cells contains the error. During a read operation, the data is read from the first plurality of memory cells, and the pointer is read from the second plurality of memory cells. From the pointer, the memory cell containing the error is identified, and the error is corrected. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
摘要翻译：这里描述的优选实施例涉及使用坏比特指针的冗余存储器结构。在一个优选实施例中，将数据写入第一多个存储单元，并且在存储单元之一中写入数据时检测到错误。响应于检测到的错误，指针被写入第二多个存储单元中，该指针标识第一多个存储单元中的哪个存储单元包含该错误。在读操作期间，从第一多个存储单元读取数据，并从第二多个存储单元读取指针。从指针中，识别包含错误的存储单元，并纠正错误。提供了其它优选实施方案，并且每个优选实施方案可以单独使用或彼此组合使用。

4. 发明授权

US06928590B2 Memory device and method for storing bits in non-adjacent storage locations in a memory array 有权
标题翻译：用于存储存储器阵列中非相邻存储位置中的位的存储器件和方法
公开(公告)号：US06928590B2
公开(公告)日：2005-08-09
申请号：US10024647
申请日：2001-12-14
申请人： Alper Ilkbahar , Roy E. Scheuerlein , Derek J. Bosch
发明人： Alper Ilkbahar , Roy E. Scheuerlein , Derek J. Bosch
IPC分类号： G06F11/00 , G06F11/10 , H04B1/74
CPC分类号： G06F11/1028
摘要： The preferred embodiments described herein provide a memory device and method for storing bits in non-adjacent storage locations in a memory array. In one preferred embodiment, a memory device is provided comprising a register and a memory array. A plurality of bits provided to the memory device are stored in the register in a first direction, read from the register in a second direction, and then stored in the memory array. Bits that are adjacent to one another when provided to the memory device are stored in non-adjacent storage locations in the memory array. When the plurality of bits takes the form of an ECC word, the storage of bits in non-adjacent storage locations in the memory array reduces the likelihood of an uncorrectable multi-bit error. In another preferred embodiment, a memory device is provided comprising a memory array and a register comprising a first set of wordlines and bitlines and a second set of wordlines and bitlines arranged orthogonal to the first set. In yet another preferred embodiment, memory decoders or a host device is used to store bits in non-adjacent storage locations in a memory array of a memory device. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.
摘要翻译：本文描述的优选实施例提供了一种用于存储位于存储器阵列中的非相邻存储位置中的位的存储器件和方法。在一个优选实施例中，提供了包括寄存器和存储器阵列的存储器件。提供给存储器件的多个位以第一方向存储在寄存器中，从第二方向从寄存器读取，然后存储在存储器阵列中。当提供给存储器件时彼此相邻的位被存储在存储器阵列中的非相邻存储位置中。当多个位采用ECC字的形式时，存储器阵列中非相邻存储位置中的位的存储减少了不可校正的多位错误的可能性。在另一个优选实施例中，提供了存储器件，其包括存储器阵列和包括第一组字线和位线的寄存器以及与第一组正交布置的第二组字线和位线。在另一优选实施例中，存储器解码器或主机设备用于存储存储器件的存储器阵列中的非相邻存储位置中的位。提供了其它优选实施方案，并且本文所述的各优选实施方案可以单独使用或彼此组合使用。

5. 发明授权

US06868022B2 Redundant memory structure using bad bit pointers 有权
标题翻译：冗余内存结构使用坏位指针
公开(公告)号：US06868022B2
公开(公告)日：2005-03-15
申请号：US10402385
申请日：2003-03-28
申请人： Roy E. Scheuerlein , Mark G. Johnson , Derek J. Bosch , Alper Ilkbahar , J. James Tringali
发明人： Roy E. Scheuerlein , Mark G. Johnson , Derek J. Bosch , Alper Ilkbahar , J. James Tringali
IPC分类号： G11C7/10 , G11C7/24 , G11C29/00 , G11C29/44 , G11C7/00
CPC分类号： G11C29/76 , G11C7/1006 , G11C7/24 , G11C29/44 , G11C29/4401 , G11C29/78
摘要： The preferred embodiments described herein relate to a redundant memory structure using bad bit pointers. In one preferred embodiment, data is written in a first plurality of memory cells, and an error is detected in writing data in one of the memory cells. In response to the detected error, a pointer is written in a second plurality of memory cells, the pointer identifying which memory cell in the first plurality of memory cells contains the error. During a read operation, the data is read from the first plurality of memory cells, and the pointer is read from the second plurality of memory cells. From the pointer, the memory cell containing the error is identified, and the error is corrected. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
摘要翻译：这里描述的优选实施例涉及使用坏位指针的冗余存储器结构。在一个优选实施例中，将数据写入第一多个存储单元，并且在存储单元之一中写入数据时检测到错误。响应于检测到的错误，指针被写入第二多个存储单元中，该指针标识第一多个存储单元中的哪个存储单元包含该错误。在读操作期间，从第一多个存储单元读取数据，并从第二多个存储单元读取指针。从指针中，识别包含错误的存储单元，并纠正错误。提供了其它优选实施方案，并且每个优选实施方案可以单独使用或彼此组合使用。

6. 发明授权

US06658438B1 Method for deleting stored digital data from write-once memory device 失效
标题翻译：用于从一次写入存储器件删除存储的数字数据的方法
公开(公告)号：US06658438B1
公开(公告)日：2003-12-02
申请号：US09638439
申请日：2000-08-14
申请人： Christopher S. Moore , Derek J. Bosch , Daniel C. Steere , J. James Tringali
发明人： Christopher S. Moore , Derek J. Bosch , Daniel C. Steere , J. James Tringali
IPC分类号： G06F1730
CPC分类号： G06F17/30952 , Y10S707/99953 , Y10S707/99956
摘要： A digital storage system is coupled to a write-once memory array. File delete commands are implemented by over-writing a destructive digital pattern to at least a portion of the memory cells associated with the file to be deleted. One disclosed system alters the manner in which a file delete command is implemented, depending upon whether the file is stored in a write-once memory or in a re-writable memory.
摘要翻译：数字存储系统耦合到一次写入存储器阵列。文件删除命令通过将破坏性数字模式重写到与要删除的文件相关联的存储器单元的至少一部分来实现。一个公开的系统根据文件是存储在一次写入存储器还是一个可重写存储器中来改变实现文件删除命令的方式。

7. 发明授权

US06545891B1 Modular memory device 有权
标题翻译：模块化存储设备
公开(公告)号：US06545891B1
公开(公告)日：2003-04-08
申请号：US09638334
申请日：2000-08-14
申请人： J. James Tringali , P. Michael Farmwald , Thomas H. Lee , Mark G. Johnson , Derek J. Bosch
发明人： J. James Tringali , P. Michael Farmwald , Thomas H. Lee , Mark G. Johnson , Derek J. Bosch
IPC分类号： G11C502
CPC分类号： G11C5/025 , G11C5/063
摘要： A modular memory device includes a support element, a memory unit comprising a three-dimensional memory array carried by the support element, a device interface unit carried by the support element and coupled with the memory unit, and an electrical connector carried by the support element and coupled with the device interface unit. The memory array is well suited for use as a digital medium storage device for digital media such as digital text, digital music, digital image or images, and digital video. The device interface unit is not required in all cases.
摘要翻译：模块化存储器件包括支撑元件，包括由支撑元件承载的三维存储器阵列的存储器单元，由支撑元件承载并与存储器单元耦合的器件接口单元，以及由支撑元件承载的电连接器并与设备接口单元耦合。存储器阵列非常适合用作数字媒体的数字媒体存储设备，例如数字文本，数字音乐，数字图像或图像以及数字视频。在所有情况下都不需要设备接口单元。

8. 发明授权

US06867992B2 Modular memory device 有权
标题翻译：模块化存储设备
公开(公告)号：US06867992B2
公开(公告)日：2005-03-15
申请号：US10342122
申请日：2003-01-13
申请人： J. James Tringali , P. Michael Farmwald , Thomas H. Lee , Mark G. Johnson , Derek J. Bosch
发明人： J. James Tringali , P. Michael Farmwald , Thomas H. Lee , Mark G. Johnson , Derek J. Bosch
IPC分类号： G06K19/077 , G11C5/00 , G11C5/02 , G11C5/06
CPC分类号： G11C5/025 , G11C5/063
摘要： In one embodiment, a modular memory device is presented comprising a substrate, a memory array fabricated above the substrate, and first and second circuitry fabricated on the substrate and under the memory array. The first and second circuitry allow the modular memory device to interface with first and second varieties of host devices, respectively. In another embodiment, a modular memory device is presented comprising a substrate, a memory array fabricated above the substrate, memory array support circuitry fabricated on the substrate, and logic circuitry fabricated on the substrate and under the memory array.
摘要翻译：在一个实施例中，呈现模块化存储器件，其包括衬底，在衬底上方制造的存储器阵列，以及在衬底上和存储器阵列下方制造的第一和第二电路。第一和第二电路允许模块化存储器件分别与第一和第二种类型的主机设备接口。在另一个实施例中，提出了一种模块化存储器件，其包括衬底，在衬底上方制造的存储器阵列，在衬底上制造的存储器阵列支持电路，以及在衬底上以及在存储器阵列之下的逻辑电路。

9. 发明授权

US07958390B2 Memory device for repairing a neighborhood of rows in a memory array using a patch table 有权
标题翻译：使用补丁表修复存储器阵列中行的邻域的存储器件
公开(公告)号：US07958390B2
公开(公告)日：2011-06-07
申请号：US11803756
申请日：2007-05-15
申请人： Derek J. Bosch , Christopher S. Moore
发明人： Derek J. Bosch , Christopher S. Moore
IPC分类号： G06F11/00
CPC分类号： G11C29/765
摘要： A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N−1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N−1, N, and N+1 to a table stored in the memory device.
摘要翻译：公开了一种用于使用补丁表修复存储器阵列中的行的邻域的存储器件。在一个实施例中，存储器装置中的电路可操作以在存储器件的临时存储区域中存储（i）存储在存储器阵列中的行N中的第一数据，（ii）存储的第二数据在存储器阵列中的行N-1中，以及（iii）存储在存储器阵列中的行N + 1中的第三数据（如果有的话）。电路可操作地将存储器阵列中的行N中的第一数据写入，并且响应于写入第一数据的错误，写入第一数据，第二数据（如果有的话）和第三数据（如果有的话）在存储器件中的修复区域中的各行中。该电路进一步可操作以将行N-1，N和N + 1的地址添加到存储在存储装置中的表。

10. 发明申请

US20080288813A1 Method for repairing a neighborhood of rows in a memory array using a patch table 有权
标题翻译：使用补丁表修复存储器阵列中的行邻域的方法
公开(公告)号：US20080288813A1
公开(公告)日：2008-11-20
申请号：US11803776
申请日：2007-05-15
申请人： Derek J. Bosch , Christopher S. Moore
发明人： Derek J. Bosch , Christopher S. Moore
IPC分类号： G06F11/00
CPC分类号： G11C29/804
摘要： A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N-1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N-1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N-1, N, and N+1.
摘要翻译：公开了一种使用补丁表修复存储器阵列中的行的邻域的方法。要存储在存储器装置的存储器阵列中的行N中的第一数据，存储在存储器阵列中的行N-1中的第二数据（如果有的话）以及存储在存储器中的行N + 1中的第三数据（如果有的话）阵列存储在存储器件的临时存储区域中。第一数据被写入行N，并且响应于错误，将第一数据，第二数据（如果有的话）和第三数据（如果有的话）写入存储器件中的修复区域中的相应行中。行N-1，N和N + 1的地址被添加到存储在存储装置中的表中，以指示应该使用修复区中的哪些行而不是行N-1，N和N + 1。

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