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1. 发明授权

US08279600B2 Electronic device enclosure with anti-EMI holes 失效
标题翻译：具防电磁孔的电子设备外壳
公开(公告)号：US08279600B2
公开(公告)日：2012-10-02
申请号：US12909044
申请日：2010-10-21
申请人： Yu-Hsu Lin
发明人： Yu-Hsu Lin
IPC分类号： H05K7/20 , H05K9/00
CPC分类号： H05K9/0041 , G06F1/20 , Y10T29/49117
摘要： An electronic device enclosure for suppressing Electro-Magnetic Interference (EMI) includes a first plate defined on a first plane, a second plate defined on a second plane and a number of polygonal holes defined in the first plate at an angle of orientation. The second plane is substantially perpendicular to the first plane. The angle of orientation of the number of polygonal holes in the first plate is set according to a number of maximum dimensions in a direction substantially perpendicular to the second plane. The angle of orientation is defined such that there are a minimum number of maximum dimensions.
摘要翻译：用于抑制电磁干扰（EMI）的电子设备外壳包括限定在第一平面上的第一板，限定在第二平面上的第二板和以取向角限定在第一板中的多个多边形孔。第二平面基本上垂直于第一平面。根据与第二平面基本垂直的方向的最大尺寸的数量来设定第一板中的多边形孔的数量的取向角。定向角度被定义为具有最小数量的最大尺寸。

2. 发明授权

US08154879B2 Motherboard 失效
标题翻译：母板
公开(公告)号：US08154879B2
公开(公告)日：2012-04-10
申请号：US11849306
申请日：2007-09-03
申请人： Chih-Hang Chao , Yu-Hsu Lin , Jeng-Da Wu
发明人： Chih-Hang Chao , Yu-Hsu Lin , Jeng-Da Wu
IPC分类号： H05K7/02 , H05K7/06 , H05K7/08 , H05K7/10
CPC分类号： H05K1/0271 , H05K1/0203 , H05K2201/09063 , H05K2201/10734
摘要： A motherboard includes a printed circuit board, a first chip and a second chip arranged on the printed circuit board in parallel. A plurality of securing holes are defined in the printed circuit board around the first chip. At least one isolating hole is defined in the printed circuit board between the second chip and a first line determined by two of the securing holes close to the second chip. Should the printed circuit board suffer an impact, damage to the chips may be effectively minimized or prevented.
摘要翻译：主板包括平行布置在印刷电路板上的印刷电路板，第一芯片和第二芯片。在第一芯片周围的印刷电路板中限定多个固定孔。在第二芯片和由靠近第二芯片的两个固定孔确定的第一线之间的印刷电路板中限定至少一个隔离孔。如果印刷电路板受到冲击，则可以有效地最小化或防止对芯片的损坏。

3. 发明申请

US20110304977A1 ELECTRONIC DEVICE ENCLOSURE WITH ANTI-EMI HOLES 失效
标题翻译：带防静电帽的电子设备外壳
公开(公告)号：US20110304977A1
公开(公告)日：2011-12-15
申请号：US12909044
申请日：2010-10-21
申请人： YU-HSU LIN
发明人： YU-HSU LIN
IPC分类号： G06F1/20 , H01R43/00 , H05K9/00
CPC分类号： H05K9/0041 , G06F1/20 , Y10T29/49117
摘要： An electronic device enclosure for suppressing Electro-Magnetic Interference (EMI) includes a first plate defined on a first plane, a second plate defined on a second plane and a number of polygonal holes defined in the first plate at an angle of orientation. The second plane is substantially perpendicular to the first plane. The angle of orientation of the number of polygonal holes in the first plate is set according to a number of maximum dimensions in a direction substantially perpendicular to the second plane. The angle of orientation is defined such that there are a minimum number of maximum dimensions.
摘要翻译：用于抑制电磁干扰（EMI）的电子设备外壳包括限定在第一平面上的第一板，限定在第二平面上的第二板和以取向角限定在第一板中的多个多边形孔。第二平面基本上垂直于第一平面。根据与第二平面基本垂直的方向的最大尺寸的数量来设定第一板中的多边形孔的数量的取向角。定向角度被定义为具有最小数量的最大尺寸。

4. 发明授权

US07961062B2 Aggressor/victim transmission line pair having spaced time delay modules for providing cross-talk reduction 有权
标题翻译：具有间隔时间延迟模块的侵入者/受害者传输线对用于提供串扰减少
公开(公告)号：US07961062B2
公开(公告)日：2011-06-14
申请号：US12346825
申请日：2008-12-30
申请人： Yu-Hsu Lin
发明人： Yu-Hsu Lin
IPC分类号： H01P3/02
CPC分类号： H04B3/32 , H04B3/462
摘要： A pair of signal transmission lines includes an aggressor line and a victim line parallel to the aggressor line. A plurality of time delay modules is linked in the aggressor line. A plurality of time delay modules is linked in the victim line. A total delay time of the time delay modules of the victim line is equal to a total delay time of the time delay modules of the aggressor line.
摘要翻译：一对信号传输线包括侵略线和与入侵者线平行的受害线。多个时间延迟模块在侵略者行中被链接。多个延时模块在受害线上相连。受害线路的延时模块的总延迟时间等于侵入线的延时模块的总延迟时间。

5. 发明申请

US20110127069A1 PRINTED CIRCUIT BOARD AND LAYOUT METHOD THEREOF 失效
标题翻译：印刷电路板及其布局方法
公开(公告)号：US20110127069A1
公开(公告)日：2011-06-02
申请号：US12759011
申请日：2010-04-13
申请人： YU-HSU LIN
发明人： YU-HSU LIN
IPC分类号： H05K1/00 , G06F17/50
CPC分类号： H05K1/00 , G06F17/5068 , H05K1/0245 , H05K3/0005 , H05K2201/09236 , H05K2201/09318
摘要： A printed circuit board layout method includes the following steps. A printed circuit board with a signal layer, and a pair of differential transmission lines positioned on the signal layer is provided. A first distance is determined, when the distance between the pair of differential transmission lines is greater or less than the first distance, an eye width and an eye height of an eye diagram obtained at output terminals of the pair of differential transmission lines increases. A second distance less than the first distance is set between the pair of differential transmission lines which makes the eye width and the eye height meet requirement of the differential transmission lines for the eye diagram.
摘要翻译：印刷电路板布局方法包括以下步骤。提供了具有信号层的印刷电路板和位于信号层上的一对差动传输线。确定第一距离，当一对差动传输线之间的距离大于或小于第一距离时，在一对差动传输线的输出端获得的眼图的眼睛宽度和眼睛高度增加。在一对差分传输线之间设置小于第一距离的第二距离，使得眼睛的眼睛宽度和眼睛高度满足眼图的差动传输线的要求。

6. 发明申请

US20090190309A1 ELECTRONIC APPARATUS WITH AIR GUIDING ELEMENT 失效
标题翻译：具有空气导向元件的电子设备
公开(公告)号：US20090190309A1
公开(公告)日：2009-07-30
申请号：US12137781
申请日：2008-06-12
申请人： LIANG-QING SHAN , YANG LI , YU-HSU LIN , JENG-DA WU , LIANG-LIANG CAO , LEI GUO
发明人： LIANG-QING SHAN , YANG LI , YU-HSU LIN , JENG-DA WU , LIANG-LIANG CAO , LEI GUO
IPC分类号： H05K7/20
CPC分类号： H05K7/20563 , H05K7/186
摘要： An electronic apparatus includes an enclosure (30), a circuit board (40), a fan module (20), and an air guiding element (10) mounted in the enclosure. The circuit board includes at least one heat generating component (41) thereon. The fan module has a fan (22) and an output opening (213) corresponding to the fan. The air guiding element comprises a resisting panel (11) and a guiding panel (12) comprises a free end that extends toward the output opening of the fan module. The at least one heat generating component and the output opening are on the same side of the resisting panel. The guiding panel defines a free end (127) and a connecting end (125) connecting the resisting panel. A plane defined by the ends of the guiding panel is aligned at an angle larger than 90 degrees relative to the resisting panel.
摘要翻译：电子设备包括外壳（30），电路板（40），风扇模块（20）和安装在外壳中的空气引导元件（10）。电路板包括至少一个发热部件（41）。风扇模块具有与风扇对应的风扇（22）和输出开口（213）。空气引导元件包括阻挡板（11），并且引导板（12）包括朝向风扇模块的输出开口延伸的自由端。所述至少一个发热部件和所述输出开口位于所述抵抗板的同一侧。引导板限定了连接抵抗板的自由端（127）和连接端（125）。由引导板的端部限定的平面相对于电阻板以大于90度的角度排列。

7. 发明申请

US20090166164A1 BUTTON ASSEMBLY 失效
标题翻译：按钮组合
公开(公告)号：US20090166164A1
公开(公告)日：2009-07-02
申请号：US12102019
申请日：2008-04-14
申请人： ZHI-PING WU , CHIH-HANG CHAO , YU-HSU LIN , JENG-DA WU
发明人： ZHI-PING WU , CHIH-HANG CHAO , YU-HSU LIN , JENG-DA WU
IPC分类号： H01H3/20
CPC分类号： H01H3/46 , G06F1/181
摘要： A button assembly for pressing a switch in a computer bezel includes a button connected to an arm. A cutout is defined in the computer bezel. The button is inserted in the cutout, and the arm is pivotably mounted on the computer bezel. A pressing portion extends outward from a side of the arm. A slanted pressing plane is formed on the pressing portion. Pressing the button moves the arm so that one end of the slanted pressing plane away from the arm contacts the switch. The switch resists the pressing portion, causing the arm to rotate so that the other end of the slanted pressing plane moves forward, thereby the slanted pressing plane entirely contacts and activates the switch.
摘要翻译：用于按压计算机挡板中的开关的按钮组件包括连接到臂的按钮。计算机挡板中定义了一个切口。按钮插入切口，臂可枢转地安装在计算机挡板上。按压部从臂的一侧向外延伸。在按压部上形成有倾斜的按压面。按下按钮可移动手臂，使倾斜按压平面远离手臂的一端接触开关。开关抵抗按压部，使臂旋转，使得倾斜按压面的另一端向前移动，由此倾斜的按压面完全接触并启动开关。

8. 发明授权

US07545233B2 Layout configuration of differential signal transmission lines for printed circuit board having offset vias 失效
标题翻译：具有偏置通孔的印刷电路板的差分信号传输线的布局配置
公开(公告)号：US07545233B2
公开(公告)日：2009-06-09
申请号：US11446950
申请日：2006-06-05
申请人： Yu-Hsu Lin , Shang-Tsang Yeh , Chuan-Bing Li
发明人： Yu-Hsu Lin , Shang-Tsang Yeh , Chuan-Bing Li
IPC分类号： H01P3/04
CPC分类号： H01P3/081 , H01P3/088 , H05K1/0245 , H05K1/115 , H05K2201/09236 , H05K2201/09636
摘要： A layout configuration of a differential pair for a printed circuit board (PCB) having a signal plane is provided. In a preferred embodiment, the layout configuration comprises: a differential pair on the signal plane; a pair of vias abutting the differential pair, and the pair of vias being mutually dissymmetrical about the differential pair; and a distance between the pair of vias along the differential pair being equal to ½ TV, wherein T is a signal rise time, V is a speed of the signal. Therefore, the layout configuration can meet with the requirements of impedance matching, reduce reflection, and improve signal integrity.
摘要翻译：提供了具有信号面的印刷电路板（PCB）的差动对的配置结构。在优选实施例中，布局配置包括：信号平面上的差分对; 邻接差分对的一对通孔，并且该对通孔围绕差动对相互不对称; 并且沿着差分对的一对通孔之间的距离等于1/2电视，其中T是信号上升时间，V是信号的速度。因此，布局配置可以满足阻抗匹配的要求，减少反射，提高信号完整性。

9. 发明授权

US07409668B2 Method for improving via's impedance 失效
标题翻译：改善通路阻抗的方法
公开(公告)号：US07409668B2
公开(公告)日：2008-08-05
申请号：US11392003
申请日：2006-03-29
申请人： Yu-Hsu Lin , Shang-Tsang Yeh , Chuang-Bing Li
发明人： Yu-Hsu Lin , Shang-Tsang Yeh , Chuang-Bing Li
IPC分类号： G06F17/50 , G06F19/00
CPC分类号： H05K1/116 , G06F17/5068 , H05K1/0237 , H05K3/0005 , H05K3/0047 , H05K3/429 , H05K2201/09718 , H05K2203/163
摘要： A method is for controlling an impedance of a via of a printed circuit board. The Via is connected with a trace and includes a drill hole, a pad and an anti-pad. The method includes steps of: building a math model; testing whether an impedance of the via matching with an impedance of the trace; analyzing the impedance of the via if passing the testing; and adjusting parameters of the pad, the anti-pad, and the drill hole if fails testing, and returning to the simulating step, till impedance matching achieved. The method which can efficiently keep signals integrality and increase signal transmission speed.
摘要翻译：一种用于控制印刷电路板的通孔的阻抗的方法。通道与轨迹连接，并包括一个钻孔，一个垫和一个防磨垫。该方法包括以下步骤：构建数学模型; 测试通孔的阻抗是否匹配跟踪的阻抗; 通过测试分析通孔的阻抗; 并且如果测试失败，则调整焊盘，防焊盘和钻孔的参数，并返回到模拟步骤，直到达到阻抗匹配。可有效保持信号完整性，提高信号传输速度的方法。

10. 发明申请

US20070244664A1 Resistance calculating method 审中-公开
标题翻译：电阻计算方法
公开(公告)号：US20070244664A1
公开(公告)日：2007-10-18
申请号：US11586977
申请日：2006-10-26
申请人： Yu-Hsu Lin
发明人： Yu-Hsu Lin
IPC分类号： G06F19/00 , G01R15/00 , G01R27/00
CPC分类号： G01N27/04
摘要： An exemplary resistance calculating method includes steps of: calculating a heat transfer rate of a conductor; and finding a resistance of the conductor as a reciprocal of the heat transfer rate of the conductor. The calculating method includes sub-steps of: simulating the conductor with a software which can calculates a heat transfer rate of the conductor according to a coefficient of heat conductivity of the conductor and a temperature difference of input and output terminals of the conductor; setting the coefficient of heat conductivity of the conductor with a reciprocal of a resistivity of a material of which the conductor comprises; setting the temperature difference of the input and output terminals with −1 Celsius degrees; and calculating the heat transfer rate of the simulated conductor with the software.
摘要翻译：示例性电阻计算方法包括以下步骤：计算导体的传热速率; 并且发现导体的电阻作为导体的传热速率的倒数。计算方法包括以下步骤：用软件模拟导体，该软件可以根据导体的导热系数和导体的输入和输出端子的温差来计算导体的传热速率; 将导体的导热系数设定为导体所含材料的电阻率的倒数; 将输入和输出端子的温差设置为-1摄氏度; 并用软件计算模拟导体的传热速率。

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