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1. 发明授权

US07795694B2 Quantum device, manufacturing method of the same and controlling method of the same 有权
标题翻译：量子器件及其制造方法及其控制方法
公开(公告)号：US07795694B2
公开(公告)日：2010-09-14
申请号：US12292235
申请日：2008-11-14
申请人： Haizhi Song , Tatsuya Usuki
发明人： Haizhi Song , Tatsuya Usuki
IPC分类号： H01L21/00
CPC分类号： H01L29/66977 , G01Q80/00 , H01L29/127 , Y10S438/962 , Y10S977/938
摘要： By bringing a tip of an AFM into contact with the surface of a GaAs substrate or an AlGaAs substrate, for example, applying a negative bias to the tip, and applying a positive bias to the GaAs substrate or the AlGaAs substrate, a donut-shaped oxide film is formed. Then, the oxide film is removed. As a result, a ring-shaped groove is formed in the surface of the GaAs substrate or the AlGaAs substrate. The oxide film can be removed by chemical etching, ultrasonic cleaning with water, a treatment with atomic hydrogen in a vacuum, or the like. Thereafter, a semiconductor film (InAs film or InGaAs film, for example) is epitaxially grown in the groove. Then, a capping layer which covers the semiconductor film and the GaAs substrate or the AlGaAs substrate is formed.
摘要翻译：通过使AFM的尖端与GaAs衬底或AlGaAs衬底的表面接触，例如向尖端施加负偏压，并向GaAs衬底或AlGaAs衬底施加正偏压，形成环形形成氧化膜。然后，除去氧化膜。结果，在GaAs衬底或AlGaAs衬底的表面中形成环形沟槽。可以通过化学蚀刻，用水进行超声波清洗，在真空中用原子氢处理等除去氧化膜。此后，在槽内外延生长半导体膜（InAs膜或InGaAs膜）。然后，形成覆盖半导体膜和GaAs衬底或AlGaAs衬底的覆盖层。

2. 发明授权

US07679076B2 Optical semiconductor device and method of manufacturing the same 有权
标题翻译：光半导体装置及其制造方法
公开(公告)号：US07679076B2
公开(公告)日：2010-03-16
申请号：US11896154
申请日：2007-08-30
申请人： Shinichi Hirose , Tatsuya Usuki
发明人： Shinichi Hirose , Tatsuya Usuki
IPC分类号： H01L29/06
CPC分类号： H01S5/34 , B82Y10/00 , B82Y20/00 , H01L33/385 , H01S5/0425 , H01S5/3412 , Y10S438/962 , Y10S977/774 , Y10S977/932
摘要： Provided is an optical semiconductor device, which includes a GaAs substrate (or a semiconductor substrate) 20; an n-type contact layer (or a doping layer) 21 formed on one surface 20a of the GaAs substrate 20; an active layer 25 formed on top of the n-type contact layer 21 and including at least one quantum dot 23; a p-type contact layer (or a contact layer) 26 formed on top of the active layer 25 and being of an opposite conduction type to the n-type contact layer 21; an insulating layer 29 formed on top of the p-type contact layer 26 and including a first opening 29a whose size is such that a contact region CR of the p-type contact layer 26 lies within the first opening 29a; a p-side electrode layer 33c formed on top of the contact region CR of the p-type contact layer 26 and on top of the insulating layer 29 and including a second opening 33a lying within the first opening 29a; and a n-side electrode layer (or a second electrode layer) 37 formed on the other surface 20b of the GaAs substrate 20.
摘要翻译：提供了包括GaAs衬底（或半导体衬底）20的光学半导体器件; 形成在GaAs衬底20的一个表面20a上的n型接触层（或掺杂层）21; 形成在n型接触层21的顶部并且包括至少一个量子点23的有源层25; 形成在有源层25顶部并且与n型接触层21具有相反导电型的p型接触层（或接触层）26; 形成在p型接触层26的顶部的绝缘层29，其包括尺寸使得p型接触层26的接触区域CR位于第一开口29a内的第一开口29a; p型电极层33c，其形成在p型接触层26的接触区域CR的顶部和绝缘层29的顶部，并且包括位于第一开口29a内的第二开口33a; 以及形成在GaAs衬底20的另一个表面20b上的n侧电极层（或第二电极层）37。

3. 发明申请

US20090078930A1 Quantum device, manufacturing method of the same and controlling method of the same 有权
标题翻译：量子器件及其制造方法及其控制方法
公开(公告)号：US20090078930A1
公开(公告)日：2009-03-26
申请号：US12292235
申请日：2008-11-14
申请人： Haizhi Song , Tatsuya Usuki
发明人： Haizhi Song , Tatsuya Usuki
IPC分类号： H01L29/12
CPC分类号： H01L29/66977 , G01Q80/00 , H01L29/127 , Y10S438/962 , Y10S977/938
摘要： By bringing a tip of an AFM into contact with the surface of a GaAs substrate or an AlGaAs substrate, for example, applying a negative bias to the tip, and applying a positive bias to the GaAs substrate or the AlGaAs substrate, a donut-shaped oxide film is formed. Then, the oxide film is removed. As a result, a ring-shaped groove is formed in the surface of the GaAs substrate or the AlGaAs substrate. The oxide film can be removed by chemical etching, ultrasonic cleaning with water, a treatment with atomic hydrogen in a vacuum, or the like. Thereafter, a semiconductor film (InAs film or InGaAs film, for example) is epitaxially grown in the groove. Then, a capping layer which covers the semiconductor film and the GaAs substrate or the AlGaAs substrate is formed.
摘要翻译：通过使AFM的尖端与GaAs衬底或AlGaAs衬底的表面接触，例如向尖端施加负偏压，并向GaAs衬底或AlGaAs衬底施加正偏压，形成环形形成氧化膜。然后，除去氧化膜。结果，在GaAs衬底或AlGaAs衬底的表面中形成环形沟槽。可以通过化学蚀刻，用水进行超声波清洗，在真空中用原子氢处理等除去氧化膜。此后，在槽内外延生长半导体膜（InAs膜或InGaAs膜）。然后，形成覆盖半导体膜和GaAs衬底或AlGaAs衬底的覆盖层。

4. 发明申请

US20080014701A1 Direct tunneling memory with separated transistor and tunnel areas 失效
公开(公告)号：US20080014701A1
公开(公告)日：2008-01-17
申请号：US11892872
申请日：2007-08-28
申请人： Kouji Tsunoda , Tatsuya Usuki , Masao Taguchi
发明人： Kouji Tsunoda , Tatsuya Usuki , Masao Taguchi
IPC分类号： H01L21/8247
CPC分类号： H01L27/11526 , G11C16/0416 , H01L27/105 , H01L27/11543 , H01L29/0692 , H01L29/7883
摘要： A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

5. 发明申请

US20070228373A1 Single-photon generator 有权
标题翻译：单光子发生器
公开(公告)号：US20070228373A1
公开(公告)日：2007-10-04
申请号：US11633537
申请日：2006-12-05
申请人： Kazuya Takemoto , Tatsuya Usuki , Yasuhiko Arakawa
发明人： Kazuya Takemoto , Tatsuya Usuki , Yasuhiko Arakawa
IPC分类号： H01L31/00 , H01L29/04 , H01L29/10
CPC分类号： H04B10/70 , G02F1/37 , H04L9/0858
摘要： A single-photon generator includes a single-photon generating device generating a single-photon pulse having a wavelength on the shorter wavelength side than a communication wavelength band, and a single-photon wavelength conversion device performing wavelength conversion of the single-photon pulse into a single-photon pulse of the communication wavelength band, using pump pulse light for single-photon wavelength conversion.
摘要翻译：单光子发生器包括产生具有比通信波长带更短波长侧的波长的单光子脉冲的单光子产生装置，以及执行单光子脉冲的波长转换的单光子波长转换装置通信波长带的单光子脉冲，使用泵浦脉冲光进行单光子波长转换。

6. 发明申请

US20050230741A1 Direct tunneling memory with separated transistor and tunnel areas 失效
标题翻译：具有分离晶体管和隧道区域的直接隧道存储器
公开(公告)号：US20050230741A1
公开(公告)日：2005-10-20
申请号：US11037176
申请日：2005-01-19
申请人： Kouji Tsunoda , Tatsuya Usuki , Masao Taguchi
发明人： Kouji Tsunoda , Tatsuya Usuki , Masao Taguchi
IPC分类号： H01L21/8247 , G11C16/04 , H01L27/105 , H01L27/115 , H01L29/06 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11526 , G11C16/0416 , H01L27/105 , H01L27/11543 , H01L29/0692 , H01L29/7883
摘要： A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.
摘要翻译：半导体器件具有形成在半导体衬底上的隔离区域，并且限定包括选择晶体管区域和直接隧道元件区域的连续有源区域; 形成在所述选择晶体管区域的沟道区上的栅极绝缘膜; 隧道绝缘膜，其形成在所述直接隧道元件区域的部分区域上，并且具有与所述栅极绝缘膜的厚度不同的厚度; 形成在栅极绝缘膜和隧道绝缘膜上方的连续浮栅; 在所述浮栅电极的表面上形成的电极间绝缘膜; 通过所述电极间绝缘膜与所述浮栅相对的控制栅电极; 以及形成在选择晶体管区域的沟道区域的两侧并且不与隧道绝缘膜重叠的一对源极/漏极区域。

7. 发明授权

US07768692B2 Single-photon generator 有权
标题翻译：单光子发生器
公开(公告)号：US07768692B2
公开(公告)日：2010-08-03
申请号：US11633537
申请日：2006-12-05
申请人： Kazuya Takemoto , Tatsuya Usuki , Yasuhiko Arakawa
发明人： Kazuya Takemoto , Tatsuya Usuki , Yasuhiko Arakawa
IPC分类号： G02F1/1335 , H04L9/08
CPC分类号： H04B10/70 , G02F1/37 , H04L9/0858
摘要： A single-photon generator includes a single-photon generating device generating a single-photon pulse having a wavelength on the shorter wavelength side than a communication wavelength band, and a single-photon wavelength conversion device performing wavelength conversion of the single-photon pulse into a single-photon pulse of the communication wavelength band, using pump pulse light for single-photon wavelength conversion.
摘要翻译：单光子发生器包括产生具有比通信波长带更短波长侧的波长的单光子脉冲的单光子产生装置，以及执行单光子脉冲的波长转换的单光子波长转换装置通信波长带的单光子脉冲，使用泵浦脉冲光进行单光子波长转换。

8. 发明授权

US07700937B2 Single-photon generating device, single-photon detecting device, and optical quantum gate 有权
标题翻译：单光子发生装置，单光子检测装置和光量子门
公开(公告)号：US07700937B2
公开(公告)日：2010-04-20
申请号：US11522421
申请日：2006-09-18
申请人： Shinichi Hirose , Motomu Takatsu , Tatsuya Usuki , Yasuhiko Arakawa
发明人： Shinichi Hirose , Motomu Takatsu , Tatsuya Usuki , Yasuhiko Arakawa
IPC分类号： H01L33/00
CPC分类号： H01L31/035281 , H01L31/02327 , H01L31/03046 , H01L33/20 , H01S5/0201 , Y02E10/50 , Y10S977/949 , Y10S977/95
摘要： A single-photon generating device is configured to have a solid substrate including abase portion, and a pillar portion which is formed on the surface side of the base portion with a localized level existent in the vicinity of the tip of the base portion. The above pillar portion is formed to have a larger cross section on the base portion side than the cross section on the tip side, so that the light generated from the localized level is reflected on the surface, propagated inside the pillar portion, and output from the back face side of the base portion.
摘要翻译：单光子产生装置被配置为具有包括基部的固体基板，并且在基部的尖端附近存在形成有位于基部的表面侧的柱部。上述柱部形成为在基部侧的截面比前端侧的截面大的截面，使得从局部水平产生的光在表面上反射，在柱部内传播，并从基部的背面侧。

9. 发明授权

US07432153B2 Direct tunneling semiconductor memory device and fabrication process thereof 失效
标题翻译：直接隧道半导体存储器件及其制造工艺
公开(公告)号：US07432153B2
公开(公告)日：2008-10-07
申请号：US11898685
申请日：2007-09-14
申请人： Kouji Tsunoda , Tatsuya Usuki
发明人： Kouji Tsunoda , Tatsuya Usuki
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/42324 , H01L29/7883
摘要： A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.
摘要翻译：直接隧道半导体存储器件包括形成在半导体衬底上的器件隔离结构，包括器件隔离沟槽和填充器件隔离沟槽的器件隔离绝缘膜，覆盖两个侧壁表面的电介质膜和浮动栅极的顶表面形成在所述半导体基板上的电极，经由所述电介质膜设置在所述浮栅电极的侧壁面上的导电部，构成控制栅电极的一部分的导体部，以及形成在所述第一扩散区浮置栅电极，其中所述第一和第二扩散区形成在所述器件隔离槽的表面上，偏离所述浮置栅电极正下方的区域，所述导电部分形成在所述器件区域中，偏离所述器件隔离沟槽。

10. 发明申请

US20080057648A1 Direct tunneling semiconductor memory device and fabrication process thereof 失效
公开(公告)号：US20080057648A1
公开(公告)日：2008-03-06
申请号：US11898685
申请日：2007-09-14
申请人： Kouji Tsunoda , Tatsuya Usuki
发明人： Kouji Tsunoda , Tatsuya Usuki
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/42324 , H01L29/7883
摘要： A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

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