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1. 发明授权

US09772854B2 Selectively controlling instruction execution in transactional processing 有权
公开(公告)号：US09772854B2
公开(公告)日：2017-09-26
申请号：US13524898
申请日：2012-06-15
申请人： Dan F. Greiner , Christian Jacobi , Robert R. Rogers , Timothy J. Slegel
发明人： Dan F. Greiner , Christian Jacobi , Robert R. Rogers , Timothy J. Slegel
IPC分类号： G06F7/00 , G06F17/00 , G06F9/38 , G06F9/30 , G06F9/46
CPC分类号： G06F9/3861 , G06F9/3001 , G06F9/3004 , G06F9/30047 , G06F9/30076 , G06F9/30087 , G06F9/30098 , G06F9/30145 , G06F9/30181 , G06F9/3834 , G06F9/466
摘要： Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.

2. 发明申请

US20130185735A1 WARNING TRACK INTERRUPTION FACILITY 有权
公开(公告)号：US20130185735A1
公开(公告)日：2013-07-18
申请号：US13352509
申请日：2012-01-18
申请人： Mark S. Farrell , Charles W. Gainey, JR. , Jeffrey P. Kubala , James H. Mulder , Bernard Pierce , Robert R. Rogers , Donald W. Schmidt
发明人： Mark S. Farrell , Charles W. Gainey, JR. , Jeffrey P. Kubala , James H. Mulder , Bernard Pierce , Robert R. Rogers , Donald W. Schmidt
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F9/45533 , G06F9/45558 , G06F9/4881 , G06F9/4887 , G06F9/5038 , G06F9/54 , G06F9/542 , G06F13/24 , G06F2009/45579
摘要： A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup.

3. 发明授权

US08489867B2 Monitoring events and incrementing counters associated therewith absent taking an interrupt 有权
公开(公告)号：US08489867B2
公开(公告)日：2013-07-16
申请号：US13446733
申请日：2012-04-13
申请人： Dan Greiner , James H. Mulder , Robert R. Rogers , Robert W. Stjohn
发明人： Dan Greiner , James H. Mulder , Robert R. Rogers , Robert W. Stjohn
IPC分类号： G06F9/00
CPC分类号： G06F11/348 , G06F9/30076 , G06F2201/88
摘要： A monitoring facility that is operable in two modes allowing compatibility with prior existing monitoring facilities. In one mode, in response to encountering a monitored event, an interrupt is generated. In another mode, in response to encountering a monitored event, one or more associated counters are incremented without causing an interrupt.

4. 发明申请

US20130014123A1 DETERMINATION OF RUNNING STATUS OF LOGICAL PROCESSOR 有权
标题翻译：确定逻辑处理器的运行状态
公开(公告)号：US20130014123A1
公开(公告)日：2013-01-10
申请号：US13619400
申请日：2012-09-14
申请人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
发明人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
IPC分类号： G06F9/46
CPC分类号： G06F9/52 , G06F9/4843 , G06F9/5077
摘要： An embodiment provides for operating an information processing system. An aspect of the invention includes allocating an execution interval to a first logical processor of a plurality of logical processors of the information processing system. The execution interval is allocated for use by the first logical processor in executing instructions on a physical processor of the information processing system. The first logical processor determines that a resource required for execution by the first logical processor is locked by another one of the other logical processors. An instruction is issued by the first logical processor to determine whether a lock-holding logical processor is currently running. The lock-holding logical processor waits to release the lock if it is currently running. A command is issued by the first logical processor to a super-privileged process for relinquishing the allocated execution interval by the first logical processor if the locking holding processor is not running.
摘要翻译：实施例提供了操作信息处理系统。本发明的一个方面包括将执行间隔分配给信息处理系统的多个逻辑处理器的第一逻辑处理器。执行间隔被分配供第一逻辑处理器在信息处理系统的物理处理器上执行指令时使用。第一逻辑处理器确定由第一逻辑处理器执行所需的资源被另一个其他逻辑处理器锁定。由第一逻辑处理器发出指令以确定锁定保持逻辑处理器当前是否正在运行。锁定逻辑处理器等待释放锁定，如果它当前正在运行。如果锁定保持处理器不在运行，则由第一逻辑处理器发出命令到超级特权进程以放弃由第一逻辑处理器分配的执行间隔。

5. 发明授权

US08276151B2 Determination of running status of logical processor 有权
标题翻译：确定逻辑处理器的运行状态
公开(公告)号：US08276151B2
公开(公告)日：2012-09-25
申请号：US11470487
申请日：2006-09-06
申请人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
发明人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
IPC分类号： G06F9/46 , G06F13/00
CPC分类号： G06F9/52 , G06F9/4843 , G06F9/5077
摘要： A method is provided for a first logical processor to determine a running status of a target logical processor of an information processing system. In such method, an instruction is issued by the first logical processor running on the information processing system for determining whether the target logical processor is running. In response to issuing the instruction, a state descriptor belonging to the target logical processor is queried to determine whether the target logical processor is currently running. A result is then returned to the first logical processor, the result indicating whether or not the target logical processor is currently running.
摘要翻译：提供了一种用于第一逻辑处理器来确定信息处理系统的目标逻辑处理器的运行状态的方法。在这种方法中，在信息处理系统上运行的第一逻辑处理器发出用于确定目标逻辑处理器是否正在运行的指令。响应于发出指令，查询属于目标逻辑处理器的状态描述符，以确定目标逻辑处理器当前是否正在运行。然后将结果返回到第一逻辑处理器，结果指示目标逻辑处理器当前是否正在运行。

6. 发明申请

US20080071502A1 METHOD AND SYSTEM OF RECORDING TIME OF DAY CLOCK 审中-公开
标题翻译：时钟记录方法和系统
公开(公告)号：US20080071502A1
公开(公告)日：2008-03-20
申请号：US11532172
申请日：2006-09-15
申请人： Mark A. Check , Mark S. Farrell , Dan F. Greiner , James H. Mulder , Damian L. Osisek , Robert R. Rogers , Timothy J. Slegel , Ronald M. Smith , Peter G. Sutton
发明人： Mark A. Check , Mark S. Farrell , Dan F. Greiner , James H. Mulder , Damian L. Osisek , Robert R. Rogers , Timothy J. Slegel , Ronald M. Smith , Peter G. Sutton
IPC分类号： G06F17/40
CPC分类号： G06F9/30003
摘要： A method is provided for obtaining time-of-day (“TOD”) clock records on an information processing system. In accordance with such method, a first instruction is issued for recording a TOD clock value. In response to issuing the first instruction, a truncated version of a first current TOD clock value is obtained and recorded as a first TOD clock record, the first TOD clock value being a first current TOD clock value produced by a TOD clock running continuously on the information processing system. Thereafter, a second instruction is issued. In response to issuing the second instruction, a truncated version of a second current TOD clock value is obtained and recorded as a second TOD clock record, the second current TOD clock value being produced by the TOD clock, and the second TOD clock record being permitted to have the same value as the first TOD clock record.
摘要翻译：提供了一种用于在信息处理系统上获得时间（“TOD”）时钟记录的方法。根据这种方法，发出用于记录TOD时钟值的第一指令。响应于发出第一指令，获得第一当前TOD时钟值的截断版本并将其记录为第一TOD时钟记录，第一TOD时钟值是由TOD时钟上连续运行的TOD时钟产生的第一当前TOD时钟值信息处理系统。此后，发出第二条指令。响应于发出第二指令，获得第二当前TOD时钟值的截断版本并记录为第二TOD时钟记录，第二当前TOD时钟值由TOD时钟产生，并且第二TOD时钟记录被允许具有与第一个TOD时钟记录相同的值。

7. 发明授权

US08689230B2 Determination of running status of logical processor 有权
标题翻译：确定逻辑处理器的运行状态
公开(公告)号：US08689230B2
公开(公告)日：2014-04-01
申请号：US13619400
申请日：2012-09-14
申请人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
发明人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
IPC分类号： G06F9/46 , G06F13/00 , G06F11/00
CPC分类号： G06F9/52 , G06F9/4843 , G06F9/5077
摘要： An embodiment provides for operating an information processing system. An aspect of the invention includes allocating an execution interval to a first logical processor of a plurality of logical processors of the information processing system. The execution interval is allocated for use by the first logical processor in executing instructions on a physical processor of the information processing system. The first logical processor determines that a resource required for execution by the first logical processor is locked by another one of the other logical processors. An instruction is issued by the first logical processor to determine whether a lock-holding logical processor is currently running. The lock-holding logical processor waits to release the lock if it is currently running. A command is issued by the first logical processor to a super-privileged process for relinquishing the allocated execution interval by the first logical processor if the locking holding processor is not running.
摘要翻译：实施例提供了操作信息处理系统。本发明的一个方面包括将执行间隔分配给信息处理系统的多个逻辑处理器的第一逻辑处理器。执行间隔被分配供第一逻辑处理器在信息处理系统的物理处理器上执行指令时使用。第一逻辑处理器确定由第一逻辑处理器执行所需的资源被另一个其他逻辑处理器锁定。由第一逻辑处理器发出指令以确定锁定保持逻辑处理器当前是否正在运行。锁定逻辑处理器等待释放锁定，如果它当前正在运行。如果锁定保持处理器不在运行，则由第一逻辑处理器发出命令到超级特权进程以放弃由第一逻辑处理器分配的执行间隔。

8. 发明授权

US08572357B2 Monitoring events and incrementing counters associated therewith absent taking an interrupt 有权
标题翻译：监视事件并增加与之相关的计数器，而不采取中断
公开(公告)号：US08572357B2
公开(公告)日：2013-10-29
申请号：US12568748
申请日：2009-09-29
申请人： Dan Greiner , James H. Mulder , Robert R. Rogers , Robert W. StJohn
发明人： Dan Greiner , James H. Mulder , Robert R. Rogers , Robert W. StJohn
IPC分类号： G06F9/00
CPC分类号： G06F11/348 , G06F9/30076 , G06F2201/88
摘要： A monitoring facility that is operable in two modes allowing compatibility with prior existing monitoring facilities. In one mode, in response to encountering a monitored event, an interrupt is generated. In another mode, in response to encountering a monitored event, one or more associated counters are incremented without causing an interrupt.
摘要翻译：监控设施可在两种模式下操作，允许与现有的现有监控设施兼容。在一种模式中，响应于遇到监视事件，产生中断。在另一模式中，响应于遇到被监视的事件，一个或多个相关联的计数器递增而不引起中断。

9. 发明授权

US08276155B2 Method, system, and storage medium for managing computer processing functions 有权
公开(公告)号：US08276155B2
公开(公告)日：2012-09-25
申请号：US13010104
申请日：2011-01-20
申请人： Donald F. Ault , Jose R. Castano , Jeffrey P. Kubala , Robert J. Maddison , Bernard R. Pierce , Gary S. Puchkoff , Peter J. Relson , Robert R. Rogers , Donald W. Schmidt , Leslie W. Wyman
发明人： Donald F. Ault , Jose R. Castano , Jeffrey P. Kubala , Robert J. Maddison , Bernard R. Pierce , Gary S. Puchkoff , Peter J. Relson , Robert R. Rogers , Donald W. Schmidt , Leslie W. Wyman
IPC分类号： G06F9/46 , G06F9/455
CPC分类号： G06F9/5044 , G06F2209/503
摘要： Exemplary embodiments include a system and storage medium for managing computer processing functions in a multi-processor computer environment. The system includes a physical processor, a standard logical processor, an assist logical processor sharing a same logical partition as the standard logical processor, and a single operating system instance associated with the logical partition, the single operating system instance including a switch-to service and a switch-from service. The system also includes a dispatch component managed by the single operating system instance. Upon invoking the switch-to service by standard code, the switch-to service checks to see if an assist logical processor is online and, if so, it updates an integrated assist field of a work element block associated with the task for indicating the task is eligible to be executed on the assist logical processor. The switch-to service also assigns a work queue to the work element block.

10. 发明授权

US07650469B2 Determining whether a non-running processor has access to an address space 有权
标题翻译：确定不运行的处理器是否可以访问地址空间
公开(公告)号：US07650469B2
公开(公告)日：2010-01-19
申请号：US11470468
申请日：2006-09-06
申请人： Greg A. Dyck , Charles W. Gainey , Jeffrey P. Kubala , James H. Mulder , Damian L. Osisek , Robert R. Rogers , Mark A. Wisniewski , Leslie W. Wyman
发明人： Greg A. Dyck , Charles W. Gainey , Jeffrey P. Kubala , James H. Mulder , Damian L. Osisek , Robert R. Rogers , Mark A. Wisniewski , Leslie W. Wyman
IPC分类号： G06F13/00
CPC分类号： G06F9/45533 , G06F9/52
摘要： A method is provided for determining whether a logical processor of an information processing system has access to an address space of the information processing system. An instruction is issued by a first processor, the instruction referencing a target logical processor and a target address space. In response to the instruction, first information is checked to determine whether the target logical processor is running. When it is determined that the target logical processor is not running, second information is checked by a host program to determine whether the target logical processor has access to the target address space.
摘要翻译：提供了一种用于确定信息处理系统的逻辑处理器是否能够访问信息处理系统的地址空间的方法。指令由第一处理器发出，该指令引用目标逻辑处理器和目标地址空间。响应于该指令，检查第一信息以确定目标逻辑处理器是否正在运行。当确定目标逻辑处理器未运行时，主机程序检查第二信息，以确定目标逻辑处理器是否能够访问目标地址空间。

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