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1. 发明授权

US08479138B1 Global constraint optimization 有权
标题翻译：全局约束优化
公开(公告)号：US08479138B1
公开(公告)日：2013-07-02
申请号：US12567690
申请日：2009-09-25
申请人： Randall Scott Lawson , Richard Allen Woodward, Jr. , Brett Allen Neal , Ken Wadland
发明人： Randall Scott Lawson , Richard Allen Woodward, Jr. , Brett Allen Neal , Ken Wadland
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： Techniques that can improve the efficiency of routing where connections are subject to elongation constraints. The design can be optimized by estimating elongation needed to meet constraints after an initial routing solution has been generated, but before elongation is actually applied to detailed paths. Paths can be re-routed at this earlier stage if it is determined that too much elongation, or too much elongation in crowded areas, will need to be added after the detail routing stage.
摘要翻译：技术可以提高连接在延伸约束条件下的路由效率。可以通过估计在生成初始路由解决方案之后但在实际应用延伸到详细路径之前满足约束所需的伸长率来优化设计。如果确定在细节布线阶段之后需要添加太多的伸长率或拥挤区域的太多伸长率，则可以在该早期阶段重新路由路径。

2. 发明授权

US08789060B1 Deterministic, parallel execution with overlapping regions 失效
标题翻译：确定性，并行执行与重叠区域
公开(公告)号：US08789060B1
公开(公告)日：2014-07-22
申请号：US11965695
申请日：2007-12-27
申请人： Ken Wadland , Charles W. Grant , Randall Lawson , Richard Allen Woodward, Jr. , Sean Bergan
发明人： Ken Wadland , Charles W. Grant , Randall Lawson , Richard Allen Woodward, Jr. , Sean Bergan
IPC分类号： G06F9/46 , G06F13/00 , G06F9/45
CPC分类号： G06F9/52 , G06F2209/484
摘要： A method, computer program product and apparatus for utilizing simulated locking prior to starting concurrent execution are disclosed. The results of this simulated locking are used to define a canonical ordering which controls the order of execution and the degree of parallelism that can be used.
摘要翻译：公开了一种在开始并发执行之前利用模拟锁定的方法，计算机程序产品和装置。该模拟锁定的结果用于定义控制执行顺序和可以使用的并行程度的规范排序。

3. 发明授权

US08464196B1 Method and system for routing optimally between terminals through intermediate vias in a circuit design 有权
标题翻译：在电路设计中通过中间通孔在终端之间最佳路由的方法和系统
公开(公告)号：US08464196B1
公开(公告)日：2013-06-11
申请号：US13432904
申请日：2012-03-28
申请人： Randall Scott Lawson , Sean Bergan , Joseph Dexter Smedley , Paul S. Musto , Brett Allen Neal , Richard Allen Woodward, Jr. , Jelena Radumilo-Franklin , Frank Farmar , Gregory M. Horlick
发明人： Randall Scott Lawson , Sean Bergan , Joseph Dexter Smedley , Paul S. Musto , Brett Allen Neal , Richard Allen Woodward, Jr. , Jelena Radumilo-Franklin , Frank Farmar , Gregory M. Horlick
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A system and method are provided for establishing an automated routing environment in an electronic design automation (EDA) work flow for the routing of a circuit design. A user may merely specify a flow via pattern, a flow via location, and a start and end terminal and thereby, the auto router or path finder will automatically find the least-cost paths between each of the start terminals through at least one intermediate via of the flow via and ending at an end terminal. Upon successful routing of all needed terminals, an at least partially routed circuit design may be output.
摘要翻译：提供了一种用于在用于路由电路设计的电子设计自动化（EDA）工作流程中建立自动路由环境的系统和方法。用户可以仅通过模式，流经位置以及开始和结束终端来指定流，从而，自动路由器或路径寻找器将通过至少一个中间通道自动找到每个起始终端之间的最小成本路径的流动通道并在终端终止。在成功路由所有需要的终端之后，可以输出至少部分路由的电路设计。

4. 发明授权

US08510703B1 Method and mechanism for implementing PCB routing 有权
标题翻译：实现PCB路由的方法和机制
公开(公告)号：US08510703B1
公开(公告)日：2013-08-13
申请号：US11098039
申请日：2005-04-01
申请人： Ken Wadland , Richard Allen Woodward, Jr. , Randall Lawson , Alan G Strelzoff , David Tsai , Steve Russo
发明人： Ken Wadland , Richard Allen Woodward, Jr. , Randall Lawson , Alan G Strelzoff , David Tsai , Steve Russo
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A method and system for auto-routing wiring within a PCB. In some embodiment, a first broad region within a first layer and a counterpart first broad region within a second layer are defined. The counterpart regions define a first broad via location. In some embodiments, the first and second broad via locations of the first and second layers can then be subdivided into a plurality of triangular regions. The triangular regions on the first and second layers can then be compared to more accurately locate an appropriate via location.
摘要翻译：一种用于在PCB内自动布线布线的方法和系统。在一些实施例中，限定第一层内的第一宽区域和第二层内的对应第一宽区域。对应区域定义第一个广泛通道位置。在一些实施例中，第一和第二层的第一和第二宽通孔位置然后可以被细分成多个三角形区域。然后可以比较第一和第二层上的三角形区域以更准确地定位适当的通孔位置。

5. 发明授权

US07937681B2 Method and mechanism for implementing automated PCB routing 有权
标题翻译：实现自动PCB路由的方法和机制
公开(公告)号：US07937681B2
公开(公告)日：2011-05-03
申请号：US11115042
申请日：2005-04-25
申请人： Ken Wadland , Richard Allen Woodward, Jr. , Randall Lawson , Walter Katz , Wiley Gillmor
发明人： Ken Wadland , Richard Allen Woodward, Jr. , Randall Lawson , Walter Katz , Wiley Gillmor
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A method and system that converges on a global solution to a PCB routing problem using iterations of topology-based routing is described. In some embodiments, the geometric design space is abstracted into a topological graph representing the routing problem. Then, each net is allowed to find its optimal solution path independent of the solution paths for all other nets. The electrical and physical constraints of the system are initially ignored or greatly relaxed. Over each design iteration, the constraints are tightened until a complete, global, topological solution is found. Once a topological solution is found, it is converted into a geometric solution. In the event that no geometric solution exists for that topological solution, then the iteration process is resumed taking into consideration this additional information. The result is the ability to quickly autoroute highly-constrained PCB designs with minimal operator input.
摘要翻译：描述了使用迭代基于拓扑的路由收敛于PCB路由问题的全局解决方案和系统。在一些实施例中，将几何设计空间抽象为表示路由问题的拓扑图。然后，允许每个网络找到其与所有其他网络的解路径无关的最优解路径。系统的电气和物理限制最初被忽略或大大放宽。在每个设计迭代中，约束被收紧，直到找到完整的全局拓扑解决方案。一旦找到拓扑解决方案，就将其转换为几何解。在该拓扑解决方案不存在几何解的情况下，则会考虑到这些附加信息来恢复迭代过程。结果是能够以最小的操作员输入快速自动布线高度受限制的PCB设计。

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