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    • 7. 发明授权
    • Phase-locked loop with novel phase detection mechanism
    • 锁相环采用新型相位检测机构
    • US08350605B2
    • 2013-01-08
    • US12789453
    • 2010-05-27
    • Peng-Fei LinMing-Chi LinPo-Hao Yu
    • Peng-Fei LinMing-Chi LinPo-Hao Yu
    • H03L7/06
    • H03L7/091
    • A phase-locked loop (PLL) with novel phase detection mechanism is provided, including a phase frequency detector (PFD), a controller, a digital-to-analog (D2A) module, and a voltage-controlled oscillator/current-controlled oscillator (VCO/ICO), wherein PFD has a reference signal input and an input from the output signal of the VCO/ICO and is connected to the controller, the controller is then further connected to the D2A module, the D2A module converts the control signal from the controller into an analog voltage to control the frequency and phase of VCO/ICO. It is worth noting that the PFD of the present invention has a novel phase detection mechanism so that the phase detection can be accomplished by observing signal level transitions of the reference signal input and a delayed reference signal with respect to the output signal of the VCO/ICO without edge alignment. In addition, the novel phase detection mechanism also allows flexible reference signal input.
    • 提供了具有新型相位检测机构的锁相环(PLL),包括相位频率检测器(PFD),控制器,数模(D2A)模块和压控振荡器/电流控制振荡器 (VCO / ICO),其中PFD具有参考信号输入和来自VCO / ICO的输出信号的输入并连接到控制器,然后控制器进一步连接到D2A模块,D2A模块将控制信号 从控制器进入模拟电压来控制VCO / ICO的频率和相位。 值得注意的是,本发明的PFD具有新颖的相位检测机制,使得可以通过观察参考信号输入的信号电平转换和相对于VCO / VCO的输出信号的延迟参考信号来实现相位检测。 ICO无边缘对齐。 此外,新颖的相位检测机构还允许灵活的参考信号输入。