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    • 5. 发明授权
    • Multimedia graphics system
    • 多媒体图形系统
    • US5640332A
    • 1997-06-17
    • US648542
    • 1996-05-16
    • David C. BakerJonathan I. Siann
    • David C. BakerJonathan I. Siann
    • G06F12/00G09G5/00G09G5/06G09G5/36G09G5/377G09G5/39G09G5/395H04N1/00H04N5/44H04N9/00H04N21/236H04N21/2365H04N21/2368H04N21/434G11B27/031H04N5/00
    • G09G5/395G09G5/00G09G5/06G09G5/363H04N21/42653G09G2340/125G09G2352/00H04N5/44
    • Words of different types of digital information, including standard interframe video (SIF), graphics, television and audio are transferred preferably in packets between a controller, storage memory and shift registers (e.g. FIFO's) individually associated with the different information types. For a VRAM memory, information is transferred in parallel, controlled by tag bus information, from the controller to the memory and then serially to the FIFO's, all at a frequency higher than a clock frequency in a monitor raster scan. The tag bus information is decoded and introduced to an additional FIFO. A state machine processes such additional FIFO information and transfers the digital information to the different FIFO's at times controlled in each line by such additional FIFO--e.g. particular times in each line for the SIF and graphics and, thereafter, for television and audio, at times unrelated to any times in such line. The graphics transfer is timed to substantially fill, but not overflow, in such line the limited capacity of the associated FIFO. Their limited capacities cause the television and audio FIFO's to stop receiving words when filled to particular limits. For a DRAM memory, parallel information is transferred, dependent upon the tag bus information, between the controller, memory and FIFO's at the clock frequency. In a "Rambus" system, a bus common with the controller, memory and FIFO's provides control and timing words. Such words control information transfer in successive words through the common bus to the controller, memory and FIFO's upon such timing and control.
    • 不同类型的数字信息(包括标准帧间视频(SIF),图形,电视和音频)的字优选地以分组方式传送到控制器,存储存储器和与不同信息类型单独关联的移位寄存器(例如,FIFO)之间。 对于VRAM存储器,信息由标签总线信息并行传输,从控制器传输到存储器,然后以监视器光栅扫描中的时钟频率高于FIFO的速度。 标签总线信息被解码并被引入附加FIFO。 状态机处理这样的附加FIFO信息,并通过这样的附加FIFO将数字信息传送到在每一行控制的时间的不同FIFO。 SIF和图形的每一行的特定时间,以及之后的电视和音频,有时在任何时候都不相关。 图形传输的定时是基本上填充而不是溢出,在这样一行中相关联的FIFO的容量有限。 它们有限的容量会导致电视和音频FIFO在满足特定限制时停止接收字词。 对于DRAM存储器,根据标签总线信息,以时钟频率在控制器,存储器和FIFO之间传送并行信息。 在“Rambus”系统中,与控制器,存储器和FIFO共用的总线提供控制和定时字。 这样的字在这样的定时和控制下通过公共总线连续地控制信息传输到控制器,存储器和FIFO。
    • 6. 发明授权
    • System for, and method of displaying information from a graphics memory
and a video memory on a display monitor
    • 用于在显示监视器上从图形存储器和视频存储器显示信息的系统和方法
    • US5406306A
    • 1995-04-11
    • US14359
    • 1993-02-05
    • Jonathan I. SiannConrad M. CoffeyJeffrey L. Easley
    • Jonathan I. SiannConrad M. CoffeyJeffrey L. Easley
    • G06F3/14G06F3/048G06F3/153G09G5/00G09G5/02G09G5/14G09G5/395H04N5/272G09G1/14
    • H04N5/272G09G5/02G09G5/395G09G2340/12G09G2340/125
    • A display memory respectively stores, in first and second portions, digital graphics data for display in a video monitor and digital video data for display in a window in the monitor. The digital video data is transferred from the display memory to a shift register at a rate different from the pixel clock and from the shift register at a clock rate that may be lower than the pixel clock rate. The video data may be stored in a luminance and chrominance format and may be converted by a color space converter to 3 bytes representing the primary colors red, green and blue. The video pixels may then be interpolated to expand the number of video pixels. The shift register operation may be synchronized with such expansion so that data is not passed from the shift register until the expansion of previous data from the shift register has been completed. Video window logic provides for the passage of the graphics pixels through a digital multiplexer at the graphics clock rate at the monitor positions outside the window and the video pixels from the shift register through the colorspace converter and the interpolator at the monitor positions within the window. The graphics data may be delayed by a delay corresponding to that of the color space converter and the interpolator. The digital data passing through the multiplexer are latched at the graphics clock rate and are then converted to analog signals for display as a color image on the video monitor.
    • 显示存储器分别在第一和第二部分存储用于在视频监视器中显示的数字图形数据和用于在监视器中的窗口中显示的数字视频数据。 数字视频数据以与像素时钟速率不同的时钟速率从像素时钟和移位寄存器以不同于时钟速率的速率从显示存储器传送到移位寄存器。 视频数据可以以亮度和色度格式存储,并且可以由颜色空间转换器转换成表示原色红,绿和蓝的3字节。 然后可以内插视频像素以扩大视频像素的数量。 移位寄存器操作可以与这种扩展同步,使得数据不会从移位寄存器传递,直到来自移位寄存器的先前数据的扩展已经完成。 视频窗口逻辑提供图形像素通过数字多路复用器,其以窗口外的监视器位置处的图形时钟速率和来自移位寄存器的视频像素通过颜色空间转换器和窗口内的监视器位置处的内插器通过。 图形数据可以被延迟与颜色空间转换器和内插器的延迟相对应的延迟。 通过多路复用器的数字数据以图形时钟速率锁存,然后转换为模拟信号,以便在视频监视器上显示为彩色图像。
    • 7. 发明授权
    • Use of converging beams for transmitting electromagnetic energy to power devices for die testing
    • 使用会聚光束将电磁能传输到用于模具测试的功率器件
    • US06184696B2
    • 2001-02-06
    • US09046010
    • 1998-03-23
    • Stanley A. WhiteKenneth S. WalleyJames W. JohnstonP. Michael HendersonKelly H. HaleWarner B. Andrews, Jr.Jonathan I. Siann
    • Stanley A. WhiteKenneth S. WalleyJames W. JohnstonP. Michael HendersonKelly H. HaleWarner B. Andrews, Jr.Jonathan I. Siann
    • G01R31302
    • G01R31/303G01R31/3025G01R31/307G01R31/311G01R31/315
    • The described method and apparatus wirelessly test individual integrated circuit die on a wafer containing multiple die. The method incorporates activating a selected die on the wafer by wirelessly impacting the die with at least two beams of electromagnetic radiation so that the die receives radiation energy having at least a first energy level, thereby activating the die by causing a current to flow in the die. Each beam of electromagnetic energy individually has less than the first energy level required to activate the die. The beams of electromagnetic energy are directed so that they at least partially overlap on the selected die. In the region of overlap, the two beams together impact the die with an energy level at least equal to the first energy level required to activate the die. The method may additionally include detecting electromagnetic radiation emitted by the die in response to the electromagnetic energy received from the beams of electromagnetic energy. The apparatus includes an integrated circuit wafer and test apparatus. The integrated circuit wafer contains a plurality of individual die. Each die can be activated by directing electromagnetic energy having at least a first energy level onto that die. The test apparatus includes first and second sources of electromagnetic energy. Each source directs to a selected die on the wafer a beam of electromagnetic energy having an energy level less than the first energy level. The beams at least partially overlap on the selected die so that together they couple to the die energy of at least the first energy level.
    • 所描述的方法和装置在包含多个管芯的晶片上无线地测试单个集成电路管芯。 该方法包括通过用至少两束电磁辐射无线地冲击裸片来激活晶片上的选定管芯,使得管芯接收具有至少第一能级的辐射能,从而通过使电流在 死。 每束电磁能量单独地具有小于激活模具所需的第一能级。 电磁能束被引导使得它们在所选择的模具上至少部分重叠。 在重叠的区域中,两个光束一起以至少等于激活模具所需的第一能量水平的能量水平冲击模具。 该方法可以另外包括响应于从电磁能束接收的电磁能量来检测由管芯发射的电磁辐射。 该装置包括集成电路晶片和测试装置。 集成电路晶片包含多个独立的管芯。 可以通过将具有至少第一能级的电磁能引导到该管芯上来激活每个管芯。 测试装置包括第一和第二电磁源。 每个源向晶片上的选定的管芯提供具有小于第一能级的能级的电磁能束。 梁在所选择的模具上至少部分地重叠,使得它们一起耦合到至少第一能级的管芯能量。