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    • 1. 发明授权
    • Scan driver, display device having the same and method of driving a display device
    • 扫描驱动器,具有相同的显示装置和驱动显示装置的方法
    • US08305324B2
    • 2012-11-06
    • US11488363
    • 2006-07-18
    • Sung-Man KimBong-Jun LeeShin-Tack KangHyeong-Jun ParkYong-Woo Lee
    • Sung-Man KimBong-Jun LeeShin-Tack KangHyeong-Jun ParkYong-Woo Lee
    • G01R31/28
    • G09G3/3677G09G3/3614G09G2310/0248G11C19/184
    • A scan driver drives a display device having a plurality of gate lines transferring scan signals, and a plurality of source lines transferring data signals. The scan driver includes a shift register and a multiple signal applying unit. The shift register includes a plurality of cascade-connected stages, each stage having an output terminal electrically connected to a respective one of the plurality of gate lines. The multiple signal applying unit applies a sub scan signal and a main scan signal. The sub scan signal and the main scan signal sequentially activate each of the plurality of gate lines. Therefore, the scan lines receive the scan signal twice, so that the liquid crystal capacitors electrically connected to the gate lines receive the data voltage twice. As a result, even though the time for charging the liquid crystal capacitors may be reduced, the liquid crystal capacitors may be fully charged to enhance display quality.
    • 扫描驱动器驱动具有传送扫描信号的多条栅极线的显示装置和传送数据信号的多条源极线。 扫描驱动器包括移位寄存器和多信号施加单元。 移位寄存器包括多个级联连接的级,每级具有电连接到多条栅极线中的相应一条栅线的输出端。 多信号施加单元施加副扫描信号和主扫描信号。 子扫描信号和主扫描信号顺序地激活多条栅极线中的每一条。 因此,扫描线接收扫描信号两次,使得电连接到栅极线的液晶电容器接收数据电压两次。 结果,即使可以减少液晶电容器的充电时间,液晶电容器也可能被充满电以提高显示质量。
    • 5. 发明申请
    • DECODING APPARATUS AND METHOD USING ORTHOGONAL SPACE-TIME BLOCK CODES ROBUST TIMING ERRORS
    • 解码装置和使用正交空间时间块编码的方法鲁棒时序错误
    • US20100278277A1
    • 2010-11-04
    • US12547035
    • 2009-08-25
    • Gi Yoon PARKOk-Sun PARKDae Soon CHOHyeong Jun PARK
    • Gi Yoon PARKOk-Sun PARKDae Soon CHOHyeong Jun PARK
    • H04L1/02
    • H04L27/2647H04L1/0631H04L1/0643H04L1/0668
    • Provided is a decoding apparatus and method using orthogonal space-time block codes (OSTBCs) robust against timing errors. The decoding apparatus may include: a cyclic prefix removal unit to receive a signal, and to remove a cyclic prefix in the signal; an inverse discrete Fourier transform (IDFT) unit to apply an IDFT to the signal with the removed cyclic prefix; a guard band removal unit to remove a guard band in the inverse discrete Fourier transformed signal, and to generate a complex matrix; a channel estimation unit to transmit a carrier corresponding to the complex matrix and channel status information associated with transmit and receive antennas; and a decoder to calculate a channel status vector with respect to a complex symbol included in the complex matrix, using the channel status information, and to calculate an inner product between the channel status vector and the complex matrix, to restore the complex symbol.
    • 提供了一种使用对定时误差鲁棒的正交空时块码(OSTBC)的解码装置和方法。 解码装置可以包括:循环前缀去除单元,用于接收信号,并去除信号中的循环前缀; 反向离散付里叶变换(IDFT)单元,用于将IDFT应用于具有去除的循环前缀的信号; 保护带去除单元,用于去除离散付里叶逆变换信号的保护带,并产生复数矩阵; 信道估计单元,用于发送对应于复数矩阵的载波和与发射和接收天线相关联的信道状态信息; 以及解码器,使用信道状态信息来计算相对于复数矩阵中包括的复数符号的信道状态向量,并计算信道状态向量和复矩阵之间的内积,以恢复复数符号。
    • 9. 发明申请
    • LIQUID CRYSTAL DISPLAY
    • 液晶显示器
    • US20070165146A1
    • 2007-07-19
    • US11567460
    • 2006-12-06
    • Hyeong-Jun ParkChung-Hun HaHyang-Shik Kong
    • Hyeong-Jun ParkChung-Hun HaHyang-Shik Kong
    • G02F1/1343G02F1/136
    • G02F1/136286G02F2001/13606
    • A liquid crystal display includes a gate line (formed on an insulating substrate) including a gate electrode, a gate insulation layer formed on the gate line, a semiconductor layer formed on the gate insulation layer., and a data line and a drain electrode formed on the semiconductor layer (stripe). A borderline (side edge) of the semiconductor layer (stripe) is positioned at the outside of a borderline (side edge) of the data line. In this way, by minimizing the overlap of the data line and the pixel electrode (so that a width of the data line is smaller than that of the semiconductor layer (stripe), parasitic capacitance is reduced, so that vertical line blur can be prevented.
    • 液晶显示器包括:栅极线(形成在绝缘基板上),栅极电极,形成在栅极线上的栅极绝缘层,形成在栅极绝缘层上的半导体层,以及形成的数据线和漏电极 在半导体层(条纹)上。 半导体层(条纹)的边界(侧边)位于数据线的边界(侧边)的外侧。 以这种方式,通过最小化数据线和像素电极的重叠(使得数据线的宽度小于半导体层的宽度(条纹),寄生电容减小,从而可以防止垂直线模糊 。
    • 10. 发明申请
    • Apparatus and method for cancellation of partially overlapped crosstalk signals
    • 用于消除部分重叠的串扰信号的装置和方法
    • US20070133815A1
    • 2007-06-14
    • US11604898
    • 2006-11-28
    • Min-Ho CheongHyeong-Jun ParkYong-Hwan Lee
    • Min-Ho CheongHyeong-Jun ParkYong-Hwan Lee
    • A61F11/06
    • H04B1/0475
    • The present invention is related to a partially overlapped single-carrier crosstalk signal cancellation method and an apparatus using the same. For this purpose, the present invention provides a crosstalk canceller including a pre-processor for frequency down-shifting an input signal, a crosstalk signal cancellation module for canceling the crosstalk signal by dividing the input signal by an interpolation ratio, a post-processor for converting an output of the crosstalk signal cancellation modulation into a passband signal, and an error feedback processor for performing a decimation operation on a residual crosstalk signal and feeding backing the decimated residual crosstalk signal to the crosstalk signal cancellation module. In addition, the present invention provides a crosstalk signal cancellation method for performing interpolation and filtering operations by frequency down-shifting an input signal including a crosstalk signal to a baseband and decimating a residual crosstalk signal by frequency-shifting to an original signal frequency. According to the present invention, implementation complexity of the crosstalk signal canceller can be reduced and the crosstalk signal cancellation process can be preformed at a low speed by using the interpolation filter and the decimation filter, thereby achieving reduction of computational complexity.
    • 本发明涉及部分重叠的单载波串扰信号消除方法及其使用方法。 为此目的,本发明提供了一种串扰消除器,包括用于降频输入信号的预处理器,用于通过将输入信号除以插值比来消除串扰信号的串扰信号消除模块,后处理器 将串扰信号消除调制的输出转换为通带信号,以及误差反馈处理器,用于对残留串扰信号执行抽取操作,并将抽取的残留串扰信号馈送到串扰信号消除模块。 此外,本发明提供了一种串扰信号消除方法,用于通过将包括串扰信号的输入信号降频到基带并通过频移到原始信号频率来抽取残留串扰信号来执行插值和滤波操作。 根据本发明,可以减少串扰信号消除器的实现复杂度,并且可以通过使用内插滤波器和抽取滤波器以低速执行串扰信号消除处理,从而实现计算复杂度的降低。