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1. 发明授权

US06172363B2 Method and apparatus for inspecting integrated circuit pattern 失效
公开(公告)号：US06172363B2
公开(公告)日：2001-01-09
申请号：US08811511
申请日：1997-03-04
申请人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
发明人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
IPC分类号： H01J37244
CPC分类号： G01R31/305 , G01R31/307 , H01J37/28 , H01J2237/2817
摘要： A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.

2. 发明授权

US07952074B2 Method and apparatus for inspecting integrated circuit pattern 有权
标题翻译：检查集成电路图案的方法和装置
公开(公告)号：US07952074B2
公开(公告)日：2011-05-31
申请号：US12190388
申请日：2008-08-12
申请人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
发明人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
IPC分类号： G01N23/22
CPC分类号： G01R31/305 , G01R31/307 , H01J37/28 , H01J2237/2817
摘要： A circuit pattern inspection method and an apparatus therefore, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined changed state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
摘要翻译：因此，电路图案检查方法和其中待检查的样品的待检查部分的整体被制成处于预定的改变状态的装置，被检查部分被成像高分辨率照射，在扫描电子束时，在从电子束照射的时刻起经过规定的时间后，在照射电子束的部分检测到二次带电粒子，根据这样检测的次级通过使用如此形成的图像来检查带电粒子信号，并检查待检查的部分。

3. 发明授权

US5001409A Surface metrological apparatus 失效
标题翻译：表面计量仪器
公开(公告)号：US5001409A
公开(公告)日：1991-03-19
申请号：US368304
申请日：1989-06-07
申请人： Sumio Hosaka , Shigeyuki Hosoki , Keiji Takata , Masatoshi Ohtake , Hiroshi Tooyama , Hitoshi Kondou
发明人： Sumio Hosaka , Shigeyuki Hosoki , Keiji Takata , Masatoshi Ohtake , Hiroshi Tooyama , Hitoshi Kondou
IPC分类号： G01B7/34 , G01Q60/00 , G11B9/00 , G11B11/00
CPC分类号： G01Q10/02 , B82Y10/00 , B82Y35/00 , G01Q10/04 , G01Q10/06 , G01Q30/06 , G01Q60/16 , G11B11/005 , G11B11/007 , G11B9/1436 , Y10S977/852
摘要： In an apparatus for measuring texture and characterization of the surface of a sample on the basis of the drive signal of a servo control circuit by allowing a probe-tip (1) to approach the sample (2) and subjecting the probe-tip (1) to servo control so that a current, which is generated by moving the probe-tip (1) on the sample surface and which flows between the probe-tip (1) and the sample (2), becomes constant, the present invention discloses a surface metrological apparatus comprising a circuit (11, 12) for correcting the texture and characterization of the sample by use of a current error of the measured value of the current described above from the set current value.
摘要翻译： PCT No.PCT / JP88 / 00967 Sec。 371日期1989年6月7日第 102（e）日期1989年6月7日PCT提交1988年9月22日PCT公布。第WO89 / 03510号公报日期：1989年4月20日。在根据伺服控制电路的驱动信号通过使探针尖端（1）接近样品（2）和/或使探针尖端（1）进行伺服控制，使得通过在探针尖端（1）和样品（2）之间流动的样品表面上移动探针尖端（1）而产生的电流，本发明公开了一种表面计量装置，其包括用于通过使用上述电流的测量值从设定电流值的电流误差来校正样品的纹理和表征的电路（11,12）。

4. 发明授权

US07408760B2 Charged particle beam application system 有权
标题翻译：带电粒子束应用系统
公开(公告)号：US07408760B2
公开(公告)日：2008-08-05
申请号：US11221815
申请日：2005-09-09
申请人： Sayaka Tanimoto , Yasunari Soda , Masakazu Sugaya , Hiroshi Tooyama , Takeshi Tsutsumi , Yasuhiro Someda
发明人： Sayaka Tanimoto , Yasunari Soda , Masakazu Sugaya , Hiroshi Tooyama , Takeshi Tsutsumi , Yasuhiro Someda
IPC分类号： H01L21/683
CPC分类号： G03F7/2059 , H01J2237/0044 , H01J2237/3175 , H01L21/6833
摘要： During the writing operation, the wafer potential is dynamically detected and corrected. By doing so, the positional accuracy of the circuit patterns written on a wafer can be improved. After a contact resistance between a wafer and a earth pin is measured, the current flowing from the wafer to the ground potential via the earth pin is measured. Then, based on the measurement result, the potential difference is given between the wafer and the ground potential.
摘要翻译：在写入操作期间，动态地检测和校正晶片电位。通过这样做，能够提高写入晶片的电路图案的位置精度。在测量晶片和接地引脚之间的接触电阻之后，测量通过接地引脚从晶片流到接地电位的电流。然后，基于测量结果，在晶片和地电位之间给出电位差。

5. 发明授权

US5369396A Apparatus for detecting a level of liquid 失效
标题翻译：用于检测液体水平的装置
公开(公告)号：US5369396A
公开(公告)日：1994-11-29
申请号：US58590
申请日：1993-05-07
申请人： Nobuo Kurata , Hiroshi Tooyama
发明人： Nobuo Kurata , Hiroshi Tooyama
IPC分类号： F01M11/12 , G01F23/00 , G01F23/74 , H01H36/02 , G08B21/00
CPC分类号： F01M11/12 , G01F23/0092 , G01F23/74 , H01H36/02 , F16N2250/08 , F16N2260/04
摘要： An apparatus for detecting a liquid level includes a warning device for warning a low liquid level, and a regulator for controlling power supply to the warning device from a power source. The regulator comprises a switch for switching its condition in accordance with the liquid level. The ON condition of the switch indicates that the present liquid level is lower than a predetermined liquid level. The regulator further comprises a thermistor connected to the switch in series. The thermistor has a characteristic of decreasing the resistance value thereof, when a predetermined delay period of time as a function of atmospheric temperature has elapsed since the start of applying the voltage on the thermistor, synchronizing with turning the switch on. The low resistance value of the thermistor allows the power for activating the warning device to be supplied to its device, while the switch is turned on.
摘要翻译：用于检测液位的装置包括用于警告低液位的警告装置和用于从电源控制对警告装置的电力供应的调节器。调节器包括用于根据液位切换其状态的开关。开关的ON状态表示本液位低于规定液面。调节器还包括串联连接到开关的热敏电阻。热敏电阻具有降低其电阻值的特性，当从开始施加电压到热敏电阻上开始经过了作为大气温度的函数的预定延迟时间段时，与打开开关同步。当开关打开时，热敏电阻的低电阻值允许启动报警装置的电源供应到其装置。

6. 发明授权

US4541082A Device for optically tracking information 失效
标题翻译：用于光学跟踪信息的设备
公开(公告)号：US4541082A
公开(公告)日：1985-09-10
申请号：US443033
申请日：1982-11-19
申请人： Tatsuo Horikoshi , Seiji Yonezawa , Toshiaki Tsuyoshi , Hiroshi Tooyama , Masatoshi Otake
发明人： Tatsuo Horikoshi , Seiji Yonezawa , Toshiaki Tsuyoshi , Hiroshi Tooyama , Masatoshi Otake
IPC分类号： G11B7/09 , G11B7/12 , G11B21/10
CPC分类号： G11B7/0901
摘要： A device for optically tracking information recorded on an optical disc wherein a photodetector is disposed on the optical axis of an optical system for guiding diffracted waves to the photodetector. The origin of a fictitious X-Y coordinate system at the photodetector is placed on the above-mentioned optical axis, X- and Y-axes of the coordinate system are made parallel to and perpendicular to an information track having the information pits on the rotating recording medium, and the photodetector is divided into four equal parts. A first summation signal indicating the sum of output signals from the four parts of the photodetector is converted into a binary signal, and a difference signal between second summation signals each indicating the sum of output signals from a pair of photodetector parts facing each other with the origin of the coordinate system therebetween is converted into another binary signal. A signal indicating a direction in which the light beam deviates from the information track, is formed on the basis of the above-mentioned binary signals, and a tracking signal indicating the deviation of the light beam from the information track is formed by full-wave rectifying the difference signal and modifying the rectified signal with the above-mentioned direction indicating signal.
摘要翻译：一种用于光学跟踪记录在光盘上的信息的装置，其中光电检测器设置在用于将衍射波引导到光电检测器的光学系统的光轴上。将光电检测器上的虚拟XY坐标系的原点置于上述光轴上，坐标系的X轴和Y轴平行于和垂直于在旋转记录介质上具有信息凹坑的信息轨道，并且光电检测器被分成四等份。指示来自光电检测器的四个部分的输出信号之和的第一求和信号被转换为二进制信号，以及第二求和信号之间的差分信号，每个信号表示来自一对彼此面对的光检测器部分的输出信号之和，其间的坐标系的原点被转换为另一个二进制信号。基于上述二进制信号形成指示光束偏离信息轨道的方向的信号，并且指示光束与信息轨道的偏离的跟踪信号由全波形成整流差分信号，并用上述方向指示信号修正整流信号。

7. 发明申请

US20080302964A1 METHOD AND APPARATUS FOR INSPECTING INTEGRATED CIRCUIT PATTERN 有权
标题翻译：用于检查集成电路图案的方法和装置
公开(公告)号：US20080302964A1
公开(公告)日：2008-12-11
申请号：US12190388
申请日：2008-08-12
申请人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
发明人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
IPC分类号： G01N23/00 , G01R31/305
CPC分类号： G01R31/305 , G01R31/307 , H01J37/28 , H01J2237/2817
摘要： A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined changed state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
摘要翻译：电路图案检查方法及其装置，其中待检查的样品的待检查部分的整体部分处于预定的改变状态，被检查的部分用成像高分辨率照射，在扫描电子束时，在从电子束照射的时刻起经过规定的时间后，在照射电子束的部分检测到二次带电粒子，根据这样检测的次级通过使用如此形成的图像来检查带电粒子信号，并检查待检查的部分。

8. 发明申请

US20060056131A1 Charged particle beam application system 有权
标题翻译：带电粒子束应用系统
公开(公告)号：US20060056131A1
公开(公告)日：2006-03-16
申请号：US11221815
申请日：2005-09-09
申请人： Sayaka Tanimoto , Yasunari Soda , Masakazu Sugaya , Hiroshi Tooyama , Takeshi Tsutsumi , Yasuhiro Someda
发明人： Sayaka Tanimoto , Yasunari Soda , Masakazu Sugaya , Hiroshi Tooyama , Takeshi Tsutsumi , Yasuhiro Someda
IPC分类号： H01T23/00
CPC分类号： G03F7/2059 , H01J2237/0044 , H01J2237/3175 , H01L21/6833
摘要： During the writing operation, the wafer potential is dynamically detected and corrected. By doing so, the positional accuracy of the circuit patterns written on a wafer can be improved. After a contact resistance between a wafer and a earth pin is measured, the current flowing from the wafer to the ground potential via the earth pin is measured. Then, based on the measurement result, the potential difference is given between the wafer and the ground potential.
摘要翻译：在写入操作期间，动态地检测和校正晶片电位。通过这样做，能够提高写入晶片的电路图案的位置精度。在测量晶片和接地引脚之间的接触电阻之后，测量通过接地引脚从晶片流到接地电位的电流。然后，基于测量结果，在晶片和地电位之间给出电位差。

9. 发明授权

US07417444B2 Method and apparatus for inspecting integrated circuit pattern 失效
标题翻译：检查集成电路图案的方法和装置
公开(公告)号：US07417444B2
公开(公告)日：2008-08-26
申请号：US11269617
申请日：2005-11-09
申请人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
发明人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
IPC分类号： G01R31/305 , H01J37/28
CPC分类号： G01R31/305 , G01R31/307 , H01J37/28 , H01J2237/2817
摘要： A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
摘要翻译：一种电路图案检查方法及其装置，其中待检查样品的待检查部分的整个部分被制成处于预定的充电状态，被检查的部分用图像形成高分辨率照射，在扫描电子束时，在从电子束照射的时刻起经过规定的时间后，在照射电子束的部分检测到二次带电粒子，根据这样检测的次级通过使用如此形成的图像来检查带电粒子信号，并检查待检查的部分。

10. 发明授权

US07026830B2 Method and apparatus for inspecting integrated circuit pattern 失效
标题翻译：检查集成电路图案的方法和装置
公开(公告)号：US07026830B2
公开(公告)日：2006-04-11
申请号：US10379555
申请日：2003-03-06
申请人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
发明人： Hiroyuki Shinada , Mari Nozoe , Haruo Yoda , Kimiaki Ando , Katsuhiro Kuroda , Yutaka Kaneko , Maki Tanaka , Shunji Maeda , Hitoshi Kubota , Aritoshi Sugimoto , Katsuya Sugiyama , Atsuko Takafuji , Yusuke Yajima , Hiroshi Tooyama , Tadao Ino , Takashi Hiroi , Kazushi Yoshimura , Yasutsugu Usami
IPC分类号： G01R31/305 , G01R31/28
CPC分类号： G01R31/305 , G01R31/307 , H01J37/28 , H01J2237/2817
摘要： To make possible the in-line inspection of a pattern of an insulating material.A patterned wafer 40 formed with a pattern by a resist film is placed on a specimen table 21 of a patterned wafer inspection apparatus 1 in opposed relation to a SEM 3. An electron beam 10 of a large current is emitted from an electron gun 11 and the pattern of the patterned wafer is scanned only once at a high scanning rate. The secondary electrons generated by this scanning from the patterned wafer are detected by a secondary electron detector 16 thereby to acquire an electron beam image. Using this electron beam image, the comparative inspection is conducted on the patterned wafer through an arithmetic operation unit 32 and a defect determining unit 33. Since an electron beam image of high contrast can be obtained by scanning an electron beam only once, a patterned wafer inspection method using a SEM can be implemented in the IC fabrication method.
摘要翻译：使绝缘材料的图案能够在线检查。通过抗蚀剂膜形成图案的图案化晶片40与SEM 3相对地放置在图案化晶片检查装置1的样本台21上。从电子枪11发射大电流的电子束10，以高扫描速度扫描图案化晶片的图案一次。通过二次电子检测器16检测来自图案化晶片的该扫描产生的二次电子，从而获得电子束图像。使用该电子束图像，通过算术运算单元32和缺陷判定单元33对图案化晶片进行比较检查。由于可以通过仅扫描电子束一次来获得高对比度的电子束图像，因此图案化晶片使用SEM的检查方法可以在IC制造方法中实现。

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