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1. 发明申请

US20080057740A1 DOPANT ACTIVATION IN DOPED SEMICONDUCTOR SUBSTRATES 失效
标题翻译：掺杂半导体衬底中的掺杂活性
公开(公告)号：US20080057740A1
公开(公告)日：2008-03-06
申请号：US11844810
申请日：2007-08-24
申请人： Jeffrey Munro , Srinivas Nemani , Young Lee , Marlon Menezes , Christopher Bencher , Vijay Parihar
发明人： Jeffrey Munro , Srinivas Nemani , Young Lee , Marlon Menezes , Christopher Bencher , Vijay Parihar
IPC分类号： H01L21/00
CPC分类号： H01L21/268 , H01L21/26513
摘要： Methods are disclosed for activating dopants in a doped semiconductor substrate. A carbon precursor is flowed into a substrate processing chamber within which the doped semiconductor substrate is disposed. A plasma is formed from the carbon precursor in the substrate processing chamber. A carbon film is deposited over the substrate with the plasma. A temperature of the substrate is maintained while depositing the carbon film less than 500° C. The deposited carbon film is exposed to electromagnetic radiation for a period less than 10 ms, and has an extinction coefficient greater than 0.3 at a wavelength comprised by the electromagnetic radiation.
摘要翻译：公开了用于激活掺杂半导体衬底中的掺杂剂的方法。碳前体流入其中设置掺杂半导体衬底的衬底处理室。在基板处理室中由碳前体形成等离子体。用等离子体沉积在衬底上的碳膜。在沉积低于500℃的碳膜的同时保持基板的温度。沉积的碳膜暴露于电磁辐射小于10ms的时间段，并且在电磁波包括的波长处具有大于0.3的消光系数辐射。

2. 发明申请

US20070054500A1 Removable amorphous carbon cmp stop 失效
标题翻译：可拆卸非晶碳cmp停止
公开(公告)号：US20070054500A1
公开(公告)日：2007-03-08
申请号：US11594626
申请日：2006-11-08
申请人： Christopher Bencher
发明人： Christopher Bencher
IPC分类号： H01L21/31
CPC分类号： H01L21/76826 , H01L21/02115 , H01L21/02126 , H01L21/022 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/3105 , H01L21/31122 , H01L21/31144 , H01L21/3146 , H01L21/31633 , H01L21/3212 , H01L21/7681 , H01L21/76828 , H01L21/76829 , H01L21/7684
摘要： A method is provided for processing a substrate including removing amorphous carbon material disposed on a low k dielectric material with minimal or reduced defect formation and minimal dielectric constant change of the low k dielectric material. In one aspect, the invention provides a method for processing a substrate including depositing at least one dielectric layer on a substrate surface, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less, forming amorphous carbon material on the at least one dielectric layer, and removing the one or more amorphous carbon layers by exposing the one or more amorphous carbon layers to a plasma of a hydrogen-containing gas.
摘要翻译：提供了一种用于处理衬底的方法，包括去除设置在低k电介质材料上的无定形碳材料，具有最小或减少的缺陷形成和低k电介质材料的最小介电常数变化。在一个方面，本发明提供了一种处理衬底的方法，包括在衬底表面上沉积至少一个电介质层，其中介电层包括硅，氧和碳，并且具有约3或更小的介电常数，形成无定形碳在所述至少一个电介质层上的材料，以及通过将所述一个或多个非晶碳层暴露于含氢气体的等离子体来去除所述一个或多个非晶碳层。

3. 发明申请

US20050181623A1 SILICON CARBIDE DEPOSITION FOR USE AS A LOW DIELECTRIC CONSTANT ANTI-REFLECTIVE COATING 失效
标题翻译：用作低介电常数抗反射涂层的碳化硅沉积
公开(公告)号：US20050181623A1
公开(公告)日：2005-08-18
申请号：US10684079
申请日：2003-10-09
申请人： Christopher Bencher , Joe Feng , Mei-Yee Shek , Chris Ngai , Judy Huang
发明人： Christopher Bencher , Joe Feng , Mei-Yee Shek , Chris Ngai , Judy Huang
IPC分类号： C23C16/32 , C30B25/10 , H01L21/027 , H01L21/04 , H01L21/205 , H01L21/314 , H01L21/768 , H01L23/532 , H01L21/31 , H01L21/469
CPC分类号： H01L21/0276 , C23C16/325 , C30B25/105 , C30B29/36 , H01L21/02378 , H01L21/02447 , H01L21/02529 , H01L21/0262 , H01L21/0445 , H01L21/314 , H01L21/76801 , H01L21/76807 , H01L21/76829 , H01L21/76834 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , Y10S438/931 , Y10S438/952 , H01L2924/00
摘要： The present invention generally provides a process for depositing silicon carbide using a silane-based material with certain process parameters that is useful for forming a suitable ARC for IC applications. Under certain process parameters, a fixed thickness of the silicon carbide may be used on a variety of thicknesses of underlying layers. The thickness of the silicon carbide ARC is substantially independent of the thickness of the underlying layer for a given reflectivity, in contrast to the typical need for adjustments in the ARC thickness for each underlying layer thickness to obtain a given reflectivity. Another aspect of the invention includes a substrate having a silicon carbide anti-reflective coating, comprising a dielectric layer deposited on the substrate and a silicon carbide anti-reflective coating having a dielectric constant of less than about 7.0 and preferably about 6.0 or less.
摘要翻译：本发明通常提供一种使用具有某些工艺参数的硅烷基材料沉积碳化硅的方法，其可用于形成用于IC应用的合适的ARC。在某些工艺参数下，碳化硅的固定厚度可用于各种厚度的下层。对于给定的反射率，碳化硅ARC的厚度基本上与下层的厚度无关，相比之下，为了获得给定的反射率，每个下层厚度的ARC厚度的调整的典型需要。本发明的另一方面包括具有碳化硅抗反射涂层的基底，其包括沉积在基底上的电介质层和介电常数小于约7.0，优选约6.0或更小的碳化硅抗反射涂层。

4. 发明授权

US06635583B2 Silicon carbide deposition for use as a low-dielectric constant anti-reflective coating 有权
标题翻译：碳化硅沉积用作低介电常数抗反射涂层
公开(公告)号：US06635583B2
公开(公告)日：2003-10-21
申请号：US09219945
申请日：1998-12-23
申请人： Christopher Bencher , Joe Feng , Mei-Yee Shek , Chris Ngai , Judy Huang
发明人： Christopher Bencher , Joe Feng , Mei-Yee Shek , Chris Ngai , Judy Huang
IPC分类号： H01L21302
CPC分类号： H01L21/0276 , C23C16/325 , C30B25/105 , C30B29/36 , H01L21/02378 , H01L21/02447 , H01L21/02529 , H01L21/0262 , H01L21/0445 , H01L21/314 , H01L21/76801 , H01L21/76807 , H01L21/76829 , H01L21/76834 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , Y10S438/931 , Y10S438/952 , H01L2924/00
摘要： The present invention generally provides a process for depositing silicon carbide using a silane-based material with certain process parameters that is useful for forming a suitable ARC for IC applications. The same material may also be used as a barrier layer and an etch stop, even in complex damascene structures and with high diffusion conductors such as copper as a conductive material. Under certain process parameters, a fixed thickness of the silicon carbide may be used on a variety of thicknesses of underlying layers. The thickness of the silicon carbide ARC is substantially independent of the thickness of the underlying layer for a given reflectivity, in contrast to the typical need for adjustments in the ARC thickness for each underlying layer thickness to obtain a given reflectivity. A preferred process sequence for forming a silicon carbide anti-reflective coating on a substrate, comprises introducing silicon, carbon, and a noble gas into a reaction zone of a process chamber, initiating a plasma in the reaction zone, reacting the silicon and the carbon in the presence of the plasma to form silicon carbide, and depositing a silicon carbide anti-reflective coating on a substrate in the chamber. Another aspect of the invention includes a substrate having a silicon carbide anti-reflective coating, comprising a dielectric layer deposited on the substrate and a silicon carbide anti-reflective coating having a dielectric constant of less than about 7.0 and preferably about 6.0 or less.
摘要翻译：本发明通常提供一种使用具有某些工艺参数的硅烷基材料沉积碳化硅的方法，其可用于形成用于IC应用的合适的ARC。即使在复杂的镶嵌结构中也可以使用相同的材料作为阻挡层和蚀刻阻挡层，并且还可以使用诸如铜作为导电材料的高扩散导体。在某些工艺参数下，碳化硅的固定厚度可用于各种厚度的下层。对于给定的反射率，碳化硅ARC的厚度基本上与下层的厚度无关，相比之下，为了获得给定的反射率，每个下层厚度的ARC厚度的调整的典型需要。用于在衬底上形成碳化硅抗反射涂层的优选工艺顺序包括将硅，碳和惰性气体引入到处理室的反应区中，在反应区中引发等离子体，使硅和碳在等离子体的存在下形成碳化硅，以及在该腔室中的基底上沉积碳化硅抗反射涂层。本发明的另一方面包括具有碳化硅抗反射涂层的基底，其包括沉积在基底上的电介质层和介电常数小于约7.0，优选约6.0或更小的碳化硅抗反射涂层。

5. 发明申请

US20070099417A1 Adhesion and minimizing oxidation on electroless CO alloy films for integration with low K inter-metal dielectric and etch stop 审中-公开
标题翻译：粘附和最小化无电解CO合金膜上的氧化，用于与低K金属间电介质和蚀刻停止集成
公开(公告)号：US20070099417A1
公开(公告)日：2007-05-03
申请号：US11329785
申请日：2006-01-10
申请人： Hongbin Fang , Timothy Weidman , Fang Mei , Yaxin Wang , Arulkumar Shanmugasundram , Christopher Bencher , Mehul Naik
发明人： Hongbin Fang , Timothy Weidman , Fang Mei , Yaxin Wang , Arulkumar Shanmugasundram , Christopher Bencher , Mehul Naik
IPC分类号： H01L21/469
CPC分类号： H01L21/76843 , H01L21/76829 , H01L21/76846 , H01L21/76849 , H01L21/76862 , H01L21/76864
摘要： A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on the substrate, reducing oxide formation on the capping layer, and then depositing a dielectric material. A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on a substrate, exposing the capping layer to a plasma, heating the substrate to more than about 100° C., and depositing a low dielectric constant material.
摘要翻译：一种用于处理半导体衬底的方法和装置，包括在形成在衬底上的导电材料上沉积覆盖层，减少覆盖层上的氧化物形成，然后沉积电介质材料。一种用于处理半导体衬底的方法和装置，包括在形成在衬底上的导电材料上沉积覆盖层，将覆盖层暴露于等离子体，将衬底加热到大于约100℃，以及沉积低介电常数材料。

6. 发明申请

US20060231524A1 TECHNIQUES FOR THE USE OF AMORPHOUS CARBON (APF) FOR VARIOUS ETCH AND LITHO INTEGRATION SCHEMES 失效
标题翻译：使用不规则碳（APF）进行各种ETCH和LITHO积分方案的技术
公开(公告)号：US20060231524A1
公开(公告)日：2006-10-19
申请号：US11422031
申请日：2006-06-02
申请人： Wei Liu , Jim He , Sang Ahn , Meihua Shen , Hichem M'Saad , Wendy Yeh , Christopher Bencher
发明人： Wei Liu , Jim He , Sang Ahn , Meihua Shen , Hichem M'Saad , Wendy Yeh , Christopher Bencher
IPC分类号： C23F1/00 , B44C1/22 , G03C5/00 , H01L21/302 , C03C25/68
CPC分类号： G03F7/091 , H01L21/0276 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/3081 , H01L21/3086 , H01L21/3088 , H01L21/3146
摘要： A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.
摘要翻译：提供蚀刻基板的方法。蚀刻基板的方法包括使用基板上的双图案化非晶碳层作为硬掩模将图案转印到基板中。任选地，在将图案转移到基底内之前，将非碳基层沉积在无定形碳层上作为覆盖层。

7. 发明申请

US20050045099A1 Methods and devices to reduce defects in dielectric stack structures 失效
标题翻译：减少电介质堆叠结构缺陷的方法和装置
公开(公告)号：US20050045099A1
公开(公告)日：2005-03-03
申请号：US10650941
申请日：2003-08-27
申请人： Christopher Bencher , Lee Luo
发明人： Christopher Bencher , Lee Luo
IPC分类号： C23C16/00 , C23C16/02 , C23C16/44 , C23C16/56
CPC分类号： C23C16/4401 , C23C16/0245 , C23C16/56
摘要： A variety of techniques may be employed alone or in combination to reduce the incidence of defects arising in dielectric stack structures formed by chemical vapor deposition (CVD). Incidence of a first defect type attributable to reaction between an unreacted species of a prior CVD step and reactants of a subsequent CVD step, is reduced by exposing a freshly-deposited dielectric layer to a plasma before any additional layers are deposited. Incidence of a second defect type attributable to the presence of incompletely vaporized CVD liquid precursor material, is reduced by exposing the freshly-deposited dielectric layer to a plasma, and/or by continuing the flow of carrier gas through an injection valve for a period beyond the conclusion of the CVD step.
摘要翻译：各种技术可以单独使用或组合使用以减少通过化学气相沉积（CVD）形成的介电堆叠结构中产生的缺陷的发生率。通过在沉积任何另外的层之前将新沉积的介电层暴露于等离子体，可以减少归因于现有CVD步骤的未反应物质与随后的CVD步骤的反应物之间的反应的第一缺陷类型的发生。归因于存在不完全蒸发的CVD液体前体材料的第二种缺陷类型的发生通过将新沉积的介电层暴露于等离子体和/或通过使载气通过喷射阀的流动持续一段时间来减少 CVD步骤的结论。

8. 发明申请

US20070243721A1 ABSORBER LAYER FOR DSA PROCESSING 审中-公开
标题翻译：吸收层用于DSA加工
公开(公告)号：US20070243721A1
公开(公告)日：2007-10-18
申请号：US11763226
申请日：2007-06-14
申请人： LUC AUTRYVE , Christopher Bencher , Dean Jennings , Haifan Liang , Abhilash Mayur , Mark Yam , Wendy Yeh , Richard Brough
发明人： LUC AUTRYVE , Christopher Bencher , Dean Jennings , Haifan Liang , Abhilash Mayur , Mark Yam , Wendy Yeh , Richard Brough
IPC分类号： H01L21/3105
CPC分类号： H01L21/26513 , H01L21/268
摘要： A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then exposing the substrate to electromagnetic radiation have one or more wavelengths between about 600 nm and about 1000 nm under conditions sufficient to heat the layer to a temperature of at least about 300° C. is provided. Optionally, the layer further comprises a dopant selected from the group consisting of nitrogen, boron, phosphorus, fluorine, and combinations thereof. In one aspect, the layer comprising amorphous carbon is an anti-reflective coating and an absorber layer that absorbs the electromagnetic radiation and anneals a top surface layer of the substrate. In one aspect, the substrate is exposed to the electromagnetic radiation in a laser annealing process.
摘要翻译：一种处理衬底的方法，包括在衬底上沉积包含无定形碳的层，然后将衬底暴露于电磁辐射，在足以将该层加热至至少至少的温度的条件下，具有约600nm至约1000nm之间的一个或多个波长提供约300℃。任选地，该层还包括选自氮，硼，磷，氟及其组合的掺杂剂。在一个方面，包含无定形碳的层是抗反射涂层和吸收层，其吸收电磁辐射并退火衬底的顶表面层。在一个方面，基板在激光退火工艺中暴露于电磁辐射。

9. 发明申请

US20070128538A1 METHOD OF DEPOSITING AN AMORPHOUS CARBON LAYER 有权
标题翻译：沉积非晶碳层的方法
公开(公告)号：US20070128538A1
公开(公告)日：2007-06-07
申请号：US11673177
申请日：2007-02-09
申请人： KEVIN FAIRBAIRN , Michael Rice , Timothy Weidman , Christopher Ngai , Ian Latchford , Christopher Bencher , Yuxiang Wang
发明人： KEVIN FAIRBAIRN , Michael Rice , Timothy Weidman , Christopher Ngai , Ian Latchford , Christopher Bencher , Yuxiang Wang
IPC分类号： G03C8/00
CPC分类号： H01L21/76829 , C23C16/26 , H01L21/0276 , H01L21/28035 , H01L21/3081 , H01L21/3088 , H01L21/31138 , H01L21/31144 , H01L21/3146 , H01L21/31612 , H01L21/32137 , H01L21/76802 , H01L21/76807
摘要： A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.
摘要翻译：一种使用无定形碳膜形成集成电路的方法。无定形碳膜通过热分解包含烃化合物和惰性气体的气体混合物而形成。无定形碳膜与集成电路制造工艺兼容。在一个集成电路制造工艺中，非晶碳膜用作硬掩模。在另一个集成电路制造工艺中，无定形碳膜是用于深紫外（DUV）光刻的抗反射涂层（ARC）。在又一集成电路制造工艺中，多层无定形碳抗反射涂层用于DUV光刻。

10. 发明申请

US20050263900A1 Semiconductor device having silicon carbide and conductive pathway interface 审中-公开
标题翻译：具有碳化硅和导电通路接口的半导体器件
公开(公告)号：US20050263900A1
公开(公告)日：2005-12-01
申请号：US11169337
申请日：2005-06-29
申请人： Judy Huang , Christopher Bencher , Sudha Rathi , Christopher Ngai , Bok Kim
发明人： Judy Huang , Christopher Bencher , Sudha Rathi , Christopher Ngai , Bok Kim
IPC分类号： H01L21/302 , B08B7/00 , C23C16/02 , C23G5/00 , H01L21/02 , H01L21/306 , H01L21/3065 , H01L21/31 , H01L21/311 , H01L21/314 , H01L21/318 , H01L21/3205 , H01L21/3213 , H01L21/768 , H01L23/10 , H01L23/52 , H01L23/532
CPC分类号： H01L21/02274 , B08B7/0035 , C23C16/0245 , C23G5/00 , H01L21/02063 , H01L21/02068 , H01L21/02071 , H01L21/02074 , H01L21/02115 , H01L21/02164 , H01L21/02167 , H01L21/0217 , H01L21/02211 , H01L21/0234 , H01L21/31116 , H01L21/3148 , H01L21/3185 , H01L21/32136 , H01L21/76807 , H01L21/76834 , H01L21/76877 , H01L21/76883 , H01L23/53238 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.
摘要翻译：本发明提供了一种原位等离子体还原方法以在沉积其后的层之前，在相对较低的温度下使用氮气和氢气（通常为氨）的化合物来还原氧化物或其它污染物。与氧化物层的典型的物理溅射清洗工艺相比，这些层的粘合特性得到改善，氧的存在降低。该方法对于双镶嵌结构的复杂要求尤其有用，特别是对于铜应用。

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