专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2013040236A1 HANDLING UNCLEAN SHUTDOWNS FOR A SYSTEM HAVING NON-VOLATILE MEMORY 审中-公开
标题翻译：对具有非易失性存储器的系统进行处理不确定关系
公开(公告)号：WO2013040236A1
公开(公告)日：2013-03-21
申请号：PCT/US2012/055199
申请日：2012-09-13
申请人： APPLE INC. , KHMELNITSKY, Vadim
发明人： KHMELNITSKY, Vadim
IPC分类号： G06F11/00
CPC分类号： G06F11/1417 , G06F11/1435 , G06F11/1441 , G06F12/0246 , G06F2201/835 , G06F2212/7201
摘要： Systems and methods are disclosed for handling unclean shutdowns for a system having non-volatile memory ("NVM"). In some embodiments, the system can leverage from information obtained from index pages in order to efficiently reconstruct logical-to-physical mappings after an unclean shutdown event. In other embodiments, the system can reconstruct logical-to-physical mappings by leveraging from context information stored in a NVM. In further embodiments, context information can be used in conjunction with index pages to reconstruct logical-to-physical mappings after an unclean shutdown.
摘要翻译：公开了用于处理具有非易失性存储器（“NVM”）的系统的不清洁关机的系统和方法。在一些实施例中，系统可以利用从索引页获得的信息，以便在不洁的关闭事件之后有效地重建逻辑到物理的映射。在其他实施例中，系统可以通过利用存储在NVM中的上下文信息来重构逻辑到物理映射。在另外的实施例中，上下文信息可以与索引页结合使用，以在不洁的关闭之后重建逻辑到物理的映射。

2. 发明申请

WO2012118743A1 EFFICIENT BUFFERING FOR A SYSTEM HAVING NON-VOLATILE MEMORY 审中-公开
标题翻译：对具有非易失性存储器的系统的有效缓冲
公开(公告)号：WO2012118743A1
公开(公告)日：2012-09-07
申请号：PCT/US2012/026752
申请日：2012-02-27
申请人： APPLE INC. , POST, Daniel, J. , WAKRAT, Nir, Jacob
发明人： POST, Daniel, J. , WAKRAT, Nir, Jacob
IPC分类号： G11C7/10
CPC分类号： G06F12/0246 , G06F3/061 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G06F3/068 , G06F12/1408 , G06F13/1673 , G06F21/71 , G06F21/79 , G06F2212/1052 , Y02D10/14
摘要： Systems and methods are disclosed for efficient buffering for a system having non-volatile memory ("NVM"). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently reordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.
摘要翻译：公开了用于具有非易失性存储器（“NVM”）的系统的有效缓冲的系统和方法。在一些实施例中，系统的控制电路可以使用启发式方法来确定是否执行从文件系统接收的一个或多个写入命令的缓冲。在其他实施例中，控制电路可以通过沿着缓冲器的页对准边界的队列中有效地重新排序写入命令来最小化读取能量和缓冲开销。在另外的实施例中，控制电路可以最佳地组合来自缓冲器的写入命令与来自队列的写入命令。在组合命令之后，控制电路可以在单个事务中分派命令。

3. 发明申请

WO2012094237A1 HANDLING DYNAMIC AND STATIC DATA FOR A SYSTEM HAVING NON-VOLATILE MEMORY 审中-公开
标题翻译：处理非易失性存储器的系统的动态和静态数据
公开(公告)号：WO2012094237A1
公开(公告)日：2012-07-12
申请号：PCT/US2011/068021
申请日：2011-12-30
申请人： APPLE INC. , POST, Daniel, J. , WAKRAT, Nir, Jacob
发明人： POST, Daniel, J. , WAKRAT, Nir, Jacob
IPC分类号： G06F9/26 , G06F9/34
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/1044 , G06F2212/7205 , G06F2212/7211
摘要： Systems and methods are disclosed for handling dynamic and static data for a system having non-volatile memory ("NVM"). By determining whether data being written to the NVM is dynamic or not, a NVM interface of a system can determine where to initially place the data on the NVM (e.g., place the data on either a dynamic stream block or a static stream block). Moreover, this information can allow the NVM interface to improve the efficiencies of both garbage collection ("GC") and wear leveling.
摘要翻译：公开了用于处理具有非易失性存储器（“NVM”）的系统的动态和静态数据的系统和方法。通过确定正在写入NVM的数据是否是动态的，系统的NVM接口可以确定在NVM上最初将数据放置在哪里（例如，将数据放置在动态流块或静态流块上）。此外，这些信息可以使NVM界面提高垃圾收集（“GC”）和磨损均衡的效率。

4. 发明申请

WO2013090133A1 LOGICAL BLOCK ADDRESS (LBA) BITMAP USAGE 审中-公开
标题翻译：逻辑块地址（LBA）BITMAP USAGE
公开(公告)号：WO2013090133A1
公开(公告)日：2013-06-20
申请号：PCT/US2012/068375
申请日：2012-12-07
申请人： APPLE INC.
发明人： POST, Daniel, J. , WAKRAT, Nir, Jacob , KHMELNITSKY, Vadim
IPC分类号： G06F12/00
CPC分类号： G06F12/0253 , G06F12/0238 , G06F12/0246 , G06F2212/1024 , G06F2212/1044 , G06F2212/7201 , G06F2212/7205 , G06F2212/7209
摘要： Systems and methods are disclosed for logical block address ("LBA) bitmap usage for a system having non-volatile memory ("NVM"). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.
摘要翻译：公开了用于具有非易失性存储器（“NVM”）的系统的逻辑块地址（“LBA”）位图使用的系统和方法。位图可以存储在系统的易失性存储器中，其中位图可以存储映射状态一个或多个逻辑地址通过使用位图，系统可以确定LBA的映射状态，而无需访问NVM，此外，系统可以通过最小的NVM访问更新LBA的映射状态，通过减少数量的NVM访问，系统可以避免触发垃圾收集过程，从而提高整体系统性能。

5. 发明申请

WO2013040537A1 WEAVE SEQUENCE COUNTER FOR NON-VOLATILE MEMORY SYSTEMS 审中-公开
标题翻译：用于非易失性存储器系统的WEAVE序列计数器
公开(公告)号：WO2013040537A1
公开(公告)日：2013-03-21
申请号：PCT/US2012/055698
申请日：2012-09-17
申请人： APPLE INC. , POST, Daniel, J. , WAKRAT, Nir, Jacob , KHMELNITSKY, Vadim
发明人： POST, Daniel, J. , WAKRAT, Nir, Jacob , KHMELNITSKY, Vadim
IPC分类号： G06F9/26
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7207 , G06F2212/7211
摘要： Systems and methods are disclosed for providing a weave sequence counter ("WSC") for non-volatile memory ("NVM") systems. The WSC can identify the sequence in which each page of the NVM is programmed. The "weave" aspect can refer to the fact that multiple blocks can be open for programming at once, thus allowing the pages of these blocks to be programmed in a "woven" manner. Systems and methods are also disclosed for providing a host weave sequence counter ("HWSC"). Each time new data is initially programmed to the NVM, this data can be associated with a particular HWSC. The HWSC associated with the data may not change, even when the data is moved to a new page (e.g., for wear leveling purposes and the like). The WSC and HWSC may aid in, for example, performing rollback, building logical -to-physical mappings, determining static-versus-dynamic page statuses, and performing maintenance operations (e.g., wear leveling).
摘要翻译：公开了用于为非易失性存储器（“NVM”）系统提供编织序列计数器（“WSC”）的系统和方法。 WSC可以识别NVM的每个页面被编程的顺序。 “编织”方面可以指多个块可以一次打开以进行编程，从而允许以“编织”的方式对这些块的页面进行编程。还公开了用于提供主机编织序列计数器（“HWSC”）的系统和方法。每当新数据最初被编程到NVM时，该数据可以与特定的HWSC相关联。即使将数据移动到新页面（例如，用于磨损均衡目的等），与数据相关联的HWSC也可能不会改变。 WSC和HWSC可以帮助例如执行回滚，构建逻辑到物理映射，确定静态到动态页面状态以及执行维护操作（例如，磨损均衡）。

6. 发明申请

WO2011034652A1 METADATA REDUNDANCY SCHEMES FOR NON-VOLATILE MEMORIES 审中-公开
标题翻译：非挥发性物质的元数据冗余计划
公开(公告)号：WO2011034652A1
公开(公告)日：2011-03-24
申请号：PCT/US2010/042235
申请日：2010-07-16
申请人： APPLE INC. , POST, Daniel J. , KHMELNITSKY, Vadim , WAKRAT, Nir J.
发明人： POST, Daniel J. , KHMELNITSKY, Vadim , WAKRAT, Nir J.
IPC分类号： G06F12/02 , G06F11/14
CPC分类号： G06F12/0246 , G06F11/1402 , G06F11/1666 , G06F2212/7201 , G06F2212/7207
摘要： Systems and methods are provided for storing data to or reading data from a non-volatile memory ("NVM"), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.
摘要翻译：提供了系统和方法，用于使用元数据冗余方案将数据存储到非易失性存储器（“NVM”）或从闪存中读取数据。在一些实施例中，包括NVM的电子设备还可以包括用于控制对NVM的访问的存储器接口。存储器接口可以接收将用户数据写入NVM的请求。来自每个请求的用户数据可以与诸如逻辑地址，标志或其他数据的元数据相关联。响应于写入请求，NVM接口可以将用户数据及其相关联的元数据存储在第一存储器位置（例如，页面）中，并且可以将元数据的冗余副本存储在第二存储器位置中。这样，即使第一存储器位置变得不可访问，存储器接口仍然可以从存储在第二存储器位置的备份副本中恢复元数据。

7. 发明申请

WO2013040538A1 FASTER TREE FLATTENING FOR A SYSTEM HAVING NON-VOLATILE MEMORY 审中-公开
标题翻译：用于具有非易失性存储器的系统的快速树状平铺
公开(公告)号：WO2013040538A1
公开(公告)日：2013-03-21
申请号：PCT/US2012/055703
申请日：2012-09-17
申请人： APPLE INC. , POST, Daniel, J. , KHMELNITSKY, Vadim
发明人： POST, Daniel, J. , KHMELNITSKY, Vadim
IPC分类号： G06F9/45
CPC分类号： G06F3/0608 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G06F2212/7201
摘要： Systems and methods are disclosed for efficient buffering for a system having non-volatile memory ("NVM"). A tree can be stored in volatile memory that includes a logical -to-physical mapping between a logical space and physical addresses of the NVM. When the amount of memory available for the tree is below a pre-determined threshold, a system can attempt to reduce the number of data fragments in the NVM, and consequently flatten a portion of the tree. The NVM interface may select an optimal set of entries of the tree to combine. Any suitable approach can be used such as, for example, moving one or more sliding windows across the tree, expanding a sliding window when a condition has been satisfied, using a priority queue while scanning the tree, and/or maintaining a priority queue while the tree is being updated.
摘要翻译：公开了用于具有非易失性存储器（“NVM”）的系统的有效缓冲的系统和方法。一个树可以存储在易失性存储器中，其中包括逻辑空间和NVM的物理地址之间的逻辑到物理映射。当可用于树的内存量低于预定阈值时，系统可以尝试减少NVM中的数据片段的数量，从而使树的一部分变平。 NVM接口可以选择要合并的树的最佳条目集合。可以使用任何合适的方法，例如，在树上移动一个或多个滑动窗口，当满足条件时，使用优先级队列在扫描树时扩展滑动窗口和/或维护优先级队列树正在更新。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式