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1. 发明申请

WO2023039109A1 LEACHING FLUID CONTROL SYSTEMS FOR MINING OPERATIONS 审中-公开
公开(公告)号：WO2023039109A1
公开(公告)日：2023-03-16
申请号：PCT/US2022/042965
申请日：2022-09-08
申请人： SOUTHWEST IRRIGATION LLC
发明人： LINCOLN, Kyle
IPC分类号： E21C41/16 , E21C41/20 , E21C41/30 , E21C41/26
摘要： The present disclosure provides a leaching fluid control system for mining operations that includes controllable valve circuitry in fluid communication with a leaching fluid source, the controllable valve circuitry to provide a controlled flow rate of the leaching fluid; flow rate sensor circuitry in fluid communication with the controllable valve circuitry and with one or more leaching fluid lines to generate a flow rate signal indicative of the leaching fluid flow rate through the controllable valve circuitry; and controller circuitry to control the controllable valve circuitry to deliver a flow rate of leaching fluid based on the flow rate signal and one or more flow rate thresholds.

2. 发明申请

WO2022094331A1 MODULAR FOOTWEAR SOLE SYSTEMS AND METHODS 审中-公开
公开(公告)号：WO2022094331A1
公开(公告)日：2022-05-05
申请号：PCT/US2021/057438
申请日：2021-10-29
申请人： ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONA
发明人： MISSOUM, Samy
IPC分类号： A43B13/36 , A43B3/24 , A43B13/12 , A43B13/14 , A43B13/18 , A43B13/22
摘要： The present disclosure is directed to systems and methods of forming a modular footwear sole. The modular sole includes a midsole layer having a first attachment fixture disposed on at least a portion of the lower surface of the midsole layer. A heel member includes a deformable heel layer that includes a plurality of deformable elements having the same or different mechanical properties. The heel member includes a second attachment fixture that couples to the first attachment fixture. An outsole member includes a deformable outsole layer that includes a plurality of deformable elements having the same or different mechanical properties. The outsole member includes a third attachment fixture that couples to the first attachment fixture. The deformable elements may be selected based on a user's foot pressure map.

3. 发明申请

WO2021142421A1 WEARABLE CHRONIC MONITORING SYSTEMS, METHODS, AND DEVICES 审中-公开
公开(公告)号：WO2021142421A1
公开(公告)日：2021-07-15
申请号：PCT/US2021/012918
申请日：2021-01-11
申请人： ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONA
发明人： GUTRUF, Philipp
IPC分类号： A41D1/00 , A41D31/18 , A61B5/00 , D03D15/00 , D03D15/533
摘要： The present disclosure is directed to systems and methods of collecting environmental and/or biometric information and/or data using a chronic monitoring apparatus that includes a wearable expandable support structure to wirelessly receive power via a wireless power transfer antenna disposed in, on, or about the wearable expandable support structure. The chronic monitoring apparatus includes power receiver circuitry, data transmission circuitry, sensor circuitry, and control circuitry. The wearable expandable support structure maintains close contact between at least a portion of the sensor circuitry and the wearer of the chronic monitoring apparatus without requiring the use of adhesives or other bonding agents. The chronic monitoring apparatus communicates the collected environmental and/or biometric information to external data collection circuitry. The components included in the chronic monitoring apparatus are sealed within the wearable expandable support structure providing a rugged, reliable, resilient and waterproof system that is biocompatible, non-irritating and does not require the use of adhesives.

4. 发明申请

WO2021062269A1 PIPELINE CLEANOUT TOOL 审中-公开
公开(公告)号：WO2021062269A1
公开(公告)日：2021-04-01
申请号：PCT/US2020/052876
申请日：2020-09-25
申请人： HURRICANE REINSTATEMENT SOLUTIONS, LLC
发明人： GESTY, Michael
IPC分类号： B08B9/04 , B08B9/02 , B08B9/027 , B08B9/043 , B08B9/045 , B08B9/057
摘要： A new, innovative pipeline cleanout tool useful in removing debris and accretions from pipelines prior to reinstating the pipeline. The pipeline cleanout tool includes rotatable cleaning head assembly that includes a cylindrical body having a first end surface and a second end surface. A plurality of grooves formed in the first end surface and a plurality of grooves formed in the second end surface accept the insertion of arcuate flexible metal elements that extend spirally outward from the surface of the cylindrical member. The arcuate flexible metal elements, when compressed form an arcuate flexible metal element ring that contacts the interior surface of the pipeline. The rotatable cleaning head assembly also includes a first end cap and a second end cap, both end caps physically coupled to the cylindrical body and a rotatable flexible shaft. The tool further includes spacer elements and compressible elements disposed about the rotatable flexible shaft.

5. 发明申请

WO2018118303A1 DYNAMIC RUNTIME TASK MANAGEMENT 审中-公开
公开(公告)号：WO2018118303A1
公开(公告)日：2018-06-28
申请号：PCT/US2017/062395
申请日：2017-11-17
申请人： INTEL CORPORATION
发明人： HU, Chunling , SHPEISMAN, Tatiana , BARIK, Rajkishore , GOTTSCHLICH, Justin E.
IPC分类号： G06F9/48
摘要： A dynamic runtime scheduling system includes task manager circuitry capable of detecting a correspondence in at least a portion of the output arguments from one or more first tasks with at least a portion of the input arguments to one or more second tasks. Upon detecting the output arguments from the first task represents a superset of the second task input arguments, the task manager circuitry apportions the first task into a plurality of new subtasks. At least one of the new subtasks includes output arguments having a 1:1 correspondence to the second task input arguments. Upon detecting the output arguments from an first task represents a subset of the second task input arguments, the task manager circuitry may autonomously apportion the second task into a plurality of new subtasks. At least one of the new subtasks may include input arguments having a 1:1 correspondence to first task output arguments.

6. 发明申请

WO2018063724A1 METHOD AND APPARATUS FOR SHARING SECURITY METADATA MEMORY SPACE 审中-公开
标题翻译：用于共享安全元数据存储空间的方法和设备
公开(公告)号：WO2018063724A1
公开(公告)日：2018-04-05
申请号：PCT/US2017/049468
申请日：2017-08-30
申请人： INTEL CORPORATION
发明人： CHHABRA, Siddhartha , DURHAM, David M.
IPC分类号： G06F21/53 , G06F21/60 , G06F21/64
CPC分类号： G06F12/1408 , G06F12/1425 , G06F21/53 , G06F21/602 , G06F21/64 , G06F21/79 , G06F2212/1052 , H04L9/0643
摘要： The presently disclosed method and apparatus for sharing security metadata memory space proposes a technique to allow metadata sharing two different encryption techniques. A section of memory encrypted using a first type of encryption and having first security metadata associated therewith is converted to a section of memory encrypted using a second type of encryption and having second security metadata associated therewith. At least a portion of said first security metadata shares a memory space with at least a portion of said second security metadata for a same section of memory.
摘要翻译：目前公开的用于共享安全元数据存储空间的方法和装置提出了一种允许元数据共享两种不同的加密技术的技术。使用第一类型的加密并且具有与其相关联的第一安全性元数据加密的一部分存储器被转换为使用第二类型的加密并且具有与其相关联的第二安全性元数据加密的一部分存储器。所述第一安全元数据的至少一部分与同一部分存储器的所述第二安全元数据的至少一部分共享存储空间。

7. 发明申请

WO2017172010A1 LEADFRAME TOP-HAT MULTI-CHIP SOLUTION 审中-公开
标题翻译： LEADFRAME顶级多芯片解决方案
公开(公告)号：WO2017172010A1
公开(公告)日：2017-10-05
申请号：PCT/US2017/015399
申请日：2017-01-27
申请人： INTEL CORPORATION
发明人： VREMAN, Gerrit J.
IPC分类号： H01L23/495 , H01L23/482 , H01L23/00
摘要： A semiconductor package may include an electrically conductive leadframe having a aperture extending from an upper surface of the leadframe to the lower surface of the leadframe. A wirebond die may be attached or affixed to the upper surface of the leadframe in a location that at least partially obstructs the aperture. A flip-chip die may be disposed proximate the bottom surface of the leadframe at least partially in the aperture. The flip-chip die may be physically coupled to the wirebond die, the leadframe, or both. A mold compound that exposes the lands on the leadframe and the solder bumps or balls on the flip-chip die may at least partially encapsulate the semiconductor package.
摘要翻译：半导体封装可包括具有从引线框的上表面延伸到引线框的下表面的孔的导电引线框。可以在至少部分地阻挡孔的位置处将引线框的上表面附接或固定到引线框的上表面。倒装芯片可以至少部分地设置在孔中的引线框的底表面附近。倒装芯片可以物理耦合到引线键合芯片，引线框或两者。暴露引线框架上的焊盘和倒装芯片管芯上的焊料凸块或焊球的模制化合物可以至少部分地封装半导体封装。

8. 发明申请

WO2017171866A1 INTEGRATED 1T1R RRAM MEMORY CELL 审中-公开
标题翻译：集成的1T1R RRAM存储器单元
公开(公告)号：WO2017171866A1
公开(公告)日：2017-10-05
申请号：PCT/US2016/025694
申请日：2016-04-01
申请人： INTEL CORPORATION
发明人： KARPOV, Elijah V. , PILLARISETTY, Ravi , MAJHI, Prashant , MUKHERJEE, Niloy , SHAH, Uday
IPC分类号： G11C13/00 , G06F12/02
CPC分类号： G11C13/0007 , G11C13/003 , G11C2213/15 , G11C2213/53 , G11C2213/73 , G11C2213/74 , G11C2213/79 , G11C2213/82 , H01L27/2445
摘要： One embodiment provides an apparatus. The apparatus includes a bipolar junction transistor (BJT) and an integrated resistive element. The BJT includes a base contact, a base region, a collector contact, a collector region and an integrated emitter contact. The integrated resistive element includes a resistive layer and an integrated electrode. The resistive element is positioned between the base region and the integrated emitter contact.
摘要翻译：一个实施例提供了一种装置。该装置包括双极结型晶体管（BJT）和集成电阻元件。 BJT包括基极触点，基极区域，集电极触点，集电极区域和集成发射极触点。集成电阻元件包括电阻层和集成电极。电阻元件位于基极区和集成发射极触点之间。

9. 发明申请

WO2017164859A1 NONVOLATILE SRAM 审中-公开
标题翻译：非易失性SRAM
公开(公告)号：WO2017164859A1
公开(公告)日：2017-09-28
申请号：PCT/US2016/023699
申请日：2016-03-23
申请人： INTEL CORPORATION
发明人： LIU, Huichu , MANIPATRUNI, Sasikanth , MORRIS, Daniel H. , VAIDYANATHAN, Kaushik , MUKHERJEE, Niloy , NIKONOV, Dmitri E. , YOUNG, Ian , KARNIK, Tanay
IPC分类号： G11C11/412 , G11C11/413
CPC分类号： G11C11/413 , G11C7/1045 , G11C7/1057 , G11C7/20 , G11C11/412 , G11C13/0007 , G11C14/009 , G11C2213/70 , G11C2213/71
摘要： One embodiment provides an apparatus. The apparatus includes a pair of nonvolatile resistive random access memory (RRAM) memory cells coupled to a volatile static RAM (SRAM) memory cell. The pair of nonvolatile RRAM memory cells includes a first RRAM memory cell and a second RRAM memory cell. The first RRAM memory cell includes a first resistive memory element coupled to a first bit line, and a first selector transistor coupled between the first resistive memory element and a first output node of the volatile SRAM memory cell. The second RRAM memory cell includes a second resistive memory element coupled to a second bit line, and a second selector transistor coupled between the second resistive memory element and a second output node of the volatile SRAM memory cell.
摘要翻译：一个实施例提供了一种装置。该装置包括耦合到易失性静态RAM（SRAM）存储器单元的一对非易失性电阻随机存取存储器（RRAM）存储器单元。该对非易失性RRAM存储器单元包括第一RRAM存储器单元和第二RRAM存储器单元。第一RRAM存储器单元包括耦合到第一位线的第一电阻式存储器元件以及耦合在第一电阻式存储器元件和易失性SRAM存储器单元的第一输出节点之间的第一选择器晶体管。第二RRAM存储器单元包括耦合到第二位线的第二电阻存储器元件和耦合在易失性SRAM存储器单元的第二电阻存储器元件和第二输出节点之间的第二选择器晶体管。

10. 发明申请

WO2017112340A1 TECHNIQUES FOR SCALABLE ENDPOINT ADDRESSING FOR PARALLEL APPLICATIONS 审中-公开
标题翻译：用于可扩展端点寻址的技术，用于并行应用
公开(公告)号：WO2017112340A1
公开(公告)日：2017-06-29
申请号：PCT/US2016/063782
申请日：2016-11-25
申请人： INTEL CORPORATION
发明人： UNDERWOOD, Keith , GIEFER, Charles , ADDISON, David
IPC分类号： E05D3/06 , G06F1/16 , E05D11/00
CPC分类号： G06F15/17331 , G06F3/0604 , G06F3/0659 , G06F3/067 , G06F9/4881 , G06F9/547 , G06F12/00 , G06F13/00 , H04L67/10
摘要： Techniques are disclosed for algorithmic mapping of logical process identifiers in order to provide highly-scalable end-point addressing in multi-node systems capable of performing massively parallel applications. In particular, nodes initiating inter-process communication with a target process may use an initiator-side translation process that performs an algorithmic mapping to translate a logical process identifier (e.g., a rank/processing element) into a target physical node identifier and a target local process identifier. The initiating node may then use hardware fabric of a multi-node network to route the inter-process communication to an appropriate node. A node may receive an inter-process communication and may use a target-side translation process in hardware to translate the target virtual process identifier into a local process identifier for the node. The node may then execute an operation in accordance with the inter-process communication, such as a get or set against a memory associated with the node.
摘要翻译：公开了用于逻辑过程标识符的算法映射的技术，以便在能够执行大规模并行应用的多节点系统中提供高度可扩展的终点寻址。特别地，发起与目标进程的进程间通信的节点可以使用执行算法映射以将逻辑进程标识符（例如，排名/处理元件）转换成目标物理节点标识符和目标的发起者侧转换进程本地进程标识符。发起节点然后可以使用多节点网络的硬件结构来将进程间通信路由到合适的节点。节点可以接收进程间通信并且可以在硬件中使用目标侧转换进程来将目标虚拟进程标识符转换成用于该节点的本地进程标识符。节点然后可以根据进程间通信执行操作，诸如针对与节点相关联的存储器的获取或设置。

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