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1. 发明授权

US07433663B1 Automatic gain control system for multiple receiving antennae 失效
标题翻译：多种接收天线的自动增益控制系统
公开(公告)号：US07433663B1
公开(公告)日：2008-10-07
申请号：US11139343
申请日：2005-05-27
申请人： Po-Yuen Cheng
发明人： Po-Yuen Cheng
IPC分类号： H04B1/06
CPC分类号： H04B1/18 , H04B7/0857
摘要： A multiple receiving antennae system having a plurality of radio frequency (RF) modules being responsive to incoming signals for processing the same to generate baseband signals. The multiple receiving antennae system further processes baseband signals to generate digital baseband signals, in accordance with an embodiment of the present invention. The multiple receiving antennae system further still includes a plurality of automatic gain control (AGC) modules being responsive to digital baseband signals for processing the same to generate a plurality of gain values. The plurality of gain values are used in the plurality of RF modules for independent gain adjustment of the incoming signals. The plurality of gain values are used to generate adjusted signals with enhanced signal to noise ratio (SNR) to improve the performance of the multiple receiving antennae system, whereby the plurality of gain values are used to enhance reception of incoming signals by improving SNR.
摘要翻译：一种具有多个射频（RF）模块的多接收天线系统，响应于输入信号进行处理以产生基带信号。根据本发明的实施例，多接收天线系统进一步处理基带信号以产生数字基带信号。多个接收天线系统还包括多个自动增益控制（AGC）模块，响应于数字基带信号进行处理，以产生多个增益值。在多个RF模块中使用多个增益值用于输入信号的独立增益调整。多个增益值用于产生具有增强的信噪比（SNR）的调整信号，以改善多个接收天线系统的性能，由此多个增益值用于通过改善SNR来增强输入信号的接收。

2. 发明授权

US07295401B2 Laminated side shield for perpendicular write head for improved performance 有权
标题翻译：用于垂直写头的层压侧屏蔽，以提高性能
公开(公告)号：US07295401B2
公开(公告)日：2007-11-13
申请号：US10975283
申请日：2004-10-27
申请人： Wipul Pemsiri Jayasekara , Hardayal Singh Gill
发明人： Wipul Pemsiri Jayasekara , Hardayal Singh Gill
IPC分类号： G11B5/11 , G11B5/147
CPC分类号： G11B5/315 , G11B5/1278 , G11B5/3116 , G11B5/3146
摘要： A perpendicular write head is disclosed for writing information onto tracks. The write head includes a top pole and a return pole and side shields with laminated layers wherein said laminated layers have magnetization in a direction parallel to an air bearing surface (ABS) and perpendicular to the tracks.
摘要翻译：公开了用于将信息写入轨道的垂直写头。写头包括顶极和返回极和具有层压层的侧屏蔽，其中所述层压层在平行于空气轴承表面（ABS）并且垂直于轨道的方向上具有磁化。

3. 发明授权

US07167944B1 Block management for mass storage 有权
标题翻译：大容量存储的块管理
公开(公告)号：US07167944B1
公开(公告)日：2007-01-23
申请号：US10455550
申请日：2003-06-04
申请人： Petro Estakhri
发明人： Petro Estakhri
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0246 , G11C8/12 , G11C16/08
摘要： An embodiment of the present invention includes a nonvolatile memory system comprising nonvolatile memory for storing sector information, the nonvolatile memory being organized into blocks with each block including a plurality of sectors, each sector identified by a logical block address and for storing sector information. A controller is coupled to the nonvolatile memory for writing sector information to the latter and for updating the sector information, wherein upon updating sector information, the controller writes to the next free or available sector(s) of a block such that upon multiple re-writes or updating of sector information, a plurality of blocks are substantially filled with sector information and upon such time, the controller rearranges the updated sector information in sequential order based on their respective logical block addresses thereby increasing system performance and improving manufacturing costs of the controller.
摘要翻译：本发明的实施例包括非易失性存储器系统，其包括用于存储扇区信息的非易失性存储器，非易失性存储器被组织成块，每个块包括多个扇区，每个扇区由逻辑块地址标识并用于存储扇区信息。控制器耦合到非易失性存储器，用于向后者写入扇区信息并用于更新扇区信息，其中在更新扇区信息时，控制器写入块的下一个空闲或可用扇区，写入或更新扇区信息，多个块基本上被扇区信息填充，并且在这样的时间，控制器基于它们各自的逻辑块地址按顺序重新排列更新的扇区信息，从而提高系统性能并提高控制器的制造成本。

4. 发明授权

US06839821B2 Method and apparatus for memory control circuit 有权
标题翻译：存储器控制电路的方法和装置
公开(公告)号：US06839821B2
公开(公告)日：2005-01-04
申请号：US10861074
申请日：2004-06-04
申请人： Petro Estakhri
发明人： Petro Estakhri
IPC分类号： G11C8/00 , G11C16/10 , G11C16/26 , G06F12/00 , G06F13/14
CPC分类号： G11C8/00 , G11C16/10 , G11C16/26
摘要： A method and circuit for fast memory access (read or write) of the data to and from a memory array is disclosed. Architecture wise, the memory array control circuit provides for at least two address latches and two page registers. The first address latch contains a first data address and the second address latch contains a second data address. The first data address is decoded first and sent to the memory array to access (read or write) the corresponding data from the memory array. When the data of the first data address is being accessed, the decoding process will begin for a second data address. When the data of the first data address has been accessed, the second data address is ready for the memory array. Thus, there can be continuous fetching from or writing to the memory array. In the preferred embodiment, there are two page registers. In a read operation, the data read from the first data address is transferred to a first page register. When the data of the second data address is being accessed, the data in the first page register is transferred to a second page register. When the operation to read the data from the second data address is completed, the data can be placed in the first register. The data in the second page register can be rapidly transferred to a latch and on to a bus. In this manner, there is always space made available for the data read. Similarly, in a write operation, data is transferred from the data bus to the second page register and then to the first page register. The data in the first register is written into the memory array.

5. 发明授权

US07407393B2 Super slim compact flash (CF) light universal serial bus (USB) device 失效
标题翻译：超薄型紧凑型闪存（CF）光通用串行总线（USB）设备
公开(公告)号：US07407393B2
公开(公告)日：2008-08-05
申请号：US11739245
申请日：2007-04-24
申请人： Jim C. Ni , Ming-Shiang Shen
发明人： Jim C. Ni , Ming-Shiang Shen
IPC分类号： H01R13/14
CPC分类号： G06K19/077 , G06K19/07732
摘要： An embodiment of the present invention includes a super slim compact flash (CF) light Universal Serial Bus (USB) device having a top cover, a top cover slot formed within the top cover and forming a top cover slot cavity, a sliding plug connector positioned within the cavity and flexibly movable therein, a plastic frame disposed below and around the top cover, a retractable slim USB plug connector sub-assembly on top of which and connected thereto is placed the sliding plug connector, the sub-assembly including a retractable slim USB plug connector positioned within the device to be flexibly retracted from or pulled into the device by the sliding plug connector for causing connection to a mating USB plug connector.
摘要翻译：本发明的一个实施例包括超薄紧凑型闪存（CF）灯通用串行总线（USB）装置，其具有顶盖，顶盖槽形成在顶盖内并形成顶盖槽腔，滑动插头连接器定位在空腔内并且柔性地可移动的塑料框架设置在顶盖的下面和周围，一个可伸缩的细长的USB插头连接器子组件，其顶部并与之连接，放置滑动插头连接器，该子组件包括可缩回的薄型 USB插头连接器定位在设备内，以通过滑动插头连接器灵活地缩回或拉入设备，用于连接到配对的USB插头连接器。

6. 发明授权

US07111140B2 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 有权
公开(公告)号：US07111140B2
公开(公告)日：2006-09-19
申请号：US10832421
申请日：2004-04-26
申请人： Petro Estakhri , Berhanu Iman
发明人： Petro Estakhri , Berhanu Iman
IPC分类号： G06F12/00 , G11C8/00 , G11C16/04
CPC分类号： G06F12/0238 , G06F3/0613 , G06F3/064 , G06F3/0679 , G06F11/1068 , G06F12/0246 , G11C16/08 , G11C16/102 , G11C29/765 , G11C29/82
摘要： In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored. The storage system includes a memory controller coupled to the host; and a nonvolatile memory bank coupled to the memory controller via a memory bus, the memory bank being included in a non-volatile semiconductor memory unit, the memory bank has storage blocks each of which includes a first row-portion located in said memory unit, and a corresponding second row-portion located in each of the memory unit, each of the memory row-portions provides storage space for two of said sectors, wherein the speed of performing write operations is increased by writing sector information to the memory unit simultaneously.

7. 发明授权

US07065076B1 Modular scalable switching networks 失效
标题翻译：模块化可扩展交换网络
公开(公告)号：US07065076B1
公开(公告)日：2006-06-20
申请号：US09648076
申请日：2000-08-25
申请人： Siamack Nemazie
发明人： Siamack Nemazie
IPC分类号： H04Q11/00 , H04Q3/00
CPC分类号： H04Q3/68
摘要： An embodiment of the present invention is disclosed to include a three stage scalable switching network that can be built from a common module. Further disclosed are methods for building switching network v(k, n, m) from a common module comprising a (n×k) input switch, a (k′×k′) middle switch, and a (k×n) output switch.
摘要翻译：公开了本发明的实施例，以包括可以从公共模块构建的三级可伸缩交换网络。进一步公开的是用于从包括（nxk）输入开关，（k'xk'）中间开关和（kxn）输出开关的公共模块构建开关网络v（k，n，m）的方法。

8. 发明授权

US07024756B2 Method of making a perpendicular recording magnetic head pole tip with an etchable adhesion CMP stop layer 失效
标题翻译：制造具有可蚀刻粘合CMP停止层的垂直记录磁头极尖的方法
公开(公告)号：US07024756B2
公开(公告)日：2006-04-11
申请号：US10631706
申请日：2003-07-30
申请人： Quang Le , Jui-lung Li , Jeffrey S. Lille , Son Van Nguyen
发明人： Quang Le , Jui-lung Li , Jeffrey S. Lille , Son Van Nguyen
IPC分类号： G11B5/187 , B44C1/22
CPC分类号： G11B5/1278 , G11B5/3106 , Y10T29/49041 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052
摘要： The method of making a magnetic head assembly includes forming a second pole piece layer that is recessed from a head surface, forming a reactive ion etchable (RIEable) pole tip forming layer on the second pole piece layer, forming an adhesion/stop layer of tantalum (Ta) on the pole tip forming layer, forming a photoresist mask on the adhesion/stop layer with an opening for patterning the adhesion/stop layer and the pole tip forming layer with another opening, reactive ion etching (RIE) through the opening to form the other opening, forming the second pole piece pole tip in the other opening with a top which is above a top of the adhesion/stop layer and chemical mechanical polishing (CMP) the top of the second pole piece pole tip until the CMP contacts the adhesion/stop layer. The invention also includes the magnetic head made by such a process.
摘要翻译：制造磁头组件的方法包括形成从头表面凹陷的第二极片层，在第二极片层上形成反应离子可蚀刻（可分离）极尖端形成层，形成钽的粘附/停止层（Ta），在粘合/停止层上形成光刻胶掩模，其中具有用于使粘附/阻挡层和极尖形成层图案化的开口具有另一个开口，反应离子蚀刻（RIE）通过开口至形成另一个开口，在另一个开口中形成具有位于粘附/停止层顶部之上的顶部的第二极靴极尖，并且在第二极片极尖的顶部进行化学机械抛光（CMP），直到CMP接触粘附/停止层。本发明还包括由这种方法制成的磁头。

9. 发明授权

US06978342B1 Moving sectors within a block of information in a flash memory mass storage architecture 失效
标题翻译：在闪存大容量存储体系结构中的信息块内移动扇区
公开(公告)号：US06978342B1
公开(公告)日：2005-12-20
申请号：US09620544
申请日：2000-07-21
申请人： Petro Estakhri , Berhanu Iman , Joumana Fahim, legal representative
发明人： Ali Ganjuel, deceased
IPC分类号： G06F3/06 , G06F11/10 , G06F12/02 , G11C8/12 , G11C16/08 , G11C16/10 , G11C29/00 , G06F12/08
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/064 , G06F3/0679 , G06F11/1008 , G06F11/1068 , G06F12/023 , G06F2212/7201 , G11C8/12 , G11C16/08 , G11C16/102 , G11C29/765 , G11C29/82
摘要： A device is disclosed for storing mapping information for mapping a logical block address identifying a block being accessed by a host to a physical block address, identifying a free area of nonvolatile memory, the block being selectively erasable and having one or more sectors that may be individually moved. The mapping information including a virtual physical block address for identifying an “original” location, within the nonvolatile memory, wherein a block is stored and a moved virtual physical block address for identifying a “moved” location, within the nonvolatile memory, wherein one or more sectors of the stored block are moved. The mapping information further including status information for use of the “original” physical block address and the “moved” physical block address and for providing information regarding “moved” sectors within the block being accessed.
摘要翻译：公开了一种用于存储映射信息的设备，用于将标识由主机正在被访问的块的逻辑块地址映射到物理块地址，标识非易失性存储器的空闲区域，该块被选择性地可擦除并具有一个或多个可能是单独移动所述映射信息包括用于识别所述非易失性存储器内的“原始”位置的虚拟物理块地址，其中存储块，以及移动的虚拟物理块地址，用于识别所述非易失性存储器内的“移动”位置，其中，存储块的更多扇区被移动。映射信息还包括使用“原始”物理块地址和“移动”物理块地址的状态信息，并且用于提供关于被访问的块内的“移动”扇区的信息。

10. 发明授权

US07469467B2 Method of manufacturing a perpendicular write head 失效
标题翻译：制造垂直写头的方法
公开(公告)号：US07469467B2
公开(公告)日：2008-12-30
申请号：US11195532
申请日：2005-08-01
申请人： Yunxiao Gao , Hung-Chin Guthrie , Ming Jiang , Sue Siyang Zhang
发明人： Yunxiao Gao , Hung-Chin Guthrie , Ming Jiang , Sue Siyang Zhang
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11B5/1871 , G11B5/1278 , G11B5/3163 , Y10T29/49041 , Y10T29/49043 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052
摘要： A perpendicular write head includes a main pole comprising a Durimide/Alumina hard mask formed over a laminate layer process to form the main pole without using a liftoff or chemical mechanical polishing process, thereby avoiding rounding corners of the pole, the main pole being controlled in shape for improved control of critical dimension of track width and angle of the bevel to avoid undesirable adjacent track writing.
摘要翻译：垂直写头包括主极，其包括形成在层压层工艺上的Durimide /氧化铝硬掩模，以形成主极，而不使用剥离或化学机械抛光工艺，从而避免极的圆角，主极被控制在形状，用于改善斜面的轨道宽度和角度的临界尺寸的控制，以避免不期望的相邻轨道写入。

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