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1. 发明申请

WO2006121455A1 DYNAMIC SIGNAL PROCESSING 审中-公开
标题翻译：动态信号处理
公开(公告)号：WO2006121455A1
公开(公告)日：2006-11-16
申请号：PCT/US2005/027562
申请日：2005-08-02
申请人： THE SALK INSTITUTE FOR BIOLOGICAL STUDIES , LOW, Philip, S. , SEJNOWSKI, Terrence, J.
发明人： LOW, Philip, S. , SEJNOWSKI, Terrence, J.
IPC分类号： G06F7/06
CPC分类号： G06K9/00536 , A61B5/048 , A61B5/4812 , A61B5/4815 , A61B5/7203 , A61B5/726 , A61B5/7264 , A61B5/7267
摘要： Technologies presented can determine low power frequency range information from spectral data. Raw signal data can be adjusted to increase dynamic range for power within low power frequency ranges as compared to higher-power frequency ranges to determine adjusted source data valuable for acquiring low power frequency range information. Low power frequency range information can be used in the analysis of a variety of raw signal data. For example, low power frequency range information within electroencephalography data for a subject from a period of sleep can be used to determine sleep states. Similarly, automated full-frequency spectral electroencephalography signal analysis can be useful for customized analysis including assessing sleep quality, detecting pathological conditions, and determining the effect of medication on sleep states.
摘要翻译：所提出的技术可以从光谱数据确定低功率频率范围信息。与较高功率频率范围相比，可以调整原始信号数据以增加低功率频率范围内的功率的动态范围，以确定用于获取低功率频率范围信息的有价值的调整的源数据。低功率频率范围信息可用于分析各种原始信号数据。例如，可以使用从睡眠期间的对象的脑电图数据内的低功率频率范围信息来确定睡眠状态。类似地，自动全频谱脑电图信号分析可用于定制分析，包括评估睡眠质量，检测病理状况以及确定药物对睡眠状态的影响。

2. 发明申请

WO2006063297A1 PCI EXPRESS TO ADVANCED SWITCHING FABRIC INTERFACE 审中-公开
标题翻译： PCI EXPRESS到高级开关织物界面
公开(公告)号：WO2006063297A1
公开(公告)日：2006-06-15
申请号：PCT/US2005/044748
申请日：2005-12-09
申请人： INTEL CORPORATION , CHAPPELL, Christopher , MITCHELL, James
发明人： CHAPPELL, Christopher , MITCHELL, James
IPC分类号： G06F13/40
CPC分类号： G06F13/4027
摘要： Methods and apparatus, including computer program products, implementing techniques for forming an Advanced Switching (AS) packet by applying AS path binding information to a packet received over a Peripheral Component Interconnect-Express (PCIe) fabric according to a downstream port identifier associated with the packet, and sending the AS packet to an AS fabric. Methods and apparatus, including computer program products, implementing techniques for processing an AS packet received over an AS fabric by comparing an AS payload of the AS packet with one or more memory spaces associated with port identifiers, determining whether the AS payload comprises a base packet to be transmitted to the PCIe fabric based on the comparison, and if so, removing an AS header from the AS packet to reveal the base packet.
摘要翻译：方法和装置，包括计算机程序产品，通过将AS路径绑定信息应用于通过外围组件互连Express（PCIe）结构接收的分组，根据与所述外部组件互连 - 快速（PCIe）结构相关联的下游端口标识符来形成高级交换（AS）分组的实现技术分组，并将AS数据包发送到AS架构。方法和装置，包括计算机程序产品，通过将AS分组的AS有效载荷与与端口标识符相关联的一个或多个存储空间进行比较来确定AS有效载荷是否包括基本分组基于比较将其发送到PCIe结构，如果是，则从AS分组中去除AS报头以显示基本分组。

3. 发明申请

WO2005066804A3 VIRTUAL TO PHYSICAL ADDRESS TRANSLATION 审中-公开
公开(公告)号：WO2005066804A3
公开(公告)日：2005-07-21
申请号：PCT/US2004/043400
申请日：2004-12-24
申请人： INTEL CORPORATION , MCALPINE, Gary , MINTURN, Dave , REGNIER, Greg , BERRY, Frank
发明人： MCALPINE, Gary , MINTURN, Dave , REGNIER, Greg , BERRY, Frank
IPC分类号： G06F12/14 , G06F12/10 , G06F12/02
摘要： A virtual to physical address translator in which a requesting process supplements a virtual memory address with a shortcut to a physical address associated with one level of a multi-level virtual address translation table. A second process, such as an I/0 process, receives the shortcut and the virtual address and uses an address translator to determine the physical address. In some implementations, the shortcut may be made opaque to the requesting process such that the requesting process cannot determine the physical address represented in the shortcut.

4. 发明申请

WO2005036274A3 OPTICAL LITHOGRAPHY METHOD FOR PATTERNING LINES OF EQUAL WIDTH 审中-公开
公开(公告)号：WO2005036274A3
公开(公告)日：2005-04-21
申请号：PCT/US2004/033070
申请日：2004-10-06
申请人： INTEL CORPORATION
发明人： BORODOVSKY, Yan
IPC分类号： G03F7/20
摘要： A composite patterning technique may include two lithography processes. A first lithography process may use interference lithography to form a continuous pattern of lines of substantially equal width on a photoresist. A second lithography process may use one or more non-interference lithography techniques, such as optical lithography, imprint lithography and electron-beam lithography, to break continuity of the patterned lines and form desired integrated circuit features.

5. 发明申请

WO2004095291A3 CACHE ALLOCATION UPON DATA PLACEMENT IN NETWORK INTERFACE 审中-公开
公开(公告)号：WO2004095291A3
公开(公告)日：2004-11-04
申请号：PCT/US2004/007655
申请日：2004-03-12
申请人： INTEL CORPORATION
发明人： NARAD, Charles
IPC分类号： G06F12/08
摘要： Cache allocation includes a cache memory and a cache management mechanism configured to allow an external agent to request data be placed into the cache memory and to allow a processor to cause data to be pulled into the cache memory.

6. 发明申请

WO2008011264A2 REMOTE NON-LINEARITY DETECTION VIA BURST POWER DITHERING 审中-公开
标题翻译：远程非线性检测通过BURST功率切换
公开(公告)号：WO2008011264A2
公开(公告)日：2008-01-24
申请号：PCT/US2007/072605
申请日：2007-06-29
申请人： VIASAT, INC. , MILLER, Mark, J. , DAS, Aniruddha , FITTING, Robert, A.
发明人： MILLER, Mark, J. , DAS, Aniruddha , FITTING, Robert, A.
IPC分类号： H04L25/34
CPC分类号： H03F1/32 , H03F3/19 , H04B17/24 , H04B17/336 , H04L1/20 , H04L27/368 , H04W52/04 , H04W52/08
摘要： Nonlinearity characterization that transmits bursts of information where symbols vary by a value Delta. The bursts can be bursts of a constant power, followed by another burst of a different constant power. An alternative burst system uses interleaved power symbols, where some symbols in a single burst are at the first power and others are at the second power. The signal-to-noise ratio of the two groups of symbols is estimated, and the difference is used to determine whether or not to reduce the amount of saturation in the transmitter.
摘要翻译：发送信号突发的非线性表征，其中符号变化值Delta。脉冲串可以是恒定功率的脉冲串，随后是不同恒定功率的另一脉冲串。替代突发系统使用交错功率符号，其中单个脉冲串中的一些符号处于第一功率，而另一个符号处于第二功率。估计两组符号的信噪比，并且使用该差来确定是否减少发射机中的饱和量。

7. 发明申请

WO2006121739A3 SIMULATING MULTIPLE VIRTUAL CHANNELS IN SWITCHED FABRIC NETWORKS FOR CHIPSETS WHICH SUPPORT ONLY ONE CHANNEL 审中-公开
公开(公告)号：WO2006121739A3
公开(公告)日：2006-11-16
申请号：PCT/US2006/017050
申请日：2006-05-02
申请人： INTEL CORPORATION , SULLIVAN, Mark
发明人： SULLIVAN, Mark
IPC分类号： G06F13/10 , H04L12/56
摘要： Methods and systems, including computer program products, implementing techniques for receiving, at a first device of a switched fabric network, requests from one or more applications, each request being destined for a second device of the network, the first device being connected to the second device by a virtual channel; generating, for each request, a descriptor comprising a traffic class designation; and adding the descriptor to an ordered list of descriptors, the descriptor having a location in the ordered list that is based on the traffic class designation of the descriptor.

8. 发明申请

WO2006072060A3 ARBITRATING VIRTUAL CHANNEL TRANSMIT QUEUES IN A SWITCHED FABRIC NETWORK 审中-公开
公开(公告)号：WO2006072060A3
公开(公告)日：2006-07-06
申请号：PCT/US2005/047591
申请日：2005-12-27
申请人： INTEL CORPORATION , ZHONG, Tina , MITCHELL, James
发明人： ZHONG, Tina , MITCHELL, James
IPC分类号： H04L12/56 , G06F13/40
摘要： A device in an Advanced Switching AS fabric (100) may include an event dispatch unit for generating event packets to be sent over the fabric to event handling agents. The AS device may arbitrate between different packets for the resources of a particular Virtual Channel VC. The AS device may arbitrate between packets from different VCs downstream in the AS transaction layer while giving preference to high priority packets.

9. 发明申请

WO2006019617A1 ALIGNMENT USING LATENT IMAGES 审中-公开
标题翻译：使用专利图像对齐
公开(公告)号：WO2006019617A1
公开(公告)日：2006-02-23
申请号：PCT/US2005/024274
申请日：2005-07-08
申请人： INTEL CORPORATION , BORODOVSKY, Yan , GRODNENSKY, Ilya
发明人： BORODOVSKY, Yan , GRODNENSKY, Ilya
IPC分类号： G03F9/00 , G03F7/20
CPC分类号： G03F7/70633 , G03F9/7084
摘要： Systems and techniques for alignment with latent images. In one implementation, a method includes detecting a location of a latent image on a substrate, repositioning the substrate based on the detected location of the latent image, and patterning the substrate.
摘要翻译：与潜像对齐的系统和技术。在一个实施方案中，一种方法包括检测底物上的潜像的位置，基于检测到的潜像的位置重新定位衬底，以及图案化衬底。

10. 发明申请

WO2006011942A1 ANGLED ELONGATED FEATURES FOR IMPROVED ALIGNMENT PROCESS INTEGRATION 审中-公开
标题翻译：改进的对齐过程集成的特征
公开(公告)号：WO2006011942A1
公开(公告)日：2006-02-02
申请号：PCT/US2005/019723
申请日：2005-06-03
申请人： INTEL CORPORATION , HUGGINS, Kevin
发明人： HUGGINS, Kevin
IPC分类号： H01L23/544
CPC分类号： H01L23/544 , H01L21/3212 , H01L23/585 , H01L2223/54453 , H01L2924/0002 , Y10T29/41 , H01L2924/00
摘要： Elongated features may be incorporated at least partially in an alignment region. The alignment region may be defined by a plurality of alignment features aligned along a first axis. A long axis of the elongated features may be neither parallel nor perpendicular to the first axis. The alignment features aligned a second axis that is not parallel to the first axis. The second axis may be neither parallel to or perpendicular to the long axis.
摘要翻译：细长的特征可以至少部分地并入到对准区域中。对准区域可以由沿着第一轴线对齐的多个对准特征限定。细长特征的长轴既不能平行也不垂直于第一轴。对准特征对准不与第一轴平行的第二轴。第二轴线既不平行于或垂直于长轴线。

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