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1. 发明专利

AU2002348133A1 Stacking multiple devices using direct soldering 未知
公开(公告)号：AU2002348133A1
公开(公告)日：2003-05-12
申请号：AU2002348133
申请日：2002-10-31
申请人： VIRTIUM TECHNOLOGY INC
发明人： HOANG PHAN , NGUYEN CHINH , HOANG PHU , LE ANDY
IPC分类号： H01L25/10 , H05K1/14 , H05K3/34 , H05K1/16
摘要： In one embodiment of the invention, a stacking element includes a printed circuit board (PCB) and a plurality of solder bumps. The PCB has a top side and a bottom side. The top side is attached to first pins of a first device. The plurality of solder bumps are on the bottom side and attached to upper areas of second pins of a second device to provide electrical connections between the first pins and the second pins.

2. 发明申请

WO2003038865A3 STACKING MULTIPLE DEVICES USING DIRECT SOLDERING 审中-公开
公开(公告)号：WO2003038865A3
公开(公告)日：2003-05-08
申请号：PCT/US2002/034923
申请日：2002-10-31
申请人： VIRTIUM TECHNOLOGY, INC.
发明人： NGUYEN, Chinh , HOANG, Phu , HOANG, Phan , LE, Andy
IPC分类号： H05K01/16
摘要： In one embodiment of the invention, a stacking element (120k) includes a printed circuit board (PCB) (210) and a plurality of solder bumps (242, 244). The PCB (210) has a top side (213) and a bottom side (215). The top side (213) is attached to first pins of a first device (110k). The plurality of solder bumps (242, 244) are on the bottom side (215) and attached to upper areas of second pins (272, 274) of a second device (110k+1) to provide electrical connections between the first pins and the second pins (272, 274).

3. 发明申请

WO03038865A2 STACKING MULTIPLE DEVICES USING DIRECT SOLDERING 审中-公开
标题翻译：使用直接焊接堆叠多个设备
公开(公告)号：WO03038865A2
公开(公告)日：2003-05-08
申请号：PCT/US0234923
申请日：2002-10-31
申请人： VIRTIUM TECHNOLOGY INC
发明人： NGUYEN CHINH , HOANG PHU , HOANG PHAN , LE ANDY
IPC分类号： H01L25/10 , H05K1/14 , H05K3/34 , H01L
CPC分类号： H05K1/141 , H01L25/105 , H01L2225/107 , H01L2924/0002 , H05K1/144 , H05K3/3421 , H05K3/3463 , H05K2201/0367 , H05K2201/10477 , H05K2201/10515 , H05K2201/10689 , H05K2201/10992 , H05K2203/043 , Y10T29/49144 , Y10T29/49147 , H01L2924/00
摘要： In one embodiment of the invention, a stacking element includes a printed circuit board (PCB) and a plurality of solder bumps. The PCB has a top side and a bottom side. The top side is attached to first pins of a first device. The plurality of solder bumps are on the bottom side and attached to upper areas of second pins of a second device to provide electrical connections between the first pins and the second pins.
摘要翻译：在本发明的一个实施例中，堆叠元件包括印刷电路板（PCB）和多个焊料凸块。 PCB具有顶侧和底侧。顶侧连接到第一设备的第一个引脚。多个焊料凸块位于底侧，并附接到第二器件的第二引脚的上部区域，以提供第一引脚和第二引脚之间的电连接。

4. 发明专利

TW577162B 堆疊元件、堆疊方法及其模組有权
简体标题：堆栈组件、堆栈方法及其模块
公开(公告)号：TW577162B
公开(公告)日：2004-02-21
申请号：TW091124314
申请日：2002-10-22
申请人：佛爾提姆科技股份有限公司 VIRTIUM TECHNOLOGY, INC.
发明人：安格恩清 CHINH NGUYEN , 黃福 PHU HOANG , 黃凡 PHAN HOANG , 李安迪 ANDY LE
IPC分类号： H01L
CPC分类号： H05K1/141 , H01L25/105 , H01L2225/107 , H01L2924/0002 , H05K1/144 , H05K3/3421 , H05K3/3463 , H05K2201/0367 , H05K2201/10477 , H05K2201/10515 , H05K2201/10689 , H05K2201/10992 , H05K2203/043 , Y10T29/49144 , Y10T29/49147 , H01L2924/00
摘要：於本發明之一實施例中，一堆疊元件(stacking element)包括一印刷電路板(PCB)及複數個銲料凸塊(solder bumps)。上述PCB具有一頂部及一底部。上述頂部附著到一第一裝置(device)之第一腳位(pins)。上述複數個銲料凸塊位於上述底部並附著到一第二裝置之第二腳位的上面以提供上述第一腳位與上述第二腳位之間的電性連結。伍、(一)、本案代表圖為：第＿＿＿1＿＿＿＿圖
(二)、本案代表圖之元件代表符號簡單說明：105 模組1101IC 裝置1201 堆疊元件1102IC 裝置1202 堆疊元件120N-1 堆疊元件110NIC 裝置130 母板
简体摘要：于本发明之一实施例中，一堆栈组件(stacking element)包括一印刷电路板(PCB)及复数个焊料凸块(solder bumps)。上述PCB具有一顶部及一底部。上述顶部附着到一第一设备(device)之第一脚位(pins)。上述复数个焊料凸块位于上述底部并附着到一第二设备之第二脚位的上面以提供上述第一脚位与上述第二脚位之间的电性链接。伍、(一)、本案代表图为：第＿＿＿1＿＿＿＿图 (二)、本案代表图之组件代表符号简单说明：105 模块1101IC 设备1201 堆栈组件1102IC 设备1202 堆栈组件120N-1 堆栈组件110NIC 设备130 母板

5. 发明公开

EP1459355A2 STACKING MULTIPLE DEVICES USING DIRECT SOLDERING 审中-公开
标题翻译：多个设备BY直接焊接堆栈
公开(公告)号：EP1459355A2
公开(公告)日：2004-09-22
申请号：EP02784352.3
申请日：2002-10-31
申请人： Virtium Technology, Inc.
发明人： NGUYEN, Chinh , HOANG, Phu , HOANG, Phan , LE, Andy
IPC分类号： H01L21/00
CPC分类号： H05K1/141 , H01L25/105 , H01L2225/107 , H01L2924/0002 , H05K1/144 , H05K3/3421 , H05K3/3463 , H05K2201/0367 , H05K2201/10477 , H05K2201/10515 , H05K2201/10689 , H05K2201/10992 , H05K2203/043 , Y10T29/49144 , Y10T29/49147 , H01L2924/00
摘要： In one embodiment of the invention, a stacking element (120k) includes a printed circuit board (PCB) (210) and a plurality of solder bumps (242, 244). The PCB (210) has a top side (213) and a bottom side (215). The top side (213) is attached to first pins of a first device (110k). The plurality of solder bumps (242, 244) are on the bottom side (215) and attached to upper areas of second pins (272, 274) of a second device (110k+1) to provide electrical connections between the first pins and the second pins (272, 274).

6. 发明授权

US08918583B2 Adapting behavior of solid-state drive using real usage model 有权
标题翻译：使用实际使用模型适应固态驱动器的行为
公开(公告)号：US08918583B2
公开(公告)日：2014-12-23
申请号：US13722845
申请日：2012-12-20
申请人： Pho Hoang , Jian Chen
发明人： Pho Hoang , Jian Chen
IPC分类号： G06F12/02 , G06F11/34
CPC分类号： G06F12/0246 , G06F1/26 , G06F11/3409 , G06F11/3447 , G06F2212/214 , G11C16/22 , G11C16/349
摘要： An embodiment is a technique to adapt behavior of a solid-state drive (SSD) to extend lifespan of the SSD. Real environmental information is received from an environmental processor. The real environmental information corresponds to an environment of the SSD. A behavior model is selected based on a real environmental model and an internal data usage model. If a new behavior model is selected, the environmental processor is informed about the new behavior model. The environmental processor sends control commands to a power management module to apply new power policy to the SSD. Information on the new behavior model is made available for query. If current behavior model is selected, the current behavior model is maintained.
摘要翻译：一个实施例是一种适应固态驱动器（SSD）的行为以延长SSD的寿命的技术。从环境处理器接收真实的环境信息。真正的环境信息对应于SSD的环境。基于真实环境模型和内部数据使用模型选择行为模型。如果选择了新的行为模型，环境处理器将被通知新的行为模型。环境处理器将控制命令发送到电源管理模块，以将新的电源策略应用于SSD。有关新行为模型的信息可用于查询。如果选择当前行为模型，则维护当前行为模型。

7. 发明申请

US20140172325A1 LIFE MONITORING IN SOLID-STATE DRIVE 审中-公开
标题翻译：在固态驱动下生命监测
公开(公告)号：US20140172325A1
公开(公告)日：2014-06-19
申请号：US13715639
申请日：2012-12-14
申请人： Ashraf M. Naji
发明人： Ashraf M. Naji
IPC分类号： G08B1/08
CPC分类号： G06F11/008 , G06F11/22
摘要： An embodiment is a method and apparatus for a technique to report remaining life information of a non-volatile memory array. Information on expected life of a non-volatile memory array is received from a solid-state drive (SSD) processor. The information is converted into remaining life information according to a pre-defined format. The remaining life information is transmitted to an indicator or a communication device.
摘要翻译：实施例是用于报告非易失性存储器阵列的剩余寿命信息的技术的方法和装置。从固态驱动器（SSD）处理器接收关于非易失性存储器阵列的预期寿命的信息。信息根据预定格式转换为剩余寿命信息。剩余寿命信息被发送到指示器或通信设备。

8. 发明授权

US08124450B2 Stacking multiple devices using single-piece interconnecting element 有权
标题翻译：使用单件互连元件堆叠多个设备
公开(公告)号：US08124450B2
公开(公告)日：2012-02-28
申请号：US12844795
申请日：2010-07-27
申请人： Phan Hoang , Chinh Nguyen , Anthony Tran , Tung Dang
发明人： Phan Hoang , Chinh Nguyen , Anthony Tran , Tung Dang
IPC分类号： H01L21/00
CPC分类号： H01L23/3107 , H01L23/13 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73253 , H01L2225/06572 , H01L2225/107 , H01L2225/1094 , H01L2924/01019 , H01L2924/01087 , H01L2924/09701 , H01L2924/15153 , H01L2924/15159 , H05K1/141 , H05K1/144 , H05K1/182 , H05K3/3436 , H05K2201/049 , H05K2201/09036 , H05K2201/10515 , H05K2201/10674
摘要： An embodiment of the present invention is a technique to stack multiple devices using an interconnecting element. A board has a periphery and top and bottom surfaces. The top surface has top contact pads to attach to a first device. The bottom surface is milled down to form a cavity confined by vertical walls around the periphery. The cavity fits a second device. Bottom contact pads are formed on bottom side of the vertical walls. The bottom contact pads are raised with respect to the bottom side of the vertical walls. Traces internal to the board connect the bottom contact pads to the top contact pads.
摘要翻译：本发明的实施例是使用互连元件堆叠多个设备的技术。电路板具有外围和顶部和底部表面。顶表面具有附接到第一装置的顶部接触垫。底面被铣削以形成围绕周边的垂直壁限定的空腔。该腔适合第二个装置。底部接触垫形成在垂直壁的底侧。底部接触垫相对于垂直壁的底侧升高。电路板内部的跟踪将底部接触焊盘连接到顶部接触焊盘。

9. 发明申请

US20100167557A1 MULTI-FUNCTION MODULE 有权
标题翻译：多功能模块
公开(公告)号：US20100167557A1
公开(公告)日：2010-07-01
申请号：US12345536
申请日：2008-12-29
申请人： Phan Hoang
发明人： Phan Hoang
IPC分类号： H01R12/00 , G06F17/50
CPC分类号： H05K1/117 , H05K2201/09954 , H05K2201/10159 , Y10S439/951 , Y10T29/49117 , Y10T29/4913 , Y10T29/49137 , Y10T29/49204
摘要： An embodiment is a method and apparatus to provide a multi-function module. A circuit board has a form factor and a connector edge corresponding to a first interface standard. The connector edge includes first and second groups of pin-outs that are mapped to pin-out assignments compatible with the first interface standard and a second interface standard, respectively. A first interface is provided on the circuit board for a first set of devices connected to the first group of pin-outs to operate according to the first interface standard. A second interface is provided on the circuit board for a second set of devices connected to the second group of pin-outs to operate according to the second interface standard.
摘要翻译：实施例是提供多功能模块的方法和装置。电路板具有对应于第一接口标准的外形尺寸和连接器边缘。连接器边缘包括分别映射到与第一接口标准兼容的引脚分配和第二接口标准的第一组和第二组引脚。在电路板上提供第一接口，用于连接到第一组引脚组的第一组设备，以根据第一接口标准进行操作。在电路板上提供第二接口，用于连接到第二组引脚组的第二组设备，以根据第二接口标准进行操作。

10. 发明申请

US20150317083A1 Synergetic deduplication 审中-公开
标题翻译：协同重复数据删除
公开(公告)号：US20150317083A1
公开(公告)日：2015-11-05
申请号：US14269203
申请日：2014-05-05
申请人： Lan Dinh Phan , Virtium Technology, Inc.
发明人： Lan Dinh Phan
IPC分类号： G06F3/06
CPC分类号： G06F3/0679 , G06F3/0608 , G06F3/0641
摘要： Flash memory devices can be implemented with deduplication mechanism through a synergetic deduplication mapping that combines the logical-to-physical address mapping of the flash memory devices with the deduplication mapping. A deduplication algorithm can be implemented in the application layer, which can freely communicate with the flash memory devices and perform computationally expensive operations.
摘要翻译：闪存设备可以通过协同重复数据删除映射实现重复数据删除机制，该映射将闪存设备的逻辑到物理地址映射与重复数据删除映射相结合。重复数据删除算法可以在应用层中实现，其可以与闪存设备自由地通信并且执行计算上昂贵的操作。

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