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    • 6. 发明申请
    • METHOD AND CIRCUIT FOR THE CAPTURE OF VIDEO DATA IN A PC
    • 用于在PC中捕获视频数据的方法和电路
    • WO9918714A9
    • 1999-10-07
    • PCT/US9820907
    • 1998-10-05
    • SIGMA DESIGNS INC
    • XIAOPING HU
    • G06T11/00
    • G06T11/001
    • A method and system for capturing live video signal data using bufferless data compression are disclosed. Live video signal data is vertically scaled. A 4:2:2 to 4:2:0 color format conversion is performed simultaneous with the vertical scaling step. A one-dimensional bufferless discrete cosine transform is performed on the scaled live video signal data to create a plurality of scaled DCT coefficients. Each of the plurality of scaled DCT coefficients is then Huffman coded. Each of the Huffman encoded DCT coefficients may then be sent via a USB interface to a USB bus.
    • 公开了一种使用无缓冲数据压缩捕获实时视频信号数据的方法和系统。 实时视频信号数据是垂直缩放的。 与垂直缩放步骤同时执行4:2:2至4:2:0颜色格式转换。 对缩放的实时视频信号数据执行一维无缓冲离散余弦变换,以产生多个缩放的DCT系数。 然后对多个缩放的DCT系数中的每一个进行霍夫曼编码。 然后可以将霍夫曼编码的DCT系数中的每一个经由USB接口发送到USB总线。
    • 9. 发明申请
    • COPROCESSOR DEVICES SIMULATING MEMORY INTERFACES
    • 共模器件模拟存储器接口
    • WO1996024901A1
    • 1996-08-15
    • PCT/US1996001389
    • 1996-02-05
    • SIGMA DESIGNS, INC.NGUYEN, Julien, T.
    • SIGMA DESIGNS, INC.
    • G06F15/00
    • G06F9/3879
    • A method and system for coupling a coprocessor (220) to a master device, in which the coprocessor (220) emulates a memory interface to the master device, like that of a memory device. The coprocessor (220) is coupled to a memory bus (212) and receives memory accesses directed to a set of addresses not covered by memory devices also coupled to the memory bus (212). The coprocessor (220) is disposed to receive data written from the master device, perform a function on that data, and respond to a read data command from the master device with processing results. The coprocessor (220) uses memory block transfers to read data from and write data to memory devices also coupled to the memory bus (212). The coprocessor (220) is adapted to compute, in response to data written to it by the graphics processor, a graphical function such as 3D processing function, MPEG video compression or decompression, a raytracing function, or some related function in support of graphics processing. The coprocessor (220) may communicate with the central processor (201) and its memory (202) using a memory access operation performed by the central processor (201), and may communicate with the graphics memory (211) using a memory block transfer performed by the graphics processor (210).
    • 一种用于将协处理器(220)耦合到主设备的方法和系统,其中协处理器(220)模拟到主设备的存储器接口,如存储器设备的存储器接口。 协处理器(220)耦合到存储器总线(212)并且接收定向到还被耦合到存储器总线(212)的存储器设备未覆盖的一组地址的存储器访问。 协处理器(220)被设置为接收从主设备写入的数据,执行关于该数据的功能,并且响应来自具有处理结果的主设备的读取数据命令。 协处理器(220)使用存储器块传送来从也存储器总线(212)耦合的存储器件读取数据并写入数据。 协处理器(220)适于响应于由图形处理器向其写入的数据来计算诸如3D处理功能,MPEG视频压缩或解压缩之类的图形功能,光线跟踪功能或支持图形处理的一些相关功能 。 协处理器(220)可以使用由中央处理器(201)执行的存储器访问操作与中央处理器(201)及其存储器(202)通信,并且可以使用执行的存储器块传送与图形存储器(211)通信 由图形处理器(210)。