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1. 发明申请

WO2008148087A1 METHOD AND APPARATUS FOR COOLING COMPUTER MEMORY 审中-公开
标题翻译：用于冷却计算机存储器的方法和装置
公开(公告)号：WO2008148087A1
公开(公告)日：2008-12-04
申请号：PCT/US2008/064870
申请日：2008-05-27
申请人： OCZ TECHNOLOGY GROUP, INC. , MONH, Mohasit , PETERSEN, Ryan
发明人： MONH, Mohasit , PETERSEN, Ryan
IPC分类号： G06F1/20
CPC分类号： H01L23/427 , F28D15/0266 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus (10) for cooling chips (21 ) on a computer memory module (20). The apparatus (10) includes a primary and secondary heat spreaders (12,14), at least a first heatpipe (16,18) coupled to the primary heat spreader (12) and having a remote portion (16B,18B) spaced apart from the primary heat spreader (12) and thermally contacting the secondary heat spreader (14), and a coolant within the first heatpipe (16,18) and the primary heat spreader (12) so as to absorb heat from the primary heat spreader (12) and conduct the heat to the secondary heat spreader (14). The primary heat spreader (12) has at least two panels (24) configured to engage the memory module (20) therebetween, with facing contact surfaces (26) of the panels (24) adapted for thermal contact with the module chips (21 ). The secondary heat spreader (14) is configured to increase surface dissipation of heat from the first heatpipe (16,18) into the environment. The coolant has a boiling point at or below a maximum preselected operating temperature of the module chips (21 ).
摘要翻译：一种用于在计算机存储器模块（20）上冷却芯片（21）的方法和装置（10）。装置（10）包括主和辅助散热器（12,14），至少第一热管（16,18），其连接到主散热器（12）并具有与第一散热器（12）隔开的远程部分（16B，18B）第一散热器（12）和热接触二次散热器（14），以及第一热管（16,18）和主散热器（12）内的冷却剂，以便从主散热器（12）吸收热量）并将热量传导到二次散热器（14）。主散热器（12）具有至少两个配置成与其间的存储器模块（20）接合的面板（24），其具有适于与模块芯片（21）热接触的面板（24）的面对的接触表面（26）。辅助散热器（14）被配置成增加来自第一热管（16,18）的热量到环境中的表面散热。冷却剂具有等于或低于模块芯片（21）的最大预选工作温度的沸点。

2. 发明公开

EP1600844A3 Method and apparatus for increasing computer memory performance 审中-公开
标题翻译：用于增加计算机存储器的性能的方法和装置
公开(公告)号：EP1600844A3
公开(公告)日：2008-06-18
申请号：EP05252870.0
申请日：2005-05-10
申请人： OCZ Technology Group, INC.
发明人： Retersen, Ryan M , Nelson, Eric L
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G11C5/04 , G11C5/147
摘要： A method and apparatus (10,18) for providing increased power to a memory array of a computer's memory subsystem, and more particularly power at a level greater than that available through the computer motherboard, so as to boost memory performance and operational stability. The apparatus (10,18) includes a supply means (10) for supplying an input voltage to the memory subsystem at a level that is higher than the power level provided to the memory subsystem by the motherboard. The method entails electrically connecting the supply means (10) to the memory subsystem and then electrically connecting a power source to the means (10) to deliver the input voltage to the memory subsystem. The additional input voltage supplied to the memory subsystem causes memory chips on memory modules of the memory subsystem to run at higher frequencies, such that the various internal operations of the memory, such as reading and writing, occur more quickly.

3. 发明公开

EP1600844A2 Method and apparatus for increasing computer memory performance 审中-公开
标题翻译： Verfahren und Vorrichtung zur Steigerung der Leistung des Rechnerspeichers
公开(公告)号：EP1600844A2
公开(公告)日：2005-11-30
申请号：EP05252870.0
申请日：2005-05-10
申请人： OCZ Technology Group, INC.
发明人： Retersen, Ryan M , Nelson, Eric L
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G11C5/04 , G11C5/147
摘要： A method and apparatus (10,18) for providing increased power to a memory array of a computer's memory subsystem, and more particularly power at a level greater than that available through the computer motherboard, so as to boost memory performance and operational stability. The apparatus (10,18) includes a supply means (10) for supplying an input voltage to the memory subsystem at a level that is higher than the power level provided to the memory subsystem by the motherboard. The method entails electrically connecting the supply means (10) to the memory subsystem and then electrically connecting a power source to the means (10) to deliver the input voltage to the memory subsystem. The additional input voltage supplied to the memory subsystem causes memory chips on memory modules of the memory subsystem to run at higher frequencies, such that the various internal operations of the memory, such as reading and writing, occur more quickly.
摘要翻译：一种用于向计算机的存储器子系统的存储器阵列提供增加的功率的方法和装置（10,18），并且更具体地说，其功率大于通过计算机主板可用的电平，从而提高存储器性能和操作稳定性。该装置（10,18）包括供给装置（10），该供给装置（10）以比由主板提供给存储器子系统的功率电平高的级别向存储器子系统提供输入电压。该方法需要将供应装置（10）电连接到存储器子系统，然后将电源电连接到装置（10），以将输入电压输送到存储器子系统。提供给存储器子系统的附加输入电压使得存储器子系统的存储器模块上的存储器芯片以更高的频率运行，使得诸如读取和写入的存储器的各种内部操作更快地发生。

4. 发明申请

US20140129753A1 INTEGRATED STORAGE/PROCESSING DEVICES, SYSTEMS AND METHODS FOR PERFORMING BIG DATA ANALYTICS 有权
标题翻译：用于执行大数据分析的集成存储/处理设备，系统和方法
公开(公告)号：US20140129753A1
公开(公告)日：2014-05-08
申请号：US13669727
申请日：2012-11-06
申请人： OCZ TECHNOLOGY GROUP INC.
发明人： Franz Michael Schuette , Gary James Calder , Yaron Klein , Stephen Jeffrey Smith
IPC分类号： G06F13/40
CPC分类号： G06F13/4068 , G06F2213/0026
摘要： Architectures and methods for performing big data analytics by providing an integrated storage/processing system containing non-volatile memory devices that form a large, non-volatile memory array and a graphics processing unit (GPU) configured for general purpose (GPGPU) computing. The non-volatile memory array is directly functionally coupled (local) with the GPU and optionally mounted on the same board (on-board) as the GPU.
摘要翻译：提供包含形成大型非易失性存储器阵列的非易失性存储器件的集成存储/处理系统和为通用（GPGPU）计算配置的图形处理单元（GPU），从而进行大数据分析的体系结构和方法。非易失性存储器阵列与GPU直接功能耦合（本地），并且可选地安装在与GPU相同的板（板上）上。

5. 发明授权

US08694754B2 Non-volatile memory-based mass storage devices and methods for writing data thereto 有权
标题翻译：基于非易失性存储器的大容量存储设备和用于向其写入数据的方法
公开(公告)号：US08694754B2
公开(公告)日：2014-04-08
申请号：US13251491
申请日：2011-10-03
申请人： Franz Michael Schuette , William Ward Clawson
发明人： Franz Michael Schuette , William Ward Clawson
IPC分类号： G06F12/00 , G11C16/10
CPC分类号： G06F3/0679 , G06F3/0616 , G06F3/0619 , G06F3/0629 , G06F3/064 , G06F3/0688 , G06F12/0246 , G06F2212/7201 , G06F2212/7202 , G06F2212/7204 , G11C16/349
摘要： A non-volatile solid state memory-based mass storage device having at least one non-volatile memory component and methods of operating the storage device. In one aspect of the invention, the one or more memory components define a memory space partitioned into user memory and over-provisioning pools based on a P/E cycle count stored in a block information record. The storage device transfers the P/E cycle count of erased blocks to a host and the host stores the P/E cycle count in a content addressable memory. During a host write to the storage device, the host issues a low P/E cycle count number as a primary address to the content addressable memory, which returns available block addresses of blocks within the over-provisioning pool as a first dimension in a multidimensional address space. Changed files are preferably updated in append mode and the previous version can be maintained for version control.
摘要翻译：一种具有至少一个非易失性存储器组件的非易失性固态存储器大容量存储设备和操作该存储设备的方法。在本发明的一个方面，一个或多个存储器组件基于存储在块信息记录中的P / E周期计数来定义划分成用户存储器和过度供应池的存储器空间。存储设备将擦除块的P / E周期计数传送到主机，并且主机将P / E周期计数存储在内容可寻址存储器中。在主机向存储设备写入期间，主机发出低的P / E周期计数作为主地址到内容可寻址存储器，该内存可寻址存储器返回过配置池内的块的可用块地址作为多维度中的第一维度地址空间。更改的文件优选以附加模式更新，并且可以维护先前版本以进行版本控制。

6. 发明申请

US20140029341A1 NON-VOLATILE SOLID STATE MEMORY-BASED MASS STORAGE DEVICE AND METHODS THEREOF 有权
标题翻译：非易失性固态存储器存储器件及其方法
公开(公告)号：US20140029341A1
公开(公告)日：2014-01-30
申请号：US13558830
申请日：2012-07-26
申请人： Ji-hyun In
发明人： Ji-hyun In
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G06F12/0246 , G06F2212/1016 , G06F2212/7202 , G06F2212/7208
摘要： Non-volatile solid state mass storage device and methods for improving write performance thereof. The storage device includes a NAND flash controller, an array of NAND flash memory integrated circuits, and means for determining a lowest unused page number of each write target block in a group of the NAND flash memory integrated circuits that are simultaneously accessible at any given time by a write command. The storage device has further means for programming a dummy write to at least a first write target block in a first NAND flash memory integrated circuit within the group of NAND flash memory integrated circuits if the lowest unused page number within the first write target block is lower than the lowest unused page number of a second write target block in a second NAND flash memory integrated circuit in the group of NAND flash memory integrated circuits.
摘要翻译：非易失性固体大容量存储装置及其写入性能的提高方法。存储装置包括NAND闪存控制器，NAND快闪存储器集成电路阵列，以及用于确定在任何给定时间可同时访问的一组NAND闪存集成电路中的每个写入目标块的最低未使用页数的装置通过写命令。存储装置还具有用于在第一写入目标块内的最低未使用页数较低的NAND闪存集成电路组内的第一NAND快闪存储器集成电路中至少对第一写入目标块进行伪写入的装置比NAND闪存集成电路组中的第二NAND闪存集成电路中的第二写入目标块的最低的未使用页数。

7. 发明申请

US20130117744A1 METHODS AND APPARATUS FOR PROVIDING HYPERVISOR-LEVEL ACCELERATION AND VIRTUALIZATION SERVICES 审中-公开
标题翻译：提供高级加速和虚拟化服务的方法和设备
公开(公告)号：US20130117744A1
公开(公告)日：2013-05-09
申请号：US13666305
申请日：2012-11-01
申请人： OCZ Technology Group, Inc.
发明人： Yaron KLEIN , Allon COHEN , Michael Chaim SCHNARCH , Shimon TSALMON , Oded David ILAN
IPC分类号： G06F9/455
CPC分类号： G06F9/45533 , G06F9/45558 , G06F2009/45579
摘要： Systems and methods for maintaining cache synchronization in network of cross-host multi-hypervisor systems, wherein each host has least one virtual server in communication with a virtual disk, an adaptation layer, a cache layer governing a cache and a virtualization and acceleration server to manage volume snapshot, volume replication and synchronization services across the different host sites.
摘要翻译：用于在跨主机多管理程序系统的网络中维持高速缓存同步的系统和方法，其中每个主机具有与虚拟磁盘通信的至少一个虚拟服务器，适配层，控制高速缓存的高速缓存层以及虚拟化和加速服务器管理不同主机站点的卷快照，卷复制和同步服务。

8. 发明申请

US20130024735A1 SOLID-STATE MEMORY-BASED STORAGE METHOD AND DEVICE WITH LOW ERROR RATE 审中-公开
标题翻译：基于固态存储器的存储方法和具有低错误率的器件
公开(公告)号：US20130024735A1
公开(公告)日：2013-01-24
申请号：US13185689
申请日：2011-07-19
申请人： Hyun Mo Chung , Franz Michael Schuette
发明人： Hyun Mo Chung , Franz Michael Schuette
IPC分类号： H03M13/05 , G06F11/10 , G06F11/00
CPC分类号： G06F11/1415 , G06F11/1048 , G06F11/2084
摘要： Non-volatile solid-state memory-based storage devices and methods of operating the storage devices to have low initial error rates. The storage devices and methods use bit error rate comparison of duplicate writes to one or more non-volatile memory devices. The data set with a lower bit error rate as determined during verification is maintained, whereas data sets with higher bit error rates are discarded. A threshold of bit error rates can be used to trigger the duplication of data for bit error comparison.
摘要翻译：基于非易失性固态存储器的存储设备和操作存储设备以具有低初始错误率的方法。存储设备和方法使用对一个或多个非易失性存储器件的重复写入的误码率比较。保持在验证期间确定的具有较低误码率的数据集，而丢弃具有较高误码率的数据集。可以使用误码率的阈值来触发用于位错误比较的数据的复制。

9. 发明授权

US08331123B2 High performance solid-state drives and methods therefor 有权
标题翻译：高性能固态硬盘及其方法
公开(公告)号：US08331123B2
公开(公告)日：2012-12-11
申请号：US12886771
申请日：2010-09-21
申请人： Franz Michael Schuette
发明人： Franz Michael Schuette
IPC分类号： G11C5/06
CPC分类号： G06F3/0658 , G06F3/0611 , G06F3/0688
摘要： A nonvolatile storage device adapted for use with computers, workstations and other processing apparatuses. The storage device includes a printed circuit board, a nonvolatile memory array comprising at least two sub-arrays that contain nonvolatile solid-state memory devices, and control circuitry for interfacing with the processing apparatus. The control circuitry includes an abstraction layer and at least two memory control units configured to communicate data, address and control signals with the sub-arrays of the memory devices. A bus connects each memory control unit to a corresponding one of the sub-arrays. The control circuitry further includes a crossbar switch that functionally connects each memory control unit to the abstraction layer. The storage device is capable of overcoming limitations of current SSD designs by enabling independent read and write transfers (accesses) to the memory devices of the storage device, including concurrent read and write accesses.
摘要翻译：适用于计算机，工作站和其他处理装置的非易失性存储装置。存储装置包括印刷电路板，包括至少两个包含非易失性固态存储器件的子阵列的非易失性存储器阵列，以及用于与处理装置接口的控制电路。控制电路包括抽象层和至少两个存储器控制单元，其被配置为与存储器件的子阵列通信数据，地址和控制信号。总线将每个存储器控制单元连接到相应的一个子阵列。所述控制电路还包括功能性地将每个存储器控制单元连接到所述抽象层的交叉开关。存储设备能够通过对存储设备的存储设备进行独立的读和写传输（访问）来克服当前SSD设计的限制，包括并发读取和写入访问。

10. 发明申请

US20120170210A1 MOUNTING STRUCTURE AND METHOD FOR DISSIPATING HEAT FROM A COMPUTER EXPANSION CARD 有权
标题翻译：用于从计算机扩展卡中分离热量的安装结构和方法
公开(公告)号：US20120170210A1
公开(公告)日：2012-07-05
申请号：US13339413
申请日：2011-12-29
申请人： Dokyun Kim , Karl Reinke
发明人： Dokyun Kim , Karl Reinke
IPC分类号： G06F1/20 , B23P21/00 , F28F7/00
CPC分类号： G06F1/20 , F28D15/02 , G06F1/185 , G06F2200/201 , H01L23/427 , H01L2924/0002 , H05K5/0213 , H05K7/1417 , Y10T29/49002 , Y10T29/49004 , Y10T29/49826 , H01L2924/00
摘要： A mounting structure adapted for mounting an expansion card within a computer enclosure and configured to directly absorb and conduct heat from a heat source (such as an IC chip) on the card to the ambient atmosphere surrounding the enclosure. The mounting structure includes a mounting bracket, a heat sink adapted to contact a surface of the heat source on the expansion card, an extension interconnecting the heat sink and the mounting bracket, one or more features for conducting heat from the heat sink to the mounting bracket, and one or more features associated with the mounting bracket for dissipating heat from the mounting structure to the ambient atmosphere surrounding the enclosure.
摘要翻译：一种安装结构，其适于将扩展卡安装在计算机外壳内并且被配置为直接吸收并将热量从卡上的热源（例如IC芯片）传导到围绕外壳的环境大气。安装结构包括安装支架，适于接触膨胀卡上的热源的表面的散热器，将散热器和安装支架相互连接的延伸件，用于将热量从散热器传导到安装件的一个或多个特征支架和与安装支架相关联的一个或多个特征，用于将热量从安装结构散发到围绕外壳的周围环境。

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