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1. 发明专利

JP2012191209A Semiconductor housing and manufacturing method of the same 有权
标题翻译：其半导体器件及其制造方法
公开(公告)号：JP2012191209A
公开(公告)日：2012-10-04
申请号：JP2012050854
申请日：2012-03-07
申请人： Micronas Gmbh , マイクロナスゲーエムベーハーMicronas GmbH
发明人： TOBIAS KOLLETH , CHRISTIAN JOOS , PASCAL STUMPF
IPC分类号： H01L23/28 , G01L19/14 , H01L23/02 , H01L23/50 , H01L29/84
CPC分类号： H01L21/563 , H01L23/16 , H01L23/3107 , H01L24/48 , H01L2224/05554 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2924/00014 , H01L2924/1461 , H01L2924/181 , H01L2924/1815 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To provide a device and a method for improving conventional technologies.SOLUTION: A plastic member (30) is higher than a wall (110) at an exterior region of an opening (20) in a vertical vector direction on an upper surface of a semiconductor body (80) and a fixing layer (105) is formed between a base surface of the wall (110) and the upper side of the semiconductor body (80). The wall (110) is spaced away from a sensor surface formed in the opening (20).
摘要翻译：要解决的问题：提供用于改进常规技术的装置和方法。解决方案：在半导体主体（80）的上表面上的垂直向量方向上的开口（20）的外部区域处的塑料构件（30）高于壁（110）和固定层（ 105）形成在壁（110）的基面和半导体本体（80）的上侧之间。壁（110）与形成在开口（20）中的传感器表面间隔开。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2012015516A Bonding contact on semiconductor substrate 有权
标题翻译：在半导体基板上接触接触
公开(公告)号：JP2012015516A
公开(公告)日：2012-01-19
申请号：JP2011145282
申请日：2011-06-30
申请人： Micronas Gmbh , ミクロナスゲゼルシャフトミットベシュレンクテルハフツングMicronas GmbH
发明人： HANS-GUNTER ZIMMER , PASCAL STUMPF
IPC分类号： H01L21/60 , H01L21/3205 , H01L23/52
CPC分类号： H01L23/522 , H01L24/05 , H01L2224/02166 , H01L2224/04042 , H01L2224/05093 , H01L2224/05095 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/45147 , H01L2224/48624 , H01L2924/00014 , H01L2924/00015 , H01L2924/01004 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2224/48824 , H01L2924/00 , H01L2224/45144
摘要： PROBLEM TO BE SOLVED: To provide a bonding contact with high reliability in compatibility especially with copper bonding.SOLUTION: A bonding contact, which is on a semiconductor substrate and has a reinforcement structure body, includes: at least one first metal layer disposed on the semiconductor substrate; and a third metal layer disposed above the first metal layer. In the first metal layer, a reinforcement structure body with a pattern is stored. The third metal layer is a bonding contact layer with a bonding face. Further, an insulation layer is disposed below the bonding face and above the first metal layer. This insulation layer protrudes beyond an edge part of the bonding face. In a bonding portion (1), the reinforcement structure body is configured within the first metal layer below this bonding face, when viewed from the top of the bonding face. This reinforcement structure body includes inductor lands.
摘要翻译：要解决的问题：提供具有高可靠性的粘合接触，特别是铜接合。解决方案：在半导体衬底上并具有加强结构体的接合触点包括：设置在半导体衬底上的至少一个第一金属层; 以及设置在所述第一金属层上方的第三金属层。在第一金属层中，存储有图案的加强结构体。第三金属层是具有接合面的接合接触层。此外，绝缘层设置在接合面的下方和第一金属层的上方。该绝缘层突出超过接合面的边缘部分。在接合部分（1）中，当从接合面的顶部观察时，加强结构体构造在该接合面下面的第一金属层内。该加强结构体包括电感平台。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2007202151A Integrated circuit for asynchronous serial data transfer with bit length counter 审中-公开
标题翻译：用于具有位长计数器的异步串行数据传输的集成电路
公开(公告)号：JP2007202151A
公开(公告)日：2007-08-09
申请号：JP2007011255
申请日：2007-01-22
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： RITTER JOACHIM
IPC分类号： H04L25/08 , H03K23/66
CPC分类号： H04L7/0331
摘要： PROBLEM TO BE SOLVED: To provide an integrated circuit for asynchronous serial data transmission with a bit length counter.
SOLUTION: The present invention relates to an integrated circuit (7) for asynchronous serial data transmission having a structure for constituting an input terminal (30) giving asynchronous serial data (d); a scanner (5) scanning the asynchronous serial data (d) by a scan clock (aclk) given to the input terminal; and a bit length counter (4) for determining a bit time by counting the number (m) of scan clocks (aclk) or the number of bit length counter clocks (xclk), wherein a bit length terminal (32) for variably setting the number (m) of clocks of the bit length counter (4) is configured in the integrated circuit (7) and/or the bit length counter (4).
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有位长度计数器的用于异步串行数据传输的集成电路。解决方案：本发明涉及用于异步串行数据传输的集成电路（7），其具有用于构成给出异步串行数据（d）的输入端子（30）的结构; 扫描器（5）通过给予输入端的扫描时钟（aclk）扫描异步串行数据（d）; 以及位长度计数器（4），用于通过对扫描时钟（aclk）的数量（m）或比特长度计数器时钟（xclk）的数量进行计数来确定比特时间，其中，用于可变地设置在集成电路（7）和/或位长度计数器（4）中配置位长度计数器（4）的时钟数（m）。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2005136973A Method for synchronization of circuit on reception of modulated signal 有权
标题翻译：电路同步接收调制信号的方法
公开(公告)号：JP2005136973A
公开(公告)日：2005-05-26
申请号：JP2004295879
申请日：2004-10-08
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： BOCK CHRISTIAN
IPC分类号： H04L27/38 , H03D1/00 , H04L7/02 , H04L7/033 , H04L27/00 , H04L27/22 , H04L27/227
CPC分类号： H04L27/38 , H04L27/227 , H04L2027/0032 , H04L2027/0036
摘要： PROBLEM TO BE SOLVED: To determine a symbol while using control parameters in a complex coordinate space for a received signal by a determinator, and to suite at least one of the control parameters with regard to following determinations in a method for synchronization of a circuit when receiving a signal that is mixed into a multi-dimensional complex signal space and modulated, particularly by a QAM receiver. SOLUTION: In order to improve the method, particularly, to more speedily prepare a determined symbol using components of a control loop without long delay, it is proposed to guide a temporary corrected angle that is particularly estimated with regard to present rotation, to the determinator as a control parameter (p) independently of control of a local oscillator. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了在由确定器使用接收信号的复坐标空间中的控制参数的同时确定符号，并且关于在用于同步的方法中的以下确定中的至少一个控制参数电路，当接收混合到多维复信号空间中并且特别是由QAM接收机调制的信号时。解决方案：为了改进该方法，特别地，为了更快速地准备使用控制回路的组件而不长时间延迟的确定符号，建议引导关于当前旋转特别估计的临时校正角度，作为独立于本地振荡器的控制的作为控制参数（p）的确定器。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2009004776A Probe card assembly 有权
标题翻译：探索卡大会
公开(公告)号：JP2009004776A
公开(公告)日：2009-01-08
申请号：JP2008153213
申请日：2008-06-11
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： STIEFVATER GUENTER , HAUSER WOLFGANG
IPC分类号： H01L21/66 , G01R1/073 , G01R31/28
CPC分类号： G01R1/07342 , G01R1/04
摘要： PROBLEM TO BE SOLVED: To provide an assembly which can compensates better not desirable impact due to strong flexure even if temperature changes, as a probe card assembly which fixes a printed circuit board.
SOLUTION: The probe card assembly includes a stiffener 1, a printed circuit board 2 disposed in the stiffener 1, and a spider supported by the stiffener 1 and the printed circuit board 2 and including at least one probe to test a wafer 5. The probe card assembly of the printed circuit board 2 is supported in a loosely decoupled manner in the stiffener 1 to prevent transmission of high thermally-induced warping effects.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供即使温度变化也能够由于强弯曲而补偿更好的不期望的冲击的组件，作为固定印刷电路板的探针卡组件。解决方案：探针卡组件包括加强件1，设置在加强件1中的印刷电路板2和由加强件1和印刷电路板2支撑并包括至少一个探针以测试晶片5的蜘蛛印刷电路板2的探针卡组件以松散分离的方式支撑在加强件1中，以防止传导高的热诱导翘曲效果。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2007318126A Monolithic sensor assembly, and method of controlling it 有权
标题翻译：单片传感器组件及其控制方法
公开(公告)号：JP2007318126A
公开(公告)日：2007-12-06
申请号：JP2007126335
申请日：2007-05-11
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： BIDENBACH REINER , FRANKE JOERG , RITTER JOACHIM
IPC分类号： H01L21/822 , G06F11/22 , H01L27/04
CPC分类号： G01D18/00 , G01D11/245
摘要： PROBLEM TO BE SOLVED: To provide a monolithic sensor which is so assembled as to be adaptive, in succession, to a changed operation condition.
SOLUTION: The monolithic sensor assembly includes a housing, a sensor S integrated in the housing, and at least two connection terminals C0 and C1 provided on the housing to allow contacting to the sensor S. The housing comprises a consolidated digital circuit. The circuit is equipped with a programmable digital processor CPU, a program memory MP, and a data memory MD. These are used for performing a function of the sensor and/or control of measurement data, and/or its process.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种如此组装的单片传感器，以适应性地连续地改变操作条件。解决方案：单片传感器组件包括壳体，集成在壳体中的传感器S以及设置在壳体上的至少两个连接端子C0和C1，以允许与传感器S接触。壳体包括统一的数字电路。该电路配备有可编程数字处理器CPU，程序存储器MP和数据存储器MD。这些用于执行传感器的功能和/或测量数据的控制和/或其过程。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007312390A Circuit device with serial test interface and serial test mode procedure 有权
标题翻译：具有串行测试接口和串行测试模式步骤的电路设备
公开(公告)号：JP2007312390A
公开(公告)日：2007-11-29
申请号：JP2007129374
申请日：2007-05-15
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： BIDENBACH REINER , FRANKE JOERG , RITTER JOACHIM , JUNG CHRISTIAN
IPC分类号： H03K19/0175 , G01R31/28 , H03K19/00
CPC分类号： G01R31/31713 , G01R31/2844 , G01R31/2884
摘要： PROBLEM TO BE SOLVED: To provide a circuit device with a serial test interface or a serial test mode procedure.
SOLUTION: The circuit device includes a serial test interface (TIF) for controlling a test mode, a freely programmable digital processor (CPU), a housing (G) housing the test interface (TIF) and the processor (CPU), and terminals (C0, C1) for exchanging data and/or signals with external components and external devices. In one terminal (C1), two voltage levels (V2, V3) which are controllable and different from a power supply voltage level (V1) designed to supply an operating voltage to the circuit device, are used to receive a modulated power supply voltage (VDD) and to perform data (d) transfer and/or pulse (T) transfer.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为电路设备提供串行测试接口或串行测试模式程序。解决方案：电路设备包括用于控制测试模式的串行测试接口（TIF），可自由编程的数字处理器（CPU），容纳测试接口（TIF）和处理器（CPU）的外壳（G）以及用于与外部组件和外部设备交换数据和/或信号的终端（C0，C1）。在一个端子（C1）中，使用两个电压电平（V2，V3），它们可控制并且不同于设计用于向电路装置提供工作电压的电源电压电平（V1），以接收调制电源电压 VDD）并执行数据（d）传输和/或脉冲（T）传输。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2006174424A Method and circuit for channel filtering of analog-modulated or digital-modulated tv signal 审中-公开
标题翻译：模拟调制或数字调制电视信号的通道滤波方法与电路
公开(公告)号：JP2006174424A
公开(公告)日：2006-06-29
申请号：JP2005319427
申请日：2005-11-02
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： TEMERINAC MIODRAG , FIESEL HANS
IPC分类号： H04N5/44
CPC分类号： H04N5/455 , H04N5/4401 , H04N5/46 , H04N21/4382
摘要： PROBLEM TO BE SOLVED: To provide a method and a circuit for effectively suppressing an interference signal.
SOLUTION: A TV signal converted into an intermediate frequency is demodulated into an in-phase signal (I) by an I/Q demodulator in order to suppress interference signals from adjacent TV channels, and demodulated into an orthogonal signal (Q) using a signal shifted in phase by a phase angle π/2 relative to the signal. The in-phase signal (I) is filtered by a first Hilbert of a Hilbert filter pair having an even symmetrical impulse response. The orthogonal signal (Q) is filtered by a second Hilbert filter of the Hilbert filter pair having a ununiform symmetrical impulse response. The Hilbert-filtered orthogonal signal (Q) is added to the in-phase signal (I) by an adder 21 in order to obtain a video output signal (SVideo). The Hilbert-filtered orthogonal signal (Q) is subtracted from the in-phase signal (I) by a subtractor in order to obtain a sound output signal (SSound).
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种有效抑制干扰信号的方法和电路。解决方案：通过I / Q解调器将转换成中频的TV信号解调为同相信号（I），以便抑制来自相邻TV信道的干扰信号，并将其解调为正交信号（Q）使用相位相移相位信号相位角π/ 2的信号。同相信号（I）由具有均匀对称脉冲响应的希尔伯特滤波器对的第一希尔伯特滤波。正交信号（Q）由具有不均匀对称脉冲响应的希尔伯特滤波器对的第二希尔伯特滤波器滤波。通过加法器21将希尔伯特滤波的正交信号（Q）加到同相信号（I）中，以获得视频输出信号（SVideo）。通过减法器从同相信号（I）中减去希尔伯特滤波的正交信号（Q），以获得声音输出信号（SSound）。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2005328540A Method and circuit device for measuring frequency of received signal to demodulate received symbol 有权
标题翻译：用于测量接收信号频率以解调接收到的符号的方法和电路装置
公开(公告)号：JP2005328540A
公开(公告)日：2005-11-24
申请号：JP2005139351
申请日：2005-05-12
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： BOCK CHRISTIAN , NOESKE CARSTEN
IPC分类号： H04L27/00 , H04L27/38
CPC分类号： H04L27/38 , H04L2027/0055 , H04L2027/0065
摘要： PROBLEM TO BE SOLVED: To provide a method and a circuit device for measuring frequency differences of carrier waves in demodulating a received symbol in a phasor space composed of complex numbers in quadrature modulation method (QAM), in which the received symbol for frequency measure is compared with a symbol on a target position in a complex signal space. SOLUTION: It is proposed that angles (∠(P1, P2)) between two received signal values (P1, P2) are measured and compared with a target angle which enables quadrature modulation method in order to make measurement irrelevant to the rotation of coordination system of received signal corresponding to a coordination system of symbol. The angle deflection between a specific angle and a target angle of the received signal values can be used as a direct measure for a frequency deviation (Δf). COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于测量在由正交调制方法（QAM）中的复数组成的相量空间中的接收符号解调中的载波的频率差的方法和电路装置，其中接收的符号用于频率测量与复信号空间中的目标位置上的符号进行比较。解决方案：建议测量两个接收信号值（P1，P2）之间的角度（∠（P1，P2）），并将其与能够进行正交调制方法的目标角度进行比较，以便使测量与旋转无关对应于符号协调系统的接收信号协调系统。可以将接收信号值的特定角度和目标角度之间的角度偏转用作频率偏差（Δf）的直接测量值。版权所有（C）2006，JPO＆NCIPI

10. 发明专利

JP2005323491A Dc-dc converter 审中-公开
标题翻译： DC-DC转换器
公开(公告)号：JP2005323491A
公开(公告)日：2005-11-17
申请号：JP2005134267
申请日：2005-05-02
申请人： Micronas Gmbh , マイクロナス・ゲーエムベーハーMicronas GmbH
发明人： WITTE FRANZ-OTTO , BOCK CHRISTIAN
IPC分类号： H02M3/155 , H02M1/12 , H02M1/14 , H02M3/10 , H02M3/156 , H02M3/335
CPC分类号： H02M3/156 , H02M1/12 , H02M1/44
摘要： PROBLEM TO BE SOLVED: To remarkably reduce the risk of interference to adjacent circuits by switching a DC-DC converter that is actuated according to the principle of the pulse modulation.
SOLUTION: The DC-DC converter comprises a switching device (1) that can be switched by periodic reference signals (U
ref ) between an open state and a closed state. The duty cycle of the reference signal determines the ratio of an input signal (V
cc ) of the DC-DC converter to an output voltage (V
out ). Reference frequency sources (6, 7, 8 and 9) for sending the reference signals (U
ref ) include modulation circuits (6) for modulating frequencies and/or the reference signals.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过切换根据脉冲调制原理启动的DC-DC转换器，显着降低对相邻电路的干扰风险。解决方案：DC-DC转换器包括可在打开状态和关闭状态之间通过周期性参考信号（U ref ）切换的开关装置（1）。参考信号的占空比确定DC-DC转换器的输入信号（V cc ）与输出电压（V 输出）的比率。用于发送参考信号（U ref ）的参考频率源（6,7,8和9）包括用于调制频率和/或参考信号的调制电路（6）。版权所有（C）2006，JPO＆NCIPI

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