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81. 发明专利

JPH09223954A MAJORITY CIRCUIT, INTERLOCK CIRCUIT AND IGNITION CONTROL SYSTEM 失效
公开(公告)号：JPH09223954A
公开(公告)日：1997-08-26
申请号：JP2763796
申请日：1996-02-15
申请人： HITACHI LTD
发明人： KANEKAWA NOBUYASU , HOTTA TAKASHI , SHIMAMURA KOTARO , SHIMOMURA TETSUYA , KAWABATA ATSUSHI
IPC分类号： H03K17/722 , H03K17/00 , H03K17/78 , H03K19/23
摘要： PROBLEM TO BE SOLVED: To provide a high-reliability and fail-safe majority circuit with which the generation probability of H-side fault is remarkably reduced. SOLUTION: This majority circuit is composed of AND 11, 12 and 13 for inputting two of three inputs ina, inb and inc and an OR 20. When the inputs more than two are H, the output of the majority circuit becomes H and an optical thyristor is ignited. The AND 11 is composed of open drain buffers 31 and 32 for inputting ina and inb, a resistor 41 for pull-up to be connected with the common output terminal of both the buffers, and a light emitting diode. Therefore, the AND 11-13 can be constituted as asymmetric fault elements for which the generation probability of H-side fault is extremely low. The OR 20 is constituted by respectively confronting the respective incident terminals of optical fibers 61-63 with light emitting diodes 51-53 and simultaneously confronting the respective emitting terminals to the optical thyristor 70. Therefore, this OR can be composed of only inactive elements and constituted as a rare fault element.

82. 发明专利

JPH0685640A SWITCHING CIRCUIT 失效
公开(公告)号：JPH0685640A
公开(公告)日：1994-03-25
申请号：JP27650092
申请日：1992-09-02
申请人： SUZUKI TOSHIYASU
发明人： SUZUKI TOSHIYASU
IPC分类号： H02M3/337 , H03K17/687 , H03K17/691 , H03K17/722 , H03K17/73
摘要： PURPOSE:To eliminate the simultaneous turn-on of two switching means and to prevent the short circuits of both switching means by constructing a 3-terminal switch with the series connection of both switching means and using a transformer to drive the 3-terminal switch in the directly opposite direction. CONSTITUTION:A drive signal is inputted to a winding wire 4a to apply the bias voltage opposite to each other to the transistors TR 2 and 3 which construct the switching means. If the turn-off action of the TR 2 is delayed when the ON/OFF states are switched between both TR 2 and 3 with inversion of the drive signal, a diode 5 short-circuits both ends of a winding wire 4d and therefore the inversion of the drive signal is prevented. As a result, the bias voltage is not supplied to the TR 3 before the TR 2 is turned off and therefore the TR 3 is never turned on. When the TR 2 is turned on, the drive signal is inverted and the TR 3 is turned on. Thus both TR 2 and 3 are never turned on at one time and the short circuits of them can be prevented.

83. 实用新型

JPS5778280U JPS5778280U - 失效
公开(公告)号：JPS5778280U
公开(公告)日：1982-05-14
申请号：JP15353980
申请日：1980-10-29
IPC分类号： H02M1/08 , H03K17/72 , H03K17/722 , H03K17/725 , H02M1/18

84. 实用新型

JPS56167640U 失效
公开(公告)号：JPS56167640U
公开(公告)日：1981-12-11
申请号：JP5914481
申请日：1981-04-22
IPC分类号： H03K17/78 , H03K17/72 , H03K17/722 , H03K17/725

85. 发明专利

JPS5528262B2 失效
公开(公告)号：JPS5528262B2
公开(公告)日：1980-07-26
申请号：JP934075
申请日：1975-01-23
IPC分类号： H03H9/145 , H01L29/74 , H01L29/747 , H02M1/08 , H03H3/08 , H03H9/76 , H03K17/16 , H03K17/722 , H03K17/725

86. 发明申请

WO2013124178A3 HIGH VOLTAGE CURRENT SWITCH CIRCUIT 审中-公开
标题翻译：高压电流开关电路
公开(公告)号：WO2013124178A3
公开(公告)日：2013-11-21
申请号：PCT/EP2013052672
申请日：2013-02-11
申请人： FOND DON CARLO GNOCCHI ONLUS
发明人： THORSEN RUNE ASBJOERN , LOMBARDINI LUCA , FERRARIN MAURIZIO
IPC分类号： H03K3/57 , A61N1/32 , H03K17/722
CPC分类号： H03K17/687 , A61B8/56 , A61N1/36003 , A61N1/36014 , A61N1/36125 , H03K3/57 , H03K17/722
摘要： The present invention relates to a high voltage switch circuit, comprising an input port adapted to receive a pulse type input current and an output port, which can be used selectively to conduct an output current to a corresponding electrical load. The switch circuit comprises a buffer stage adapted to sense the input voltage at said input port and to provide a buffered voltage that follows said input voltage. The switch circuit comprises complementary switches electrically connected between said input port and said output port and a voltage level translator electrically connected with said switches, said buffer stage and a control terminal that provides a control signal. The voltage level translator provides suitable gate voltages at the gate terminals of said switches, so that the operation of these latter can be controlled by said control signal.
摘要翻译：高压开关电路技术领域本发明涉及一种高压开关电路，其包括适于接收脉冲型输入电流的输入端口和输出端口，其可以选择性地用于将输出电流传导到相应的电负载。开关电路包括适于感测所述输入端口处的输入电压并提供跟随所述输入电压的缓冲电压的缓冲级。开关电路包括电连接在所述输入端口和所述输出端口之间的互补开关和与所述开关，所述缓冲级和提供控制信号的控制端子电连接的电压电平转换器。电压电平转换器在所述开关的栅极端提供合适的栅极电压，从而可以通过所述控制信号来控制这些栅极电压。

87. 发明公开

EP2817883A2 HIGH VOLTAGE CURRENT SWITCH CIRCUIT 有权
标题翻译：高压开关，用于切换功率脉冲
公开(公告)号：EP2817883A2
公开(公告)日：2014-12-31
申请号：EP13706196.6
申请日：2013-02-11
申请人： Fondazione Don Carlo Gnocchi - Onlus
发明人： THORSEN, Rune Asbjoern , LOMBARDINI, Luca , FERRARIN, Maurizio
IPC分类号： H03K3/57 , H03K17/722 , A61N1/32
CPC分类号： H03K17/687 , A61B8/56 , A61N1/36003 , A61N1/36014 , A61N1/36125 , H03K3/57 , H03K17/722
摘要： The present invention relates to a high voltage switch circuit, comprising an input port adapted to receive a pulse type input current and an output port, which can be used selectively to conduct an output current to a corresponding electrical load. The switch circuit comprises a buffer stage adapted to sense the input voltage at said input port and to provide a buffered voltage that follows said input voltage. The switch circuit comprises complementary switches electrically connected between said input port and said output port and a voltage level translator electrically connected with said switches, said buffer stage and a control terminal that provides a control signal. The voltage level translator provides suitable gate voltages at the gate terminals of said switches, so that the operation of these latter can be controlled by said control signal.

88. 发明公开

EP1524700A1 Commutateur à commande isolée 有权
标题翻译： Schalter mit einer isolierten Steuerung
公开(公告)号：EP1524700A1
公开(公告)日：2005-04-20
申请号：EP04105043.6
申请日：2004-10-14
申请人： ST MICROELECTRONICS S.A.
发明人： MENARD, Samuel , MAURIAC, Christophe
IPC分类号： H01L29/74 , H01L29/423 , H01L29/417 , H03K17/722
CPC分类号： H01L29/42308 , H01L29/41716 , H01L29/7408 , H03K17/722
摘要： L'invention concerne un commutateur SCR vertical destiné à être commandé par un signal haute fréquence, comprenant au moins quatre couches principales alternées. Ce commutateur comprend une borne de gâchette et une borne de référence de gâchette reliées par l'intermédiaire de condensateurs intégrés à des zones correspondantes. Dans le cas d'un thyristor, comprenant du côté de la face avant une zone semiconductrice principale de type P (20) formée dans une zone semiconductrice de gâchette de type N (21), une première portion de la zone principale étant reliée à une des bornes principales (K), une seconde portion de la zone principale est reliée à une des bornes de commande (K2) par l'intermédiaire d'un premier condensateur intégré (Ck), et une portion de la zone de gâchette (G) étant reliée à l'autre des bornes de commande par l'intermédiaire d'un second condensateur intégré (Cg).
摘要翻译：该开关具有四个主要层，高电流通过该层。栅极端子通过电容器与栅极区（G）连接。参考栅极端子通过集成电容器连接到布置在其上布置有栅极区域的部件面上的参考栅极区域。通过在参考和门极之间施加高频信号激活开关。

89. 发明专利

JP5606233B2 Hybrid relay 有权
公开(公告)号：JP5606233B2
公开(公告)日：2014-10-15
申请号：JP2010204788
申请日：2010-09-13
申请人：パナソニック株式会社
发明人：安弘住野 , 究柴田 , 弘治大和 , 弘行工藤 , 潔後藤 , 啓三浦 , 進中埜 , 宏一山添 , 桂松宮
IPC分类号： H01H47/00 , H03K17/722 , H03K17/78
CPC分类号： H01H9/547 , H01H47/325 , H03K17/722 , H03K17/79

90. 发明专利

JPH08130454A THYRISTOR GATE TRIGGER PULSE CIRCUIT 失效
公开(公告)号：JPH08130454A
公开(公告)日：1996-05-21
申请号：JP26734194
申请日：1994-10-31
申请人： NISHISHIBA DENKI KK
发明人： ASHIKAGA KEN
IPC分类号： H02M1/08 , H03K17/04 , H03K17/722
摘要： PURPOSE: To shorten the time for response by providing a phase detection/phase control circuit, clock oscillator and counter circuit and applying an ON command signal to a RUN/STOP control input for a counting operation. CONSTITUTION: Concerning a control angle signal output (RUN/STOP input), only the change from a state S0 (L, L) to a state S1 (H, L) is controlled. When the state is transited from the state S0 to the state S1 once, the state is transited with no condition so that the state is immediately changed like S1→S2→S3→S0 and returned to the state S0 again. The waiting position of the counting operation due to the L state of the control angle signal is set in the state S0 at all times. When the control angle signal is turned to an H state once, the state is changed from the state S0 to the state S1, and a Q0 as a continuous trigger pulse signal is immediately turned to an active state (H state) and continuous trigger pulses are transmitted. Besides, since the response time is shorter than a clock period, the continuous trigger pulses of desiredly sufficiently short response time can be provided.

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